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25c7f1 |
2017-01-17 Segher Boessenkool <segher@kernel.crashing.org>
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25c7f1 |
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25c7f1 |
PR target/78875
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25c7f1 |
* config/rs6000/rs6000-opts.h (stack_protector_guard): New enum.
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25c7f1 |
* config/rs6000/rs6000.c (rs6000_option_override_internal): Handle
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the new options.
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* config/rs6000/rs6000.md (stack_protect_set): Handle the new more
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flexible settings.
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(stack_protect_test): Ditto.
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* config/rs6000/rs6000.opt (mstack-protector-guard=,
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mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
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options.
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* doc/invoke.texi (Option Summary) [RS/6000 and PowerPC Options]:
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Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
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-mstack-protector-guard-offset=.
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(RS/6000 and PowerPC Options): Ditto.
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* gcc.target/powerpc/ssp-1.c: New testcase.
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* gcc.target/powerpc/ssp-2.c: New testcase.
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25c7f1 |
--- gcc/config/rs6000/rs6000.opt (revision 244555)
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+++ gcc/config/rs6000/rs6000.opt (revision 244556)
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25c7f1 |
@@ -593,3 +593,31 @@ Allow float variables in upper registers
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25c7f1 |
moptimize-swaps
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25c7f1 |
Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
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25c7f1 |
Analyze and remove doubleword swaps from VSX computations.
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+
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+mstack-protector-guard=
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+Target RejectNegative Joined Enum(stack_protector_guard) Var(rs6000_stack_protector_guard) Init(SSP_TLS)
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+Use given stack-protector guard.
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+
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+Enum
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+Name(stack_protector_guard) Type(enum stack_protector_guard)
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+Valid arguments to -mstack-protector-guard=:
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+
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+EnumValue
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+Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
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+
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+EnumValue
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+Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
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+
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+mstack-protector-guard-reg=
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+Target RejectNegative Joined Var(rs6000_stack_protector_guard_reg_str)
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+Use the given base register for addressing the stack-protector guard.
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+
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+TargetVariable
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+int rs6000_stack_protector_guard_reg = 0
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+
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+mstack-protector-guard-offset=
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+Target RejectNegative Joined Integer Var(rs6000_stack_protector_guard_offset_str)
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+Use the given offset for addressing the stack-protector guard.
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+
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+TargetVariable
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+long rs6000_stack_protector_guard_offset = 0
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--- gcc/config/rs6000/rs6000.c (revision 244555)
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+++ gcc/config/rs6000/rs6000.c (revision 244556)
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@@ -3727,6 +3727,54 @@ rs6000_option_override_internal (bool gl
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atoi (rs6000_sched_insert_nops_str));
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}
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+ /* Handle stack protector */
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+ if (!global_options_set.x_rs6000_stack_protector_guard)
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+#ifdef TARGET_THREAD_SSP_OFFSET
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+ rs6000_stack_protector_guard = SSP_TLS;
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+#else
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+ rs6000_stack_protector_guard = SSP_GLOBAL;
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+#endif
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+
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+#ifdef TARGET_THREAD_SSP_OFFSET
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+ rs6000_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
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+ rs6000_stack_protector_guard_reg = TARGET_64BIT ? 13 : 2;
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+#endif
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+
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+ if (global_options_set.x_rs6000_stack_protector_guard_offset_str)
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+ {
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+ char *endp;
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+ const char *str = rs6000_stack_protector_guard_offset_str;
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+
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+ errno = 0;
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+ long offset = strtol (str, &endp, 0);
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+ if (!*str || *endp || errno)
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+ error ("%qs is not a valid number "
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+ "in -mstack-protector-guard-offset=", str);
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+
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+ if (!IN_RANGE (offset, -0x8000, 0x7fff)
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+ || (TARGET_64BIT && (offset & 3)))
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+ error ("%qs is not a valid offset "
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+ "in -mstack-protector-guard-offset=", str);
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+
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+ rs6000_stack_protector_guard_offset = offset;
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+ }
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+
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+ if (global_options_set.x_rs6000_stack_protector_guard_reg_str)
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+ {
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+ const char *str = rs6000_stack_protector_guard_reg_str;
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+ int reg = decode_reg_name (str);
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+
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+ if (!IN_RANGE (reg, 1, 31))
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+ error ("%qs is not a valid base register "
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+ "in -mstack-protector-guard-reg=", str);
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+
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+ rs6000_stack_protector_guard_reg = reg;
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+ }
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+
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+ if (rs6000_stack_protector_guard == SSP_TLS
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+ && !IN_RANGE (rs6000_stack_protector_guard_reg, 1, 31))
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+ error ("-mstack-protector-guard=tls needs a valid base register");
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+
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if (global_init_p)
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{
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#ifdef TARGET_REGNAMES
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--- gcc/config/rs6000/rs6000.md (revision 244555)
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+++ gcc/config/rs6000/rs6000.md (revision 244556)
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@@ -13092,19 +13092,23 @@
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25c7f1 |
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(define_expand "stack_protect_set"
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- [(match_operand 0 "memory_operand" "")
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- (match_operand 1 "memory_operand" "")]
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+ [(match_operand 0 "memory_operand")
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+ (match_operand 1 "memory_operand")]
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""
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{
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-#ifdef TARGET_THREAD_SSP_OFFSET
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- rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
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- rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
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- operands[1] = gen_rtx_MEM (Pmode, addr);
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-#endif
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+ if (rs6000_stack_protector_guard == SSP_TLS)
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+ {
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+ rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
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+ rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
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+ rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
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+ operands[1] = gen_rtx_MEM (Pmode, addr);
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+ }
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+
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if (TARGET_64BIT)
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emit_insn (gen_stack_protect_setdi (operands[0], operands[1]));
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else
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emit_insn (gen_stack_protect_setsi (operands[0], operands[1]));
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+
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DONE;
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})
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@@ -13127,21 +13131,26 @@
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(set_attr "length" "12")])
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(define_expand "stack_protect_test"
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- [(match_operand 0 "memory_operand" "")
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- (match_operand 1 "memory_operand" "")
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- (match_operand 2 "" "")]
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+ [(match_operand 0 "memory_operand")
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+ (match_operand 1 "memory_operand")
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+ (match_operand 2 "")]
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""
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{
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- rtx test, op0, op1;
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-#ifdef TARGET_THREAD_SSP_OFFSET
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- rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
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- rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
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- operands[1] = gen_rtx_MEM (Pmode, addr);
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-#endif
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- op0 = operands[0];
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- op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]), UNSPEC_SP_TEST);
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- test = gen_rtx_EQ (VOIDmode, op0, op1);
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- emit_jump_insn (gen_cbranchsi4 (test, op0, op1, operands[2]));
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+ rtx guard = operands[1];
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+
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+ if (rs6000_stack_protector_guard == SSP_TLS)
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+ {
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+ rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
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+ rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
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+ rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
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+ guard = gen_rtx_MEM (Pmode, addr);
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+ }
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+
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+ operands[1] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, guard), UNSPEC_SP_TEST);
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+ rtx test = gen_rtx_EQ (VOIDmode, operands[0], operands[1]);
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+ rtx jump = gen_cbranchsi4 (test, operands[0], operands[1], operands[2]);
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+ emit_jump_insn (jump);
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+
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DONE;
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})
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--- gcc/config/rs6000/rs6000-opts.h (revision 244555)
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+++ gcc/config/rs6000/rs6000-opts.h (revision 244556)
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@@ -154,6 +154,12 @@ enum rs6000_vector {
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VECTOR_OTHER /* Some other vector unit */
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};
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+/* Where to get the canary for the stack protector. */
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+enum stack_protector_guard {
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+ SSP_TLS, /* per-thread canary in TLS block */
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+ SSP_GLOBAL /* global canary */
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+};
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+
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/* No enumeration is defined to index the -mcpu= values (entries in
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processor_target_table), with the type int being used instead, but
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we need to distinguish the special "native" value. */
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--- gcc/doc/invoke.texi (revision 244555)
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+++ gcc/doc/invoke.texi (revision 244556)
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@@ -862,7 +862,9 @@ See RS/6000 and PowerPC Options.
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-mcrypto -mno-crypto -mdirect-move -mno-direct-move @gol
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-mquad-memory -mno-quad-memory @gol
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-mquad-memory-atomic -mno-quad-memory-atomic @gol
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--mcompat-align-parm -mno-compat-align-parm}
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+-mcompat-align-parm -mno-compat-align-parm @gol
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+-mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
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+-mstack-protector-guard-offset=@var{offset}}
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@emph{RX Options}
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25c7f1 |
@gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol
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@@ -18295,6 +18297,23 @@ GCC.
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25c7f1 |
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In this version of the compiler, the @option{-mcompat-align-parm}
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is the default, except when using the Linux ELFv2 ABI.
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+
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+@item -mstack-protector-guard=@var{guard}
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+@itemx -mstack-protector-guard-reg=@var{reg}
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+@itemx -mstack-protector-guard-offset=@var{offset}
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+@opindex mstack-protector-guard
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+@opindex mstack-protector-guard-reg
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+@opindex mstack-protector-guard-offset
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+Generate stack protection code using canary at @var{guard}. Supported
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+locations are @samp{global} for global canary or @samp{tls} for per-thread
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+canary in the TLS block (the default with GNU libc version 2.4 or later).
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+
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+With the latter choice the options
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+@option{-mstack-protector-guard-reg=@var{reg}} and
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+@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify
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+which register to use as base register for reading the canary, and from what
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+offset from that base register. The default for those is as specified in the
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+relevant ABI.
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25c7f1 |
@end table
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25c7f1 |
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25c7f1 |
@node RX Options
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25c7f1 |
--- gcc/testsuite/gcc.target/powerpc/ssp-1.c (nonexistent)
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+++ gcc/testsuite/gcc.target/powerpc/ssp-1.c (revision 244562)
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@@ -0,0 +1,6 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
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+
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+/* { dg-final { scan-assembler "__stack_chk_guard" } } */
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+
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+void f(void) { }
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25c7f1 |
--- gcc/testsuite/gcc.target/powerpc/ssp-2.c (nonexistent)
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+++ gcc/testsuite/gcc.target/powerpc/ssp-2.c (revision 244562)
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25c7f1 |
@@ -0,0 +1,6 @@
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25c7f1 |
+/* { dg-do compile } */
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25c7f1 |
+/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=tls -mstack-protector-guard-reg=r18 -mstack-protector-guard-offset=0x3038" } */
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+
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25c7f1 |
+/* { dg-final { scan-assembler {\m12344\(r?18\)} } } */
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25c7f1 |
+
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25c7f1 |
+void f(void) { }
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