Blame SOURCES/gcc48-pr78416.patch

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2016-11-18  Jakub Jelinek  <jakub@redhat.com>
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	PR middle-end/78416
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	* expmed.c (expand_divmod): For modes wider than HWI, take into
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	account implicit 1 bits above msb for EXACT_POWER_OF_2_OR_ZERO_P.
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	* gcc.dg/torture/pr78416.c: New test.
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--- gcc/expmed.c
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+++ gcc/expmed.c
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@@ -3844,7 +3844,15 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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       if (unsignedp)
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 	ext_op1 &= GET_MODE_MASK (mode);
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       op1_is_pow2 = ((EXACT_POWER_OF_2_OR_ZERO_P (ext_op1)
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-		     || (! unsignedp && EXACT_POWER_OF_2_OR_ZERO_P (-ext_op1))));
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+		      /* If mode is wider than HWI and op1 has msb set,
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+			 then it has there extra implicit 1 bits above it.  */
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+		      && (GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
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+			  || INTVAL (op1) >= 0))
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+		     || (! unsignedp
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+			 && EXACT_POWER_OF_2_OR_ZERO_P (-ext_op1)
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+			 && (GET_MODE_PRECISION (mode)
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+			     <= HOST_BITS_PER_WIDE_INT
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+			     || INTVAL (op1) < 0)));
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     }
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   /*
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@@ -3987,8 +3995,17 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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       op1_is_constant = CONST_INT_P (op1);
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       op1_is_pow2 = (op1_is_constant
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 		     && ((EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1))
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-			  || (! unsignedp
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-			      && EXACT_POWER_OF_2_OR_ZERO_P (-UINTVAL (op1))))));
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+			  /* If mode is wider than HWI and op1 has msb set,
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+			     then it has there extra implicit 1 bits above
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+			     it.  */
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+			  && (GET_MODE_PRECISION (compute_mode)
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+			      <= HOST_BITS_PER_WIDE_INT
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+			      || INTVAL (op1) >= 0))
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+			 || (! unsignedp
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+			     && EXACT_POWER_OF_2_OR_ZERO_P (-UINTVAL (op1))
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+			     && (GET_MODE_PRECISION (compute_mode)
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+				 <= HOST_BITS_PER_WIDE_INT
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+				 || INTVAL (op1) < 0))));
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     }
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   /* If one of the operands is a volatile MEM, copy it into a register.  */
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@@ -4031,7 +4048,8 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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 		unsigned HOST_WIDE_INT d = (INTVAL (op1)
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 					    & GET_MODE_MASK (compute_mode));
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-		if (EXACT_POWER_OF_2_OR_ZERO_P (d))
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+		if (EXACT_POWER_OF_2_OR_ZERO_P (d)
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+		    && (INTVAL (op1) >= 0 || size <= HOST_BITS_PER_WIDE_INT))
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 		  {
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 		    pre_shift = floor_log2 (d);
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 		    if (rem_flag)
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@@ -4179,6 +4197,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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 		      goto fail1;
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 		  }
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 		else if (EXACT_POWER_OF_2_OR_ZERO_P (d)
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+			 && (size <= HOST_BITS_PER_WIDE_INT || d >= 0)
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 			 && (rem_flag
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 			     ? smod_pow2_cheap (speed, compute_mode)
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 			     : sdiv_pow2_cheap (speed, compute_mode))
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@@ -4192,7 +4211,9 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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 						compute_mode)
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 				 != CODE_FOR_nothing)))
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 		  ;
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-		else if (EXACT_POWER_OF_2_OR_ZERO_P (abs_d))
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+		else if (EXACT_POWER_OF_2_OR_ZERO_P (abs_d)
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+			 && (size <= HOST_BITS_PER_WIDE_INT
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+			     || abs_d != (unsigned HOST_WIDE_INT) d))
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 		  {
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 		    if (rem_flag)
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 		      {
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@@ -4504,7 +4525,10 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
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       case CEIL_MOD_EXPR:
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 	if (unsignedp)
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 	  {
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-	    if (op1_is_constant && EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1)))
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+	    if (op1_is_constant
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+		&& EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1))
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+		&& (size <= HOST_BITS_PER_WIDE_INT
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+		    || INTVAL (op1) >= 0))
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 	      {
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 		rtx t1, t2, t3;
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 		unsigned HOST_WIDE_INT d = INTVAL (op1);
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--- gcc/testsuite/gcc.dg/torture/pr78416.c
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+++ gcc/testsuite/gcc.dg/torture/pr78416.c
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@@ -0,0 +1,17 @@
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+/* PR middle-end/78416 */
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+/* { dg-do run { target int128 } } */
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+
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+int
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+main ()
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+{
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+  unsigned __int128 x;
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+  x = 0xFFFFFFFFFFFFFFFFULL;
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+  x /= ~0x7FFFFFFFFFFFFFFFLL;
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+  if (x != 0)
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+    __builtin_abort ();
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+  x = ~0x7FFFFFFFFFFFFFFELL;
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+  x /= ~0x7FFFFFFFFFFFFFFFLL;
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+  if (x != 1)
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+    __builtin_abort ();
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+  return 0;
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+}