Blame SOURCES/gcc48-pr72717.patch

56d343
2016-12-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
56d343
56d343
	Backport from mainline
56d343
	2016-12-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
56d343
56d343
	PR target/72717
56d343
	* config/rs6000/rs6000.c (rs6000_expand_vector_init): If the
56d343
	V2DImode elements are SUBREG's convert the result into DImode
56d343
	rather than failing in emit_move_insn.
56d343
56d343
--- gcc/testsuite/gcc.target/powerpc/pr72717.c	(nonexistent)
56d343
+++ gcc/testsuite/gcc.target/powerpc/pr72717.c	(revision 243626)
56d343
@@ -0,0 +1,18 @@
56d343
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
56d343
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
56d343
+/* { dg-require-effective-target powerpc_p8vector_ok } */
56d343
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
56d343
+/* { dg-options "-mcpu=power8 -O2" } */
56d343
+
56d343
+typedef long V __attribute__((__vector_size__(32)));
56d343
+
56d343
+extern void foo (V *, V*);
56d343
+
56d343
+/* This test generated an failure in emit_move_insn.  */
56d343
+
56d343
+void
56d343
+foo(V *p, V *q)
56d343
+{
56d343
+  V v = *q;
56d343
+  *p = v << v[0];
56d343
+}
56d343
--- gcc/config/rs6000/rs6000.c	(revision 243625)
56d343
+++ gcc/config/rs6000/rs6000.c	(revision 243626)
56d343
@@ -6667,25 +6667,43 @@
56d343
   /* Double word values on VSX can use xxpermdi or lxvdsx.  */
56d343
   if (VECTOR_MEM_VSX_P (mode) && (mode == V2DFmode || mode == V2DImode))
56d343
     {
56d343
-      rtx op0 = XVECEXP (vals, 0, 0);
56d343
-      rtx op1 = XVECEXP (vals, 0, 1);
56d343
+      rtx op[2];
56d343
+      size_t i;
56d343
+      size_t num_elements = (all_same) ? 1 : 2;
56d343
+      for (i = 0; i < num_elements; i++)
56d343
+	{
56d343
+	  op[i] = XVECEXP (vals, 0, i);
56d343
+	  /* Just in case there is a SUBREG with a smaller mode, do a
56d343
+	     conversion.  */
56d343
+	  if (GET_MODE (op[i]) != inner_mode)
56d343
+	    {
56d343
+	      rtx tmp = gen_reg_rtx (inner_mode);
56d343
+	      convert_move (tmp, op[i], 0);
56d343
+	      op[i] = tmp;
56d343
+	    }
56d343
+	  /* Allow load with splat double word.  */
56d343
+	  else if (MEM_P (op[i]))
56d343
+	    {
56d343
+	      if (!all_same)
56d343
+		op[i] = force_reg (inner_mode, op[i]);
56d343
+	    }
56d343
+	  else if (!REG_P (op[i]))
56d343
+	    op[i] = force_reg (inner_mode, op[i]);
56d343
+	}
56d343
+
56d343
       if (all_same)
56d343
 	{
56d343
-	  if (!MEM_P (op0) && !REG_P (op0))
56d343
-	    op0 = force_reg (inner_mode, op0);
56d343
 	  if (mode == V2DFmode)
56d343
-	    emit_insn (gen_vsx_splat_v2df (target, op0));
56d343
+	    emit_insn (gen_vsx_splat_v2df (target, op[0]));
56d343
 	  else
56d343
-	    emit_insn (gen_vsx_splat_v2di (target, op0));
56d343
+	    emit_insn (gen_vsx_splat_v2di (target, op[0]));
56d343
 	}
56d343
       else
56d343
 	{
56d343
-	  op0 = force_reg (inner_mode, op0);
56d343
-	  op1 = force_reg (inner_mode, op1);
56d343
 	  if (mode == V2DFmode)
56d343
-	    emit_insn (gen_vsx_concat_v2df (target, op0, op1));
56d343
+	    emit_insn (gen_vsx_concat_v2df (target, op[0], op[1]));
56d343
 	  else
56d343
-	    emit_insn (gen_vsx_concat_v2di (target, op0, op1));
56d343
+	    emit_insn (gen_vsx_concat_v2di (target, op[0], op[1]));
56d343
 	}
56d343
       return;
56d343
     }