Blame SOURCES/gcc48-pr70549.patch
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2017-03-08 Bernd Schmidt <bschmidt@redhat.com>
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PR target/70549
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* config/aarch64/aarch64.c (aarch64_secondary_reload): Reload
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CORE_REGS rclass constants in [SD]Fmode through FP_REGS.
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* g++.dg/opt/pr70549.C: New test.
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--- gcc/config/aarch64/aarch64.c.jj 2017-03-08 15:50:55.000000000 +0100
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+++ gcc/config/aarch64/aarch64.c 2017-03-08 16:01:15.426080172 +0100
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@@ -3846,8 +3846,13 @@ aarch64_secondary_reload (bool in_p ATTR
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&& GET_MODE_SIZE (mode) == 16 && MEM_P (x))
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return FP_REGS;
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+ if (rclass == CORE_REGS
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+ && (mode == SFmode || mode == DFmode)
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+ && CONSTANT_P (x))
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+ return FP_REGS;
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+
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if (rclass == FP_REGS && (mode == TImode || mode == TFmode) && CONSTANT_P(x))
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- return CORE_REGS;
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+ return CORE_REGS;
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return NO_REGS;
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}
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--- gcc/testsuite/g++.dg/opt/pr70549.C.jj 2017-03-08 16:02:45.104918249 +0100
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+++ gcc/testsuite/g++.dg/opt/pr70549.C 2017-03-08 16:02:14.000000000 +0100
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@@ -0,0 +1,33 @@
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+// PR target/70549
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+// { dg-do compile }
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+// { dg-options "-O2" }
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+// { dg-additional-options "-fPIC" { target fpic } }
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+
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+struct A { float x; float y; };
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+A a, b, c;
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+int d, e;
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+A bar ();
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+void foo (A, A);
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+inline A operator/ (A, A p2) { if (p2.x) return a; }
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+struct B { A dval; };
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+int baz (A, B, A, int);
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+
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+void
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+test ()
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+{
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+ B q;
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+ A f, g, h, k;
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+ h.x = 1.0;
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+ f = h;
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+ struct A i, j = f;
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+ do {
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+ i = bar ();
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+ g = i / j;
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+ foo (g, c);
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+ int l = baz (k, q, b, e);
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+ if (l)
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+ goto cleanup;
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+ j = i;
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+ } while (d);
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+cleanup:;
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+}
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