Blame SOURCES/gcc48-pr61801.patch

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2014-07-17  Richard Biener  <rguenther@suse.de>
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	PR rtl-optimization/61801
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	* sched-deps.c (sched_analyze_2): For ASM_OPERANDS and
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	ASM_INPUT don't set reg_pending_barrier if it appears in a
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	debug-insn.
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2014-08-06  Jakub Jelinek  <jakub@redhat.com>
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	PR rtl-optimization/61801
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	* gcc.target/i386/pr61801.c: Rewritten.
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2014-07-28  Richard Biener  <rguenther@suse.de>
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	PR rtl-optimization/61801
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	* gcc.target/i386/pr61801.c: Fix testcase.
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2014-07-28  Richard Biener  <rguenther@suse.de>
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	PR rtl-optimization/61801
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	* gcc.target/i386/pr61801.c: New testcase.
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--- gcc/sched-deps.c	(revision 212737)
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+++ gcc/sched-deps.c	(revision 212738)
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@@ -2750,7 +2750,8 @@ sched_analyze_2 (struct deps_desc *deps,
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 	   Consider for instance a volatile asm that changes the fpu rounding
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 	   mode.  An insn should not be moved across this even if it only uses
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 	   pseudo-regs because it might give an incorrectly rounded result.  */
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-	if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
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+	if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
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+	    && !DEBUG_INSN_P (insn))
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 	  reg_pending_barrier = TRUE_BARRIER;
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 	/* For all ASM_OPERANDS, we must traverse the vector of input operands.
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--- gcc/testsuite/gcc.target/i386/pr61801.c	(revision 0)
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+++ gcc/testsuite/gcc.target/i386/pr61801.c	(revision 213654)
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@@ -0,0 +1,21 @@
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+/* PR rtl-optimization/61801 */
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+/* { dg-do compile } */
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+/* { dg-options "-Os -fcompare-debug" } */
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+
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+int a, c;
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+int bar (void);
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+void baz (void);
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+
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+void
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+foo (void)
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+{
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+  int d;
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+  if (bar ())
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+    {
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+      int e;
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+      baz ();
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+      asm volatile ("" : "=a" (e) : "0" (a), "i" (0));
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+      d = e;
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+    }
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+  c = d;
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+}