diff --git a/SOURCES/gcc12-detect-sapphirerapids.patch b/SOURCES/gcc12-detect-sapphirerapids.patch
new file mode 100644
index 0000000..5b994e6
--- /dev/null
+++ b/SOURCES/gcc12-detect-sapphirerapids.patch
@@ -0,0 +1,78 @@
+commit d644dfe36d9733c767af62d37250253ced6efd8c
+Author: Cui,Lili <lili.cui@intel.com>
+Date:   Mon Nov 7 11:25:41 2022 +0800
+
+    Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS
+    
+    gcc/ChangeLog:
+    
+            * config/i386/driver-i386.cc (host_detect_local_cpu):
+            Move sapphirerapids out of AVX512_VP2INTERSECT.
+            * config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS
+            * doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS
+    
+    (cherry picked from commit d644dfe36d9733c767af62d37250253ced6efd8c)
+
+diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
+index 9e0ae0b2baa..fcf23fd921d 100644
+--- a/gcc/config/i386/driver-i386.cc
++++ b/gcc/config/i386/driver-i386.cc
+@@ -574,15 +574,12 @@ const char *host_detect_local_cpu (int argc, const char **argv)
+ 	      /* This is unknown family 0x6 CPU.  */
+ 	      if (has_feature (FEATURE_AVX))
+ 		{
++		  /* Assume Tiger Lake */
+ 		  if (has_feature (FEATURE_AVX512VP2INTERSECT))
+-		    {
+-		      if (has_feature (FEATURE_TSXLDTRK))
+-			/* Assume Sapphire Rapids.  */
+-			cpu = "sapphirerapids";
+-		      else
+-			/* Assume Tiger Lake */
+-			cpu = "tigerlake";
+-		    }
++		    cpu = "tigerlake";
++		  /* Assume Sapphire Rapids.  */
++		  else if (has_feature (FEATURE_TSXLDTRK))
++		    cpu = "sapphirerapids";
+ 		  /* Assume Cooper Lake */
+ 		  else if (has_feature (FEATURE_AVX512BF16))
+ 		    cpu = "cooperlake";
+diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
+index 363082ba47b..a61c32b8957 100644
+--- a/gcc/config/i386/i386.h
++++ b/gcc/config/i386/i386.h
+@@ -2328,10 +2328,9 @@ constexpr wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT
+ constexpr wide_int_bitmask PTA_TIGERLAKE = PTA_ICELAKE_CLIENT | PTA_MOVDIRI
+   | PTA_MOVDIR64B | PTA_CLWB | PTA_AVX512VP2INTERSECT | PTA_KL | PTA_WIDEKL;
+ constexpr wide_int_bitmask PTA_SAPPHIRERAPIDS = PTA_ICELAKE_SERVER | PTA_MOVDIRI
+-  | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT | PTA_ENQCMD | PTA_CLDEMOTE
+-  | PTA_PTWRITE | PTA_WAITPKG | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE
+-  | PTA_AMX_INT8 | PTA_AMX_BF16 | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16
+-  | PTA_AVX512BF16;
++  | PTA_MOVDIR64B | PTA_ENQCMD | PTA_CLDEMOTE | PTA_PTWRITE | PTA_WAITPKG
++  | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE | PTA_AMX_INT8 | PTA_AMX_BF16
++  | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 | PTA_AVX512BF16;
+ constexpr wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF
+   | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD | PTA_PREFETCHWT1;
+ constexpr wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE;
+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
+index 3749e06f13e..cee057a70bf 100644
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -31541,11 +31541,11 @@ Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+ SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
+ RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
+ AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
+-AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2
++AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
+ VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
+-MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG,
+-SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16
+-and AVX512BF16 instruction set support.
++MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK,
++UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 and AVX512BF16
++instruction set support.
+ 
+ @item alderlake
+ Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
diff --git a/SPECS/gcc.spec b/SPECS/gcc.spec
index 02091d3..b2fb923 100644
--- a/SPECS/gcc.spec
+++ b/SPECS/gcc.spec
@@ -147,7 +147,7 @@
 Summary: GCC version 12
 Name: %{?scl_prefix}gcc
 Version: %{gcc_version}
-Release: %{gcc_release}.2%{?dist}
+Release: %{gcc_release}.4%{?dist}
 # libgcc, libgfortran, libgomp, libstdc++ and crtstuff have
 # GCC Runtime Exception.
 License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions and LGPLv2+ and BSD
@@ -352,6 +352,8 @@ Patch12: gcc12-pr105551.patch
 Patch13: gcc12-libtsan-s390x.patch
 # This has been backported to GCC 12, so eventually we can drop it.
 Patch14: gcc12-pr105991.patch
+# For DTS 12.0.z.
+Patch15: gcc12-detect-sapphirerapids.patch
 
 Patch100: gcc12-fortran-fdec-duplicates.patch
 Patch101: gcc12-fortran-flogical-as-integer.patch
@@ -730,6 +732,7 @@ so that there cannot be any synchronization problems.
 %patch12 -p0 -b .pr105551~
 %patch13 -p0 -b .libtsan-s390x~
 %patch14 -p1 -b .pr105991~
+%patch15 -p1 -b .detect-spr~
 
 %if 0%{?rhel} >= 6
 %patch100 -p1 -b .fortran-fdec-duplicates~
@@ -2957,6 +2960,9 @@ fi
 %endif
 
 %changelog
+* Thu Dec  1 2022 Marek Polacek <polacek@redhat.com> 12.1.1-3.4
+- fix Sapphire Rapids detection in host_detect_local_cpu (#2150131)
+
 * Fri Jul  8 2022 Marek Polacek <polacek@redhat.com> 12.1.1-3.2
 - recognize PLUS and XOR forms of rldimi (PR target/105991, #2095789)