Blame SOURCES/gcc8-rh1512529-aarch64.patch

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--- gcc/config/aarch64/aarch64.c
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+++ gcc/config/aarch64/aarch64.c
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@@ -3799,7 +3799,14 @@ aarch64_output_probe_stack_range (rtx reg1, rtx reg2)
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   output_asm_insn ("sub\t%0, %0, %1", xops);
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   /* Probe at TEST_ADDR.  */
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-  output_asm_insn ("str\txzr, [%0]", xops);
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+  if (flag_stack_clash_protection)
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+    {
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+      gcc_assert (xops[0] == stack_pointer_rtx);
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+      xops[1] = GEN_INT (PROBE_INTERVAL - 8);
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+      output_asm_insn ("str\txzr, [%0, %1]", xops);
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+    }
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+  else
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+    output_asm_insn ("str\txzr, [%0]", xops);
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   /* Test if TEST_ADDR == LAST_ADDR.  */
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   xops[1] = reg2;
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@@ -4589,6 +4596,133 @@ aarch64_set_handled_components (sbitmap components)
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       cfun->machine->reg_is_wrapped_separately[regno] = true;
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 }
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+/* Allocate POLY_SIZE bytes of stack space using TEMP1 and TEMP2 as scratch
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+   registers.  */
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+
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+static void
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+aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
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+					poly_int64 poly_size)
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+{
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+  HOST_WIDE_INT size;
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+  if (!poly_size.is_constant (&size))
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+    {
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+      sorry ("stack probes for SVE frames");
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+      return;
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+    }
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+
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+  HOST_WIDE_INT probe_interval
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+    = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL);
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+  HOST_WIDE_INT guard_size
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+    = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
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+  HOST_WIDE_INT guard_used_by_caller = 1024;
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+
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+  /* SIZE should be large enough to require probing here.  ie, it
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+     must be larger than GUARD_SIZE - GUARD_USED_BY_CALLER.
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+
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+     We can allocate GUARD_SIZE - GUARD_USED_BY_CALLER as a single chunk
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+     without any probing.  */
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+  gcc_assert (size >= guard_size - guard_used_by_caller);
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+  aarch64_sub_sp (temp1, temp2, guard_size - guard_used_by_caller, true);
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+  HOST_WIDE_INT orig_size = size;
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+  size -= (guard_size - guard_used_by_caller);
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+
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+  HOST_WIDE_INT rounded_size = size & -probe_interval;
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+  HOST_WIDE_INT residual = size - rounded_size;
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+
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+  /* We can handle a small number of allocations/probes inline.  Otherwise
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+     punt to a loop.  */
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+  if (rounded_size && rounded_size <= 4 * probe_interval)
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+    {
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+      /* We don't use aarch64_sub_sp here because we don't want to
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+	 repeatedly load TEMP1.  */
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+      rtx step = GEN_INT (-probe_interval);
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+      if (probe_interval > ARITH_FACTOR)
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+	{
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+	  emit_move_insn (temp1, step);
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+	  step = temp1;
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+	}
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+
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+      for (HOST_WIDE_INT i = 0; i < rounded_size; i += probe_interval)
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+	{
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+	  rtx_insn *insn = emit_insn (gen_add2_insn (stack_pointer_rtx, step));
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+          add_reg_note (insn, REG_STACK_CHECK, const0_rtx);
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+
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+	  if (probe_interval > ARITH_FACTOR)
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+	    {
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+	      RTX_FRAME_RELATED_P (insn) = 1;
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+	      rtx adj = plus_constant (Pmode, stack_pointer_rtx, -probe_interval);
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+	      add_reg_note (insn, REG_CFA_ADJUST_CFA,
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+			    gen_rtx_SET (stack_pointer_rtx, adj));
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+	    }
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+
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+	  emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
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+					   (probe_interval
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+					    - GET_MODE_SIZE (word_mode))));
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+	  emit_insn (gen_blockage ());
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+	}
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+      dump_stack_clash_frame_info (PROBE_INLINE, size != rounded_size);
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+    }
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+  else if (rounded_size)
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+    {
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+      /* Compute the ending address.  */
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+      unsigned int scratchreg = REGNO (temp1);
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+      emit_move_insn (temp1, GEN_INT (-rounded_size));
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+      rtx_insn *insn
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+	 = emit_insn (gen_add3_insn (temp1, stack_pointer_rtx, temp1));
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+
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+      /* For the initial allocation, we don't have a frame pointer
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+	 set up, so we always need CFI notes.  If we're doing the
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+	 final allocation, then we may have a frame pointer, in which
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+	 case it is the CFA, otherwise we need CFI notes.
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+
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+	 We can determine which allocation we are doing by looking at
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+	 the temporary register.  IP0 is the initial allocation, IP1
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+	 is the final allocation.  */
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+      if (scratchreg == IP0_REGNUM || !frame_pointer_needed)
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+	{
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+	  /* We want the CFA independent of the stack pointer for the
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+	     duration of the loop.  */
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+	  add_reg_note (insn, REG_CFA_DEF_CFA,
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+			plus_constant (Pmode, temp1,
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+				       (rounded_size + (orig_size - size))));
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+	  RTX_FRAME_RELATED_P (insn) = 1;
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+	}
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+
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+      /* This allocates and probes the stack.
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+
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+	 It also probes at a 4k interval regardless of the value of
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+	 PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL.  */
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+      insn = emit_insn (gen_probe_stack_range (stack_pointer_rtx,
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+					       stack_pointer_rtx, temp1));
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+
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+      /* Now reset the CFA register if needed.  */
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+      if (scratchreg == IP0_REGNUM || !frame_pointer_needed)
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+	{
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+	  add_reg_note (insn, REG_CFA_DEF_CFA,
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+			plus_constant (Pmode, stack_pointer_rtx,
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+				       (rounded_size + (orig_size - size))));
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+	  RTX_FRAME_RELATED_P (insn) = 1;
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+	}
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+
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+      emit_insn (gen_blockage ());
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+      dump_stack_clash_frame_info (PROBE_LOOP, size != rounded_size);
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+    }
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+  else
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+    dump_stack_clash_frame_info (PROBE_INLINE, size != rounded_size);
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+
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+  /* Handle any residuals.
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+     Note that any residual must be probed.  */
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+  if (residual)
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+    {
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+      aarch64_sub_sp (temp1, temp2, residual, true);
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+      add_reg_note (get_last_insn (), REG_STACK_CHECK, const0_rtx);
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+      emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
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+				       (residual - GET_MODE_SIZE (word_mode))));
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+      emit_insn (gen_blockage ());
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+    }
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+  return;
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+}
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+
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 /* Add a REG_CFA_EXPRESSION note to INSN to say that register REG
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    is saved at BASE + OFFSET.  */
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@@ -4686,7 +4820,54 @@ aarch64_expand_prologue (void)
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   rtx ip0_rtx = gen_rtx_REG (Pmode, IP0_REGNUM);
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   rtx ip1_rtx = gen_rtx_REG (Pmode, IP1_REGNUM);
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-  aarch64_sub_sp (ip0_rtx, ip1_rtx, initial_adjust, true);
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+  /* We do not fully protect aarch64 against stack clash style attacks
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+     as doing so would be prohibitively expensive with less utility over
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+     time as newer compilers are deployed.
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+
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+     We assume the guard is at least 64k.  Furthermore, we assume that
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+     the caller has not pushed the stack pointer more than 1k into
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+     the guard.  A caller that pushes the stack pointer than 1k into
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+     the guard is considered invalid.
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+
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+     Note that the caller's ability to push the stack pointer into the
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+     guard is a function of the number and size of outgoing arguments and/or
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+     dynamic stack allocations due to the mandatory save of the link register
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+     in the caller's frame.
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+
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+     With those assumptions the callee can allocate up to 63k of stack
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+     space without probing.
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+
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+     When probing is needed, we emit a probe at the start of the prologue
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+     and every PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL bytes thereafter.
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+
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+     We have to track how much space has been allocated, but we do not
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+     track stores into the stack as implicit probes except for the
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+     fp/lr store.  */
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+  HOST_WIDE_INT guard_size
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+    = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
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+  HOST_WIDE_INT guard_used_by_caller = 1024;
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+  if (flag_stack_clash_protection)
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+    {
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+      if (known_eq (frame_size, 0))
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+	dump_stack_clash_frame_info (NO_PROBE_NO_FRAME, false);
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+      else if (known_lt (initial_adjust, guard_size - guard_used_by_caller)
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+	       && known_lt (final_adjust, guard_size - guard_used_by_caller))
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+	dump_stack_clash_frame_info (NO_PROBE_SMALL_FRAME, true);
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+    }
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+
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+  /* In theory we should never have both an initial adjustment
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+     and a callee save adjustment.  Verify that is the case since the
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+     code below does not handle it for -fstack-clash-protection.  */
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+  gcc_assert (known_eq (initial_adjust, 0) || callee_adjust == 0);
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+
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+  /* Only probe if the initial adjustment is larger than the guard
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+     less the amount of the guard reserved for use by the caller's
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+     outgoing args.  */
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+  if (flag_stack_clash_protection
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+      && maybe_ge (initial_adjust, guard_size - guard_used_by_caller))
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+    aarch64_allocate_and_probe_stack_space (ip0_rtx, ip1_rtx, initial_adjust);
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+  else
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+    aarch64_sub_sp (ip0_rtx, ip1_rtx, initial_adjust, true);
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   if (callee_adjust != 0)
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     aarch64_push_regs (reg1, reg2, callee_adjust);
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@@ -4742,7 +4923,31 @@ aarch64_expand_prologue (void)
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 			     callee_adjust != 0 || emit_frame_chain);
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   aarch64_save_callee_saves (DFmode, callee_offset, V0_REGNUM, V31_REGNUM,
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 			     callee_adjust != 0 || emit_frame_chain);
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-  aarch64_sub_sp (ip1_rtx, ip0_rtx, final_adjust, !frame_pointer_needed);
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+
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+  /* We may need to probe the final adjustment as well.  */
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+  if (flag_stack_clash_protection && maybe_ne (final_adjust, 0))
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+    {
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+      /* First probe if the final adjustment is larger than the guard size
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+	 less the amount of the guard reserved for use by the caller's
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+	 outgoing args.  */
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+      if (maybe_ge (final_adjust, guard_size - guard_used_by_caller))
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+	aarch64_allocate_and_probe_stack_space (ip1_rtx, ip0_rtx,
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+						final_adjust);
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+      else
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+	aarch64_sub_sp (ip1_rtx, ip0_rtx, final_adjust, !frame_pointer_needed);
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+
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+      /* We must also probe if the final adjustment is larger than the guard
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+	 that is assumed used by the caller.  This may be sub-optimal.  */
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+      if (maybe_ge (final_adjust, guard_used_by_caller))
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+	{
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+	  if (dump_file)
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+	    fprintf (dump_file,
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+		     "Stack clash aarch64 large outgoing arg, probing\n");
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+	  emit_stack_probe (stack_pointer_rtx);
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+	}
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+    }
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+  else
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+    aarch64_sub_sp (ip1_rtx, ip0_rtx, final_adjust, !frame_pointer_needed);
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 }
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 /* Return TRUE if we can use a simple_return insn.
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@@ -10476,6 +10681,12 @@ aarch64_override_options_internal (struct gcc_options *opts)
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       && opts->x_optimize >= aarch64_tune_params.prefetch->default_opt_level)
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     opts->x_flag_prefetch_loop_arrays = 1;
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+  /* We assume the guard page is 64k.  */
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+  maybe_set_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE,
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+			 16,
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+			 opts->x_param_values,
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+			 global_options_set.x_param_values);
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+
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   aarch64_override_options_after_change_1 (opts);
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 }
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@@ -17161,6 +17372,28 @@ aarch64_sched_can_speculate_insn (rtx_insn *insn)
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     }
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 }
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+/* It has been decided that to allow up to 1kb of outgoing argument
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+   space to be allocated w/o probing.  If more than 1kb of outgoing
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+   argment space is allocated, then it must be probed and the last
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+   probe must occur no more than 1kbyte away from the end of the
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+   allocated space.
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+
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+   This implies that the residual part of an alloca allocation may
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+   need probing in cases where the generic code might not otherwise
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+   think a probe is needed.
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+
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+   This target hook returns TRUE when allocating RESIDUAL bytes of
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+   alloca space requires an additional probe, otherwise FALSE is
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+   returned.  */
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+
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+static bool
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+aarch64_stack_clash_protection_final_dynamic_probe (rtx residual)
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+{
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+  return (residual == CONST0_RTX (Pmode)
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+	  || GET_CODE (residual) != CONST_INT
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+	  || INTVAL (residual) >= 1024);
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+}
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+
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 /* Implement TARGET_COMPUTE_PRESSURE_CLASSES.  */
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 static int
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@@ -17669,6 +17902,10 @@ aarch64_libgcc_floating_mode_supported_p
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 #undef TARGET_CONSTANT_ALIGNMENT
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 #define TARGET_CONSTANT_ALIGNMENT aarch64_constant_alignment
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+#undef TARGET_STACK_CLASH_PROTECTION_FINAL_DYNAMIC_PROBE
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+#define TARGET_STACK_CLASH_PROTECTION_FINAL_DYNAMIC_PROBE \
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+  aarch64_stack_clash_protection_final_dynamic_probe
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+
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 #undef TARGET_COMPUTE_PRESSURE_CLASSES
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 #define TARGET_COMPUTE_PRESSURE_CLASSES aarch64_compute_pressure_classes
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--- gcc/config/aarch64/aarch64.md
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+++ gcc/config/aarch64/aarch64.md
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@@ -5812,7 +5812,7 @@
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 )
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 (define_insn "probe_stack_range"
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-  [(set (match_operand:DI 0 "register_operand" "=r")
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+  [(set (match_operand:DI 0 "register_operand" "=rk")
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 	(unspec_volatile:DI [(match_operand:DI 1 "register_operand" "0")
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 			     (match_operand:DI 2 "register_operand" "r")]
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 			      UNSPECV_PROBE_STACK_RANGE))]
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--- gcc/testsuite/gcc.target/aarch64/stack-check-12.c
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+++ gcc/testsuite/gcc.target/aarch64/stack-check-12.c
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@@ -0,0 +1,20 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=12" } */
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+/* { dg-require-effective-target supports_stack_clash_protection } */
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+
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+extern void arf (unsigned long int *, unsigned long int *);
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+void
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+frob ()
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+{
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+  unsigned long int num[1000];
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+  unsigned long int den[1000];
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+  arf (den, num);
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+}
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+
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+/* This verifies that the scheduler did not break the dependencies
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+   by adjusting the offsets within the probe and that the scheduler
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+   did not reorder around the stack probes.  */
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+/* { dg-final { scan-assembler-times "sub\\tsp, sp, #4096\\n\\tstr\\txzr, .sp, 4088." 3 } } */
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+
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+
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+
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--- gcc/testsuite/gcc.target/aarch64/stack-check-13.c
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+++ gcc/testsuite/gcc.target/aarch64/stack-check-13.c
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@@ -0,0 +1,28 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=12" } */
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+/* { dg-require-effective-target supports_stack_clash_protection } */
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+
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+#define ARG32(X) X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X
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+#define ARG192(X) ARG32(X),ARG32(X),ARG32(X),ARG32(X),ARG32(X),ARG32(X)
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+void out1(ARG192(__int128));
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+int t1(int);
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+
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+int t3(int x)
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+{
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+  if (x < 1000)
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+    return t1 (x) + 1;
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+
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+  out1 (ARG192(1));
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+  return 0;
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+}
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+
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+
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+
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+/* This test creates a large (> 1k) outgoing argument area that needs
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+   to be probed.  We don't test the exact size of the space or the
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+   exact offset to make the test a little less sensitive to trivial
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+   output changes.  */
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+/* { dg-final { scan-assembler-times "sub\\tsp, sp, #....\\n\\tstr\\txzr, \\\[sp" 1 } } */
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+
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+
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+
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--- gcc/testsuite/gcc.target/aarch64/stack-check-14.c
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+++ gcc/testsuite/gcc.target/aarch64/stack-check-14.c
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@@ -0,0 +1,25 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=12" } */
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+/* { dg-require-effective-target supports_stack_clash_protection } */
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+
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+int t1(int);
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+
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+int t2(int x)
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+{
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+  char *p = __builtin_alloca (4050);
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+  x = t1 (x);
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+  return p[x];
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+}
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+
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+
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+/* This test has a constant sized alloca that is smaller than the
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+   probe interval.  But it actually requires two probes instead
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+   of one because of the optimistic assumptions we made in the
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+   aarch64 prologue code WRT probing state. 
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+
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+   The form can change quite a bit so we just check for two
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+   probes without looking at the actual address.  */
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+/* { dg-final { scan-assembler-times "str\\txzr," 2 } } */
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+
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+
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+
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--- gcc/testsuite/gcc.target/aarch64/stack-check-15.c
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+++ gcc/testsuite/gcc.target/aarch64/stack-check-15.c
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@@ -0,0 +1,24 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=12" } */
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+/* { dg-require-effective-target supports_stack_clash_protection } */
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+
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+int t1(int);
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+
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+int t2(int x)
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+{
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+  char *p = __builtin_alloca (x);
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+  x = t1 (x);
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+  return p[x];
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+}
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+
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+
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+/* This test has a variable sized alloca.  It requires 3 probes.
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+   One in the loop, one for the residual and at the end of the
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+   alloca area. 
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+
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+   The form can change quite a bit so we just check for two
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+   probes without looking at the actual address.  */
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+/* { dg-final { scan-assembler-times "str\\txzr," 3 } } */
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+
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+
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+
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--- gcc/testsuite/lib/target-supports.exp
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+++ gcc/testsuite/lib/target-supports.exp
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@@ -9201,14 +9201,9 @@ proc check_effective_target_autoincdec { } {
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 # 
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 proc check_effective_target_supports_stack_clash_protection { } {
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-   # Temporary until the target bits are fully ACK'd.
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-#  if { [istarget aarch*-*-*] } {
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-#	return 1
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-#  }
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-
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     if { [istarget x86_64-*-*] || [istarget i?86-*-*] 
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 	  || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
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-	  || [istarget s390*-*-*] } {
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+	  || [istarget aarch64*-**] || [istarget s390*-*-*] } {
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 	return 1
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     }
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   return 0
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@@ -9217,9 +9212,9 @@ proc check_effective_target_supports_stack_clash_protection { } {
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 # Return 1 if the target creates a frame pointer for non-leaf functions
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 # Note we ignore cases where we apply tail call optimization here.
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 proc check_effective_target_frame_pointer_for_non_leaf { } {
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-  if { [istarget aarch*-*-*] } {
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-	return 1
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-  }
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+#  if { [istarget aarch*-*-*] } {
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+#	return 1
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+#  }
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   # Solaris/x86 defaults to -fno-omit-frame-pointer.
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   if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {