Blame SOURCES/gcc8-htm-in-asm.patch

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--- libitm/config/x86/target.h.jj	2013-06-23 20:43:50.000000000 +0200
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+++ libitm/config/x86/target.h	2013-08-13 17:14:57.540012109 +0200
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@@ -64,7 +64,7 @@ cpu_relax (void)
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 // Use Intel RTM if supported by the assembler.
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 // See gtm_thread::begin_transaction for how these functions are used.
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-#ifdef HAVE_AS_RTM
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+#if 1 /* def HAVE_AS_RTM */
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 #define USE_HTM_FASTPATH
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 #ifdef __x86_64__
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 // Use the custom fastpath in ITM_beginTransaction.
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@@ -97,7 +97,10 @@ htm_init ()
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 static inline uint32_t
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 htm_begin ()
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 {
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-  return _xbegin();
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+//  return _xbegin();
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+  uint32_t ret;
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+  __asm volatile ("movl $-1, %%eax; .byte 0xc7, 0xf8, 0, 0, 0, 0" : "=a" (ret) : : "memory");
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+  return ret;
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 }
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 static inline bool
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@@ -109,7 +112,8 @@ htm_begin_success (uint32_t begin_ret)
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 static inline void
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 htm_commit ()
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 {
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-  _xend();
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+//  _xend();
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+  __asm volatile (".byte 0x0f, 0x01, 0xd5" : : : "memory");
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 }
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 static inline void
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@@ -117,7 +121,8 @@ htm_abort ()
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 {
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   // ??? According to a yet unpublished ABI rule, 0xff is reserved and
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   // supposed to signal a busy lock.  Source: andi.kleen@intel.com
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-  _xabort(0xff);
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+//  _xabort(0xff);
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+  __asm volatile (".byte 0xc6, 0xf8, 0xff" : : : "memory");
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 }
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 static inline bool
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@@ -130,7 +135,10 @@ htm_abort_should_retry (uint32_t begin_r
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 static inline bool
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 htm_transaction_active ()
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 {
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-  return _xtest() != 0;
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+//  return _xtest() != 0;
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+  bool ret;
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+  __asm volatile (".byte 0x0f, 0x01, 0xd6; setne %%al" : "=a" (ret) : : "memory");
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+  return ret;
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 }
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 #endif
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