Blame SOURCES/x86_64-native-linuxapp-gcc-config

983ab1
# -*- cfg-sha: 2ba93102021dc5d38494cf5090c3ecaca37db13153dd558b1511a56f2a3d9b10
983ab1
# SPDX-License-Identifier: BSD-3-Clause
983ab1
# Copyright(c) 2010-2014 Intel Corporation
983ab1
# SPDX-License-Identifier: BSD-3-Clause
983ab1
# Copyright(c) 2010-2016 Intel Corporation
983ab1
# SPDX-License-Identifier: BSD-3-Clause
983ab1
# Copyright(c) 2010-2017 Intel Corporation
d76f50
# RTE_EXEC_ENV values are the directories in mk/exec-env/
d76f50
CONFIG_RTE_EXEC_ENV="linuxapp"
d76f50
# RTE_ARCH values are architecture we compile for. directories in mk/arch/
d76f50
CONFIG_RTE_ARCH="x86_64"
d76f50
# machine can define specific variables or action for a specific board
d76f50
# RTE_MACHINE values are architecture we compile for. directories in mk/machine/
d76f50
CONFIG_RTE_MACHINE="default"
d76f50
# The compiler we use.
d76f50
# RTE_TOOLCHAIN values are architecture we compile for. directories in mk/toolchain/
d76f50
CONFIG_RTE_TOOLCHAIN="gcc"
d76f50
# Use intrinsics or assembly code for key routines
d76f50
CONFIG_RTE_FORCE_INTRINSICS=n
d76f50
# Machine forces strict alignment constraints.
d76f50
CONFIG_RTE_ARCH_STRICT_ALIGN=n
d76f50
# Compile to share library
d76f50
CONFIG_RTE_BUILD_SHARED_LIB=y
d76f50
# Use newest code breaking previous ABI
d76f50
CONFIG_RTE_NEXT_ABI=n
d76f50
# Major ABI to overwrite library specific LIBABIVER
d76f50
CONFIG_RTE_MAJOR_ABI=
d76f50
# Machine's cache line size
d76f50
CONFIG_RTE_CACHE_LINE_SIZE=64
983ab1
# Memory model
983ab1
CONFIG_RTE_USE_C11_MEM_MODEL=n
d76f50
# Compile Environment Abstraction Layer
d76f50
CONFIG_RTE_LIBRTE_EAL=y
d76f50
CONFIG_RTE_MAX_LCORE=128
d76f50
CONFIG_RTE_MAX_NUMA_NODES=8
983ab1
CONFIG_RTE_MAX_HEAPS=32
983ab1
CONFIG_RTE_MAX_MEMSEG_LISTS=64
983ab1
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
983ab1
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
983ab1
CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192
983ab1
CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768
983ab1
# a "type" is a combination of page size and NUMA node. total number of memseg
983ab1
# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split
983ab1
# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or
983ab1
# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of
983ab1
# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller
983ab1
CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768
983ab1
CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072
983ab1
# global maximum usable amount of VA, in megabytes
983ab1
CONFIG_RTE_MAX_MEM_MB=524288
d76f50
CONFIG_RTE_MAX_MEMZONE=2560
d76f50
CONFIG_RTE_MAX_TAILQ=32
d76f50
CONFIG_RTE_ENABLE_ASSERT=n
d76f50
CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
d76f50
CONFIG_RTE_LOG_HISTORY=256
d76f50
CONFIG_RTE_BACKTRACE=y
d76f50
CONFIG_RTE_LIBEAL_USE_HPET=n
d76f50
CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
d76f50
CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
d76f50
CONFIG_RTE_EAL_IGB_UIO=n
d76f50
CONFIG_RTE_EAL_VFIO=y
983ab1
CONFIG_RTE_MAX_VFIO_GROUPS=64
983ab1
CONFIG_RTE_MAX_VFIO_CONTAINERS=64
d76f50
CONFIG_RTE_MALLOC_DEBUG=n
d76f50
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=y
983ab1
CONFIG_RTE_USE_LIBBSD=n
d76f50
# Recognize/ignore architecture we compile for. AVX/AVX512 CPU flags for performance/power testing.
d76f50
# AVX512 is marked as experimental for now, will enable it after enough
d76f50
# field test and possible optimization.
d76f50
CONFIG_RTE_ENABLE_AVX=y
d76f50
CONFIG_RTE_ENABLE_AVX512=n
d76f50
# Default driver path (or "" to disable)
d76f50
CONFIG_RTE_EAL_PMD_PATH="/usr/lib64/dpdk-pmds"
d76f50
# Compile Environment Abstraction Layer to support Vmware TSC map
d76f50
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
d76f50
# Compile architecture we compile for. PCI library
d76f50
CONFIG_RTE_LIBRTE_PCI=y
d76f50
# Compile architecture we compile for. argument parser library
d76f50
CONFIG_RTE_LIBRTE_KVARGS=y
d76f50
# Compile generic ethernet library
d76f50
CONFIG_RTE_LIBRTE_ETHER=y
d76f50
CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
d76f50
CONFIG_RTE_MAX_ETHPORTS=32
d76f50
CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
d76f50
CONFIG_RTE_LIBRTE_IEEE1588=n
d76f50
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
d76f50
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
983ab1
CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n
d76f50
# Turn off Tx preparation stage
d76f50
# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
d76f50
# driver which do not implement any Tx preparation.
d76f50
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
983ab1
# Common libraries, before Bus/PMDs
983ab1
CONFIG_RTE_LIBRTE_COMMON_DPAAX=n
983ab1
# Compile architecture we compile for. Intel FPGA bus
983ab1
CONFIG_RTE_LIBRTE_IFPGA_BUS=n
d76f50
# Compile PCI bus driver
d76f50
CONFIG_RTE_LIBRTE_PCI_BUS=y
d76f50
# Compile architecture we compile for. vdev bus
d76f50
CONFIG_RTE_LIBRTE_VDEV_BUS=y
983ab1
# Compile ARK PMD
983ab1
CONFIG_RTE_LIBRTE_ARK_PMD=n
983ab1
CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
983ab1
CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
983ab1
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
983ab1
# Compile Aquantia Atlantic PMD driver
983ab1
CONFIG_RTE_LIBRTE_ATLANTIC_PMD=n
983ab1
# Compile AMD PMD
983ab1
CONFIG_RTE_LIBRTE_AXGBE_PMD=n
983ab1
CONFIG_RTE_LIBRTE_AXGBE_PMD_DEBUG=n
983ab1
# Compile burst-oriented Broadcom PMD driver
983ab1
CONFIG_RTE_LIBRTE_BNX2X_PMD=n
983ab1
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
983ab1
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
983ab1
# Compile burst-oriented Broadcom BNXT PMD driver
983ab1
CONFIG_RTE_LIBRTE_BNXT_PMD=y
983ab1
# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
983ab1
CONFIG_RTE_LIBRTE_CXGBE_PMD=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
983ab1
# NXP DPAA Bus
983ab1
CONFIG_RTE_LIBRTE_DPAA_BUS=n
983ab1
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
983ab1
CONFIG_RTE_LIBRTE_DPAA_PMD=n
983ab1
CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
983ab1
# Compile NXP DPAA2 FSL-MC Bus
983ab1
CONFIG_RTE_LIBRTE_FSLMC_BUS=n
983ab1
# Compile Support Libraries for NXP DPAA2
983ab1
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
983ab1
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
983ab1
# Compile burst-oriented NXP DPAA2 PMD driver
983ab1
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
983ab1
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
983ab1
# Compile NXP ENETC PMD Driver
983ab1
CONFIG_RTE_LIBRTE_ENETC_PMD=n
d76f50
# Compile burst-oriented Amazon ENA PMD driver
d76f50
CONFIG_RTE_LIBRTE_ENA_PMD=n
d76f50
CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
d76f50
CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
983ab1
# Compile burst-oriented Cisco ENIC PMD driver
983ab1
CONFIG_RTE_LIBRTE_ENIC_PMD=y
d76f50
# Compile burst-oriented IGB & EM PMD drivers
d76f50
CONFIG_RTE_LIBRTE_EM_PMD=n
d76f50
CONFIG_RTE_LIBRTE_IGB_PMD=y
d76f50
CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
d76f50
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
d76f50
# Compile burst-oriented IXGBE PMD driver
d76f50
CONFIG_RTE_LIBRTE_IXGBE_PMD=y
d76f50
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
d76f50
CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
d76f50
CONFIG_RTE_IXGBE_INC_VECTOR=y
d76f50
CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
d76f50
# Compile burst-oriented I40E PMD driver
d76f50
CONFIG_RTE_LIBRTE_I40E_PMD=y
d76f50
CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
d76f50
CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
d76f50
CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
d76f50
CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
d76f50
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
d76f50
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
d76f50
# Compile burst-oriented FM10K PMD
d76f50
CONFIG_RTE_LIBRTE_FM10K_PMD=n
d76f50
CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
d76f50
CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
d76f50
CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
983ab1
# Compile burst-oriented AVF PMD driver
983ab1
CONFIG_RTE_LIBRTE_AVF_PMD=n
983ab1
CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y
983ab1
CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n
983ab1
CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n
d76f50
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
c7ffa4
CONFIG_RTE_LIBRTE_MLX4_PMD=y
d76f50
CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
c7ffa4
CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=y
983ab1
# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5 & Bluefield
983ab1
# (MLX5) PMD
c7ffa4
CONFIG_RTE_LIBRTE_MLX5_PMD=y
d76f50
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
c7ffa4
CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=y
d76f50
# Compile burst-oriented Netronome NFP PMD driver
c7ffa4
CONFIG_RTE_LIBRTE_NFP_PMD=y
983ab1
CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n
983ab1
# QLogic 10G/25G/40G/50G/100G PMD
983ab1
CONFIG_RTE_LIBRTE_QEDE_PMD=y
983ab1
CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
983ab1
#Provides abs path/name of architecture we compile for. firmware file.
983ab1
#Empty string denotes driver will use default firmware
983ab1
CONFIG_RTE_LIBRTE_QEDE_FW=""
d76f50
# Compile burst-oriented Solarflare libefx-based PMD
d76f50
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
d76f50
CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
d76f50
# Compile software PMD backed by SZEDATA2 device
d76f50
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
d76f50
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
d76f50
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n
d76f50
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
d76f50
# Compile burst-oriented Cavium LiquidIO PMD driver
d76f50
CONFIG_RTE_LIBRTE_LIO_PMD=n
d76f50
CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
d76f50
CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
d76f50
# Compile burst-oriented Cavium OCTEONTX network PMD driver
d76f50
CONFIG_RTE_LIBRTE_OCTEONTX_PMD=n
983ab1
# Compile WRS accelerated virtual port (AVP) guest PMD driver
983ab1
CONFIG_RTE_LIBRTE_AVP_PMD=n
983ab1
CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
d76f50
# Compile burst-oriented VIRTIO PMD driver
d76f50
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
d76f50
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
d76f50
# Compile virtio device emulation inside virtio PMD driver
983ab1
CONFIG_RTE_VIRTIO_USER=n
d76f50
# Compile burst-oriented VMXNET3 PMD driver
d76f50
CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
d76f50
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
983ab1
# Compile software PMD backed by AF_PACKET sockets (Linux only)
983ab1
CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
d76f50
# Compile link bonding PMD library
d76f50
CONFIG_RTE_LIBRTE_PMD_BOND=n
d76f50
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
d76f50
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
d76f50
# Compile fail-safe PMD
d76f50
CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
983ab1
# Compile Marvell PMD driver
983ab1
CONFIG_RTE_LIBRTE_MVPP2_PMD=n
983ab1
# Compile Marvell MVNETA PMD driver
983ab1
CONFIG_RTE_LIBRTE_MVNETA_PMD=n
983ab1
# Compile support for VMBus library
983ab1
CONFIG_RTE_LIBRTE_VMBUS=y
983ab1
# Compile native PMD for Hyper-V/Azure
983ab1
CONFIG_RTE_LIBRTE_NETVSC_PMD=y
983ab1
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n
983ab1
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n
983ab1
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n
983ab1
# Compile virtual device driver for NetVSC on Hyper-V/Azure
983ab1
CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=y
983ab1
# Compile null PMD
983ab1
CONFIG_RTE_LIBRTE_PMD_NULL=n
983ab1
# Compile software PMD backed by PCAP files
983ab1
CONFIG_RTE_LIBRTE_PMD_PCAP=n
983ab1
# Compile example software rings based PMD
983ab1
CONFIG_RTE_LIBRTE_PMD_RING=y
983ab1
CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
983ab1
CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
983ab1
# Compile SOFTNIC PMD
983ab1
CONFIG_RTE_LIBRTE_PMD_SOFTNIC=n
983ab1
# Compile architecture we compile for. TAP PMD
983ab1
# It is enabled by default for Linux only.
983ab1
CONFIG_RTE_LIBRTE_PMD_TAP=y
d76f50
# Do prefetch of packet data within PMD driver receive function
d76f50
CONFIG_RTE_PMD_PACKET_PREFETCH=y
983ab1
# Compile generic wireless base band device library
983ab1
# EXPERIMENTAL: API may change without prior notice
983ab1
CONFIG_RTE_LIBRTE_BBDEV=n
983ab1
CONFIG_RTE_BBDEV_MAX_DEVS=128
983ab1
CONFIG_RTE_BBDEV_OFFLOAD_COST=n
983ab1
# Compile PMD for NULL bbdev device
9e1a2a
CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=n
983ab1
# Compile PMD for turbo software bbdev device
983ab1
CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n
d76f50
# Compile generic crypto device library
983ab1
CONFIG_RTE_LIBRTE_CRYPTODEV=n
d76f50
CONFIG_RTE_CRYPTO_MAX_DEVS=64
d76f50
# Compile PMD for ARMv8 Crypto device
d76f50
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
d76f50
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
983ab1
# Compile NXP CAAM JR crypto Driver
983ab1
CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
983ab1
CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n
d76f50
# Compile NXP DPAA2 crypto sec driver for CAAM HW
d76f50
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
d76f50
# NXP DPAA caam - crypto driver
d76f50
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
983ab1
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
983ab1
# Compile PMD for Cavium OCTEON TX crypto device
9e1a2a
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=n
983ab1
# Compile PMD for QuickAssist based devices - see docs for details
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT=n
983ab1
CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
983ab1
# Max. number of QuickAssist devices, which can be detected and attached
983ab1
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
983ab1
CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
983ab1
CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
983ab1
# Compile PMD for virtio crypto devices
983ab1
CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO=n
983ab1
# Number of maximum virtio crypto devices
983ab1
CONFIG_RTE_MAX_VIRTIO_CRYPTO=32
d76f50
# Compile PMD for AESNI backed device
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
d76f50
# Compile PMD for Software backed device
d76f50
CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
d76f50
# Compile PMD for AESNI GCM device
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
d76f50
# Compile PMD for SNOW 3G device
d76f50
CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
d76f50
CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
d76f50
# Compile PMD for KASUMI device
d76f50
CONFIG_RTE_LIBRTE_PMD_KASUMI=n
d76f50
# Compile PMD for ZUC device
d76f50
CONFIG_RTE_LIBRTE_PMD_ZUC=n
d76f50
# Compile PMD for Crypto Scheduler device
d76f50
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=n
d76f50
# Compile PMD for NULL Crypto device
d76f50
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=n
983ab1
# Compile PMD for AMD CCP crypto device
983ab1
CONFIG_RTE_LIBRTE_PMD_CCP=n
d76f50
# Compile PMD for Marvell Crypto device
983ab1
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
d76f50
# Compile generic security library
983ab1
CONFIG_RTE_LIBRTE_SECURITY=n
983ab1
# Compile generic compression device library
983ab1
CONFIG_RTE_LIBRTE_COMPRESSDEV=n
983ab1
CONFIG_RTE_COMPRESS_MAX_DEVS=64
983ab1
# Compile compressdev unit test
983ab1
CONFIG_RTE_COMPRESSDEV_TEST=n
983ab1
# Compile PMD for Octeontx ZIPVF compression device
983ab1
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=n
983ab1
# Compile PMD for ISA-L compression device
983ab1
CONFIG_RTE_LIBRTE_PMD_ISAL=n
983ab1
# Compile PMD for ZLIB compression device
983ab1
CONFIG_RTE_LIBRTE_PMD_ZLIB=n
d76f50
# Compile generic event device library
983ab1
CONFIG_RTE_LIBRTE_EVENTDEV=n
d76f50
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
d76f50
CONFIG_RTE_EVENT_MAX_DEVS=16
d76f50
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
983ab1
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
983ab1
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
983ab1
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
983ab1
CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32
d76f50
# Compile PMD for skeleton event device
d76f50
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=n
d76f50
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
d76f50
# Compile PMD for software event device
d76f50
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=n
983ab1
# Compile PMD for distributed software event device
983ab1
CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=n
d76f50
# Compile PMD for octeontx sso event device
d76f50
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=n
983ab1
# Compile PMD for OPDL event device
983ab1
CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV=n
983ab1
# Compile PMD for NXP DPAA event device
983ab1
CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
983ab1
# Compile PMD for NXP DPAA2 event device
983ab1
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
983ab1
# Compile raw device support
983ab1
# EXPERIMENTAL: API may change without prior notice
983ab1
CONFIG_RTE_LIBRTE_RAWDEV=n
983ab1
CONFIG_RTE_RAWDEV_MAX_DEVS=10
983ab1
CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=n
983ab1
# Compile PMD for NXP DPAA2 CMDIF raw device
983ab1
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=n
983ab1
# Compile PMD for NXP DPAA2 QDMA raw device
983ab1
CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n
983ab1
# Compile PMD for Intel FPGA raw device
983ab1
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n
d76f50
# Compile librte_ring
d76f50
CONFIG_RTE_LIBRTE_RING=y
d76f50
# Compile librte_mempool
d76f50
CONFIG_RTE_LIBRTE_MEMPOOL=y
d76f50
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
d76f50
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
d76f50
# Compile Mempool drivers
983ab1
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=y
983ab1
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=64
d76f50
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
d76f50
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
d76f50
# Compile PMD for octeontx fpa mempool device
983ab1
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=n
d76f50
# Compile librte_mbuf
d76f50
CONFIG_RTE_LIBRTE_MBUF=y
d76f50
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
d76f50
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
d76f50
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
d76f50
CONFIG_RTE_PKTMBUF_HEADROOM=128
d76f50
# Compile librte_timer
983ab1
CONFIG_RTE_LIBRTE_TIMER=n
d76f50
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
d76f50
# Compile librte_cfgfile
983ab1
CONFIG_RTE_LIBRTE_CFGFILE=n
d76f50
# Compile librte_cmdline
d76f50
CONFIG_RTE_LIBRTE_CMDLINE=y
d76f50
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
d76f50
# Compile librte_hash
d76f50
CONFIG_RTE_LIBRTE_HASH=y
d76f50
CONFIG_RTE_LIBRTE_HASH_DEBUG=n
d76f50
# Compile librte_efd
983ab1
CONFIG_RTE_LIBRTE_EFD=n
d76f50
# Compile librte_member
d76f50
CONFIG_RTE_LIBRTE_MEMBER=y
d76f50
# Compile librte_jobstats
983ab1
CONFIG_RTE_LIBRTE_JOBSTATS=n
d76f50
# Compile architecture we compile for. device metrics library
d76f50
CONFIG_RTE_LIBRTE_METRICS=y
d76f50
# Compile architecture we compile for. bitrate statistics library
d76f50
CONFIG_RTE_LIBRTE_BITRATE=y
d76f50
# Compile architecture we compile for. latency statistics library
d76f50
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
983ab1
# Compile librte_telemetry
983ab1
CONFIG_RTE_LIBRTE_TELEMETRY=n
d76f50
# Compile librte_lpm
983ab1
CONFIG_RTE_LIBRTE_LPM=n
d76f50
CONFIG_RTE_LIBRTE_LPM_DEBUG=n
d76f50
# Compile librte_acl
983ab1
CONFIG_RTE_LIBRTE_ACL=n
d76f50
CONFIG_RTE_LIBRTE_ACL_DEBUG=n
d76f50
# Compile librte_power
983ab1
CONFIG_RTE_LIBRTE_POWER=n
d76f50
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
d76f50
CONFIG_RTE_MAX_LCORE_FREQS=64
d76f50
# Compile librte_net
d76f50
CONFIG_RTE_LIBRTE_NET=y
d76f50
# Compile librte_ip_frag
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG=y
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
d76f50
# Compile GRO library
d76f50
CONFIG_RTE_LIBRTE_GRO=y
d76f50
# Compile GSO library
d76f50
CONFIG_RTE_LIBRTE_GSO=y
d76f50
# Compile librte_meter
d76f50
CONFIG_RTE_LIBRTE_METER=y
d76f50
# Compile librte_classify
983ab1
CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=n
d76f50
# Compile librte_sched
983ab1
CONFIG_RTE_LIBRTE_SCHED=n
d76f50
CONFIG_RTE_SCHED_DEBUG=n
d76f50
CONFIG_RTE_SCHED_RED=n
d76f50
CONFIG_RTE_SCHED_COLLECT_STATS=n
d76f50
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
d76f50
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
d76f50
CONFIG_RTE_SCHED_VECTOR=n
d76f50
# Compile architecture we compile for. distributor library
983ab1
CONFIG_RTE_LIBRTE_DISTRIBUTOR=n
d76f50
# Compile architecture we compile for. reorder library
983ab1
CONFIG_RTE_LIBRTE_REORDER=n
d76f50
# Compile librte_port
983ab1
CONFIG_RTE_LIBRTE_PORT=n
d76f50
CONFIG_RTE_PORT_STATS_COLLECT=n
d76f50
CONFIG_RTE_PORT_PCAP=n
d76f50
# Compile librte_table
983ab1
CONFIG_RTE_LIBRTE_TABLE=n
d76f50
CONFIG_RTE_TABLE_STATS_COLLECT=n
d76f50
# Compile librte_pipeline
983ab1
CONFIG_RTE_LIBRTE_PIPELINE=n
d76f50
CONFIG_RTE_PIPELINE_STATS_COLLECT=n
d76f50
# Compile librte_kni
d76f50
CONFIG_RTE_LIBRTE_KNI=n
d76f50
CONFIG_RTE_LIBRTE_PMD_KNI=n
d76f50
CONFIG_RTE_KNI_KMOD=n
d76f50
CONFIG_RTE_KNI_KMOD_ETHTOOL=n
d76f50
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
d76f50
# Compile architecture we compile for. pdump library
d76f50
CONFIG_RTE_LIBRTE_PDUMP=y
d76f50
# Compile vhost user library
d76f50
CONFIG_RTE_LIBRTE_VHOST=y
d76f50
CONFIG_RTE_LIBRTE_VHOST_NUMA=y
d76f50
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
d76f50
# Compile vhost PMD
d76f50
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
d76f50
CONFIG_RTE_LIBRTE_PMD_VHOST=y
983ab1
# Compile IFC driver
983ab1
# To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO
983ab1
# should be enabled.
983ab1
CONFIG_RTE_LIBRTE_IFC_PMD=n
983ab1
# Compile librte_bpf
983ab1
CONFIG_RTE_LIBRTE_BPF=n
983ab1
# allow load BPF from ELF files (requires libelf)
983ab1
CONFIG_RTE_LIBRTE_BPF_ELF=n
d76f50
# Compile architecture we compile for. test application
d76f50
CONFIG_RTE_APP_TEST=y
d76f50
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
983ab1
# Compile architecture we compile for. procinfo application
983ab1
CONFIG_RTE_PROC_INFO=y
d76f50
# Compile architecture we compile for. PMD test application
d76f50
CONFIG_RTE_TEST_PMD=y
d76f50
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
d76f50
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
983ab1
# Compile architecture we compile for. bbdev test application
983ab1
CONFIG_RTE_TEST_BBDEV=n
d76f50
# Compile architecture we compile for. crypto performance application
983ab1
CONFIG_RTE_APP_CRYPTO_PERF=n
d76f50
# Compile architecture we compile for. eventdev application
983ab1
CONFIG_RTE_APP_EVENTDEV=n
d76f50
CONFIG_RTE_EXEC_ENV_LINUXAPP=y
983ab1
CONFIG_RTE_LIBRTE_VHOST_POSTCOPY=n
983ab1
# Common libraries, before Bus/PMDs
983ab1
# NXP DPAA BUS and drivers
983ab1
# NXP FSLMC BUS and DPAA2 drivers
983ab1
# NXP ENETC PMD Driver
d76f50
CONFIG_RTE_ARCH_X86_64=y
d76f50
CONFIG_RTE_ARCH_X86=y
d76f50
CONFIG_RTE_ARCH_64=y
d76f50
CONFIG_RTE_TOOLCHAIN_GCC=y
d76f50
CONFIG_RTE_LIBRTE_PMD_XENVIRT=n