Blame SOURCES/arm64-armv8a-linuxapp-gcc-config

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# -*- cfg-sha: 0f73161964ec9ad68f1ea9715e8143248e5b244d51386ead6ce15d559c8bd4e1
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# BSD LICENSE
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# Copyright (C) Cavium, Inc 2015. All rights reserved.
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of Cavium, Inc nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# BSD LICENSE
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# Copyright (C) Cavium, Inc 2017. All rights reserved.
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of Cavium, Inc nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# BSD LICENSE
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# Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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# All rights reserved.
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of Intel Corporation nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# BSD LICENSE
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# Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
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# All rights reserved.
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of Intel Corporation nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# RTE_EXEC_ENV values are the directories in mk/exec-env/
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CONFIG_RTE_EXEC_ENV="linuxapp"
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# RTE_ARCH values are architecture we compile for. directories in mk/arch/
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CONFIG_RTE_ARCH="arm64"
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# machine can define specific variables or action for a specific board
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# RTE_MACHINE values are architecture we compile for. directories in mk/machine/
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CONFIG_RTE_MACHINE="armv8a"
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# The compiler we use.
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# RTE_TOOLCHAIN values are architecture we compile for. directories in mk/toolchain/
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CONFIG_RTE_TOOLCHAIN="gcc"
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# Use intrinsics or assembly code for key routines
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CONFIG_RTE_FORCE_INTRINSICS=y
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# Machine forces strict alignment constraints.
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CONFIG_RTE_ARCH_STRICT_ALIGN=n
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# Compile to share library
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CONFIG_RTE_BUILD_SHARED_LIB=y
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# Use newest code breaking previous ABI
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CONFIG_RTE_NEXT_ABI=n
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# Major ABI to overwrite library specific LIBABIVER
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CONFIG_RTE_MAJOR_ABI=
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# Machine's cache line size
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CONFIG_RTE_CACHE_LINE_SIZE=128
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# Compile Environment Abstraction Layer
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CONFIG_RTE_LIBRTE_EAL=y
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CONFIG_RTE_MAX_LCORE=128
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CONFIG_RTE_MAX_NUMA_NODES=8
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CONFIG_RTE_MAX_MEMSEG=256
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CONFIG_RTE_MAX_MEMZONE=2560
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CONFIG_RTE_MAX_TAILQ=32
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CONFIG_RTE_ENABLE_ASSERT=n
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CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO
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CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
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CONFIG_RTE_LOG_HISTORY=256
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CONFIG_RTE_BACKTRACE=y
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CONFIG_RTE_LIBEAL_USE_HPET=n
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CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
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CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
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CONFIG_RTE_EAL_IGB_UIO=n
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CONFIG_RTE_EAL_VFIO=y
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CONFIG_RTE_MALLOC_DEBUG=n
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CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=y
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# Recognize/ignore architecture we compile for. AVX/AVX512 CPU flags for performance/power testing.
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# AVX512 is marked as experimental for now, will enable it after enough
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# field test and possible optimization.
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CONFIG_RTE_ENABLE_AVX=y
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CONFIG_RTE_ENABLE_AVX512=n
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# Default driver path (or "" to disable)
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CONFIG_RTE_EAL_PMD_PATH="/usr/lib64/dpdk-pmds"
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# Compile Environment Abstraction Layer to support Vmware TSC map
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CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
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# Compile architecture we compile for. PCI library
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CONFIG_RTE_LIBRTE_PCI=y
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# Compile architecture we compile for. argument parser library
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CONFIG_RTE_LIBRTE_KVARGS=y
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# Compile generic ethernet library
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CONFIG_RTE_LIBRTE_ETHER=y
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CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
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CONFIG_RTE_MAX_ETHPORTS=32
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CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
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CONFIG_RTE_LIBRTE_IEEE1588=n
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CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
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CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
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CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n
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# Turn off Tx preparation stage
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# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
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# driver which do not implement any Tx preparation.
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CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
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# Compile PCI bus driver
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CONFIG_RTE_LIBRTE_PCI_BUS=y
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# Compile architecture we compile for. vdev bus
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CONFIG_RTE_LIBRTE_VDEV_BUS=y
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# Compile burst-oriented Amazon ENA PMD driver
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CONFIG_RTE_LIBRTE_ENA_PMD=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
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# Compile burst-oriented IGB & EM PMD drivers
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CONFIG_RTE_LIBRTE_EM_PMD=n
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CONFIG_RTE_LIBRTE_IGB_PMD=y
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CONFIG_RTE_LIBRTE_E1000_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
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# Compile burst-oriented IXGBE PMD driver
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CONFIG_RTE_LIBRTE_IXGBE_PMD=y
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
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CONFIG_RTE_IXGBE_INC_VECTOR=y
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CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
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# Compile burst-oriented I40E PMD driver
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CONFIG_RTE_LIBRTE_I40E_PMD=y
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CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
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CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
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CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
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CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
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CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4
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CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
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# interval up to 8160 us, aligned to 2 (or default value)
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CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
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# Compile burst-oriented FM10K PMD
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CONFIG_RTE_LIBRTE_FM10K_PMD=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
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CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
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# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
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CONFIG_RTE_LIBRTE_MLX4_PMD=n
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CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
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CONFIG_RTE_LIBRTE_MLX4_DEBUG_BROKEN_VERBS=n
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CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n
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CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8
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# Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD
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CONFIG_RTE_LIBRTE_MLX5_PMD=n
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CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
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CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n
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CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8
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# Compile burst-oriented Broadcom PMD driver
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CONFIG_RTE_LIBRTE_BNX2X_PMD=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
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# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
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CONFIG_RTE_LIBRTE_CXGBE_PMD=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
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# Compile burst-oriented Cisco ENIC PMD driver
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CONFIG_RTE_LIBRTE_ENIC_PMD=n
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CONFIG_RTE_LIBRTE_ENIC_DEBUG=n
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CONFIG_RTE_LIBRTE_ENIC_DEBUG_FLOW=n
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# Compile burst-oriented Netronome NFP PMD driver
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CONFIG_RTE_LIBRTE_NFP_PMD=n
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CONFIG_RTE_LIBRTE_NFP_DEBUG=n
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# Compile Marvell PMD driver
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CONFIG_RTE_LIBRTE_MRVL_PMD=n
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# Compile burst-oriented Broadcom BNXT PMD driver
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CONFIG_RTE_LIBRTE_BNXT_PMD=n
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# Compile burst-oriented Solarflare libefx-based PMD
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CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
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CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
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# Compile SOFTNIC PMD
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CONFIG_RTE_LIBRTE_PMD_SOFTNIC=y
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# Compile software PMD backed by SZEDATA2 device
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CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
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# Defines firmware type address space.
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# See documentation for supported values.
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# Other values raise compile time error.
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CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
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# Compile burst-oriented Cavium Thunderx NICVF PMD driver
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n
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# Compile burst-oriented Cavium LiquidIO PMD driver
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CONFIG_RTE_LIBRTE_LIO_PMD=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
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# NXP DPAA Bus
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CONFIG_RTE_LIBRTE_DPAA_BUS=n
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CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
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CONFIG_RTE_LIBRTE_DPAA_PMD=n
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# Compile burst-oriented Cavium OCTEONTX network PMD driver
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CONFIG_RTE_LIBRTE_OCTEONTX_PMD=n
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CONFIG_RTE_LIBRTE_OCTEONTX_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_OCTEONTX_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_OCTEONTX_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_OCTEONTX_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_OCTEONTX_DEBUG_MBOX=n
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# Compile NXP DPAA2 FSL-MC Bus
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CONFIG_RTE_LIBRTE_FSLMC_BUS=n
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# Compile Support Libraries for NXP DPAA2
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CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
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CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
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# Compile burst-oriented NXP DPAA2 PMD driver
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CONFIG_RTE_LIBRTE_DPAA2_PMD=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
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# Compile burst-oriented VIRTIO PMD driver
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CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
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# Compile virtio device emulation inside virtio PMD driver
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CONFIG_RTE_VIRTIO_USER=y
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# Compile burst-oriented VMXNET3 PMD driver
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CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_DRIVER=n
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# Compile example software rings based PMD
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CONFIG_RTE_LIBRTE_PMD_RING=y
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CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
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CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
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# Compile software PMD backed by PCAP files
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CONFIG_RTE_LIBRTE_PMD_PCAP=n
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# Compile link bonding PMD library
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CONFIG_RTE_LIBRTE_PMD_BOND=n
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CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
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CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
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# QLogic 10G/25G/40G/50G/100G PMD
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CONFIG_RTE_LIBRTE_QEDE_PMD=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_INFO=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_QEDE_VF_TX_SWITCH=y
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#Provides abs path/name of architecture we compile for. firmware file.
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#Empty string denotes driver will use default firmware
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CONFIG_RTE_LIBRTE_QEDE_FW=""
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# Compile software PMD backed by AF_PACKET sockets (Linux only)
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CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
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# Compile ARK PMD
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CONFIG_RTE_LIBRTE_ARK_PMD=n
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CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
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CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
d76f50
# Compile WRS accelerated virtual port (AVP) guest PMD driver
d76f50
CONFIG_RTE_LIBRTE_AVP_PMD=n
d76f50
CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_AVP_DEBUG_DRIVER=y
d76f50
CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
d76f50
# Compile architecture we compile for. TAP PMD
d76f50
# It is enabled by default for Linux only.
d76f50
CONFIG_RTE_LIBRTE_PMD_TAP=n
d76f50
# Compile null PMD
d76f50
CONFIG_RTE_LIBRTE_PMD_NULL=n
d76f50
# Compile fail-safe PMD
d76f50
CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
d76f50
# Do prefetch of packet data within PMD driver receive function
d76f50
CONFIG_RTE_PMD_PACKET_PREFETCH=y
d76f50
# Compile generic crypto device library
d76f50
CONFIG_RTE_LIBRTE_CRYPTODEV=y
d76f50
CONFIG_RTE_LIBRTE_CRYPTODEV_DEBUG=n
d76f50
CONFIG_RTE_CRYPTO_MAX_DEVS=64
d76f50
CONFIG_RTE_CRYPTODEV_NAME_LEN=64
d76f50
# Compile PMD for ARMv8 Crypto device
d76f50
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
d76f50
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
d76f50
# Compile NXP DPAA2 crypto sec driver for CAAM HW
d76f50
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
d76f50
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
d76f50
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
d76f50
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
d76f50
# NXP DPAA caam - crypto driver
d76f50
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
d76f50
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
d76f50
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
d76f50
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n
d76f50
# Compile PMD for QuickAssist based devices
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT=n
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_INIT=n
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n
d76f50
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
d76f50
# Number of sessions to create in architecture we compile for. session memory pool
d76f50
# on a single QuickAssist device.
d76f50
CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
d76f50
# Compile PMD for AESNI backed device
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_MB_DEBUG=n
d76f50
# Compile PMD for Software backed device
d76f50
CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
d76f50
CONFIG_RTE_LIBRTE_PMD_OPENSSL_DEBUG=n
d76f50
# Compile PMD for AESNI GCM device
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
d76f50
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM_DEBUG=n
d76f50
# Compile PMD for SNOW 3G device
d76f50
CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
d76f50
CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
d76f50
# Compile PMD for KASUMI device
d76f50
CONFIG_RTE_LIBRTE_PMD_KASUMI=n
d76f50
CONFIG_RTE_LIBRTE_PMD_KASUMI_DEBUG=n
d76f50
# Compile PMD for ZUC device
d76f50
CONFIG_RTE_LIBRTE_PMD_ZUC=n
d76f50
CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n
d76f50
# Compile PMD for Crypto Scheduler device
d76f50
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=n
d76f50
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
d76f50
# Compile PMD for NULL Crypto device
d76f50
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=n
d76f50
# Compile PMD for Marvell Crypto device
d76f50
CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n
d76f50
CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n
d76f50
# Compile generic security library
d76f50
CONFIG_RTE_LIBRTE_SECURITY=y
d76f50
# Compile generic event device library
d76f50
CONFIG_RTE_LIBRTE_EVENTDEV=y
d76f50
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
d76f50
CONFIG_RTE_EVENT_MAX_DEVS=16
d76f50
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
d76f50
# Compile PMD for skeleton event device
d76f50
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=n
d76f50
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
d76f50
# Compile PMD for software event device
d76f50
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=n
d76f50
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV_DEBUG=n
d76f50
# Compile PMD for octeontx sso event device
d76f50
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=n
d76f50
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
d76f50
# Compile librte_ring
d76f50
CONFIG_RTE_LIBRTE_RING=y
d76f50
# Compile librte_mempool
d76f50
CONFIG_RTE_LIBRTE_MEMPOOL=y
d76f50
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
d76f50
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
d76f50
# Compile Mempool drivers
d76f50
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
d76f50
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
d76f50
# Compile PMD for octeontx fpa mempool device
d76f50
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y
d76f50
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL_DEBUG=n
d76f50
# Compile librte_mbuf
d76f50
CONFIG_RTE_LIBRTE_MBUF=y
d76f50
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
d76f50
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
d76f50
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
d76f50
CONFIG_RTE_PKTMBUF_HEADROOM=128
d76f50
# Compile librte_timer
d76f50
CONFIG_RTE_LIBRTE_TIMER=y
d76f50
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
d76f50
# Compile librte_cfgfile
d76f50
CONFIG_RTE_LIBRTE_CFGFILE=y
d76f50
# Compile librte_cmdline
d76f50
CONFIG_RTE_LIBRTE_CMDLINE=y
d76f50
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
d76f50
# Compile librte_hash
d76f50
CONFIG_RTE_LIBRTE_HASH=y
d76f50
CONFIG_RTE_LIBRTE_HASH_DEBUG=n
d76f50
# Compile librte_efd
d76f50
CONFIG_RTE_LIBRTE_EFD=y
d76f50
# Compile librte_member
d76f50
CONFIG_RTE_LIBRTE_MEMBER=y
d76f50
# Compile librte_jobstats
d76f50
CONFIG_RTE_LIBRTE_JOBSTATS=y
d76f50
# Compile architecture we compile for. device metrics library
d76f50
CONFIG_RTE_LIBRTE_METRICS=y
d76f50
# Compile architecture we compile for. bitrate statistics library
d76f50
CONFIG_RTE_LIBRTE_BITRATE=y
d76f50
# Compile architecture we compile for. latency statistics library
d76f50
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
d76f50
# Compile librte_lpm
d76f50
CONFIG_RTE_LIBRTE_LPM=y
d76f50
CONFIG_RTE_LIBRTE_LPM_DEBUG=n
d76f50
# Compile librte_acl
d76f50
CONFIG_RTE_LIBRTE_ACL=y
d76f50
CONFIG_RTE_LIBRTE_ACL_DEBUG=n
d76f50
# Compile librte_power
d76f50
CONFIG_RTE_LIBRTE_POWER=y
d76f50
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
d76f50
CONFIG_RTE_MAX_LCORE_FREQS=64
d76f50
# Compile librte_net
d76f50
CONFIG_RTE_LIBRTE_NET=y
d76f50
# Compile librte_ip_frag
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG=y
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
d76f50
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
d76f50
# Compile GRO library
d76f50
CONFIG_RTE_LIBRTE_GRO=y
d76f50
# Compile GSO library
d76f50
CONFIG_RTE_LIBRTE_GSO=y
d76f50
# Compile librte_meter
d76f50
CONFIG_RTE_LIBRTE_METER=y
d76f50
# Compile librte_classify
d76f50
CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=y
d76f50
# Compile librte_sched
d76f50
CONFIG_RTE_LIBRTE_SCHED=y
d76f50
CONFIG_RTE_SCHED_DEBUG=n
d76f50
CONFIG_RTE_SCHED_RED=n
d76f50
CONFIG_RTE_SCHED_COLLECT_STATS=n
d76f50
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
d76f50
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
d76f50
CONFIG_RTE_SCHED_VECTOR=n
d76f50
# Compile architecture we compile for. distributor library
d76f50
CONFIG_RTE_LIBRTE_DISTRIBUTOR=y
d76f50
# Compile architecture we compile for. reorder library
d76f50
CONFIG_RTE_LIBRTE_REORDER=y
d76f50
# Compile librte_port
d76f50
CONFIG_RTE_LIBRTE_PORT=y
d76f50
CONFIG_RTE_PORT_STATS_COLLECT=n
d76f50
CONFIG_RTE_PORT_PCAP=n
d76f50
# Compile librte_table
d76f50
CONFIG_RTE_LIBRTE_TABLE=y
d76f50
CONFIG_RTE_TABLE_STATS_COLLECT=n
d76f50
# Compile librte_pipeline
d76f50
CONFIG_RTE_LIBRTE_PIPELINE=y
d76f50
CONFIG_RTE_PIPELINE_STATS_COLLECT=n
d76f50
# Compile librte_kni
d76f50
CONFIG_RTE_LIBRTE_KNI=n
d76f50
CONFIG_RTE_LIBRTE_PMD_KNI=n
d76f50
CONFIG_RTE_KNI_KMOD=n
d76f50
CONFIG_RTE_KNI_KMOD_ETHTOOL=n
d76f50
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
d76f50
# Compile architecture we compile for. pdump library
d76f50
CONFIG_RTE_LIBRTE_PDUMP=y
d76f50
# Compile vhost user library
d76f50
CONFIG_RTE_LIBRTE_VHOST=y
d76f50
CONFIG_RTE_LIBRTE_VHOST_NUMA=y
d76f50
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
d76f50
# Compile vhost PMD
d76f50
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
d76f50
CONFIG_RTE_LIBRTE_PMD_VHOST=y
d76f50
# Compile architecture we compile for. test application
d76f50
CONFIG_RTE_APP_TEST=y
d76f50
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
d76f50
# Compile architecture we compile for. PMD test application
d76f50
CONFIG_RTE_TEST_PMD=y
d76f50
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
d76f50
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
d76f50
# Compile architecture we compile for. crypto performance application
d76f50
CONFIG_RTE_APP_CRYPTO_PERF=y
d76f50
# Compile architecture we compile for. eventdev application
d76f50
CONFIG_RTE_APP_EVENTDEV=y
d76f50
CONFIG_RTE_EXEC_ENV_LINUXAPP=y
d76f50
CONFIG_RTE_ARCH_ARM64=y
d76f50
CONFIG_RTE_ARCH_64=y
d76f50
# Maximum available cache line size in arm64 implementations.
d76f50
# Setting to maximum available cache line size in generic config
d76f50
# to address minimum DMA alignment across all arm64 implementations.
d76f50
CONFIG_RTE_TOOLCHAIN_GCC=y
d76f50
CONFIG_RTE_LIBRTE_PMD_XENVIRT=n