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From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
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From: Keith Seitz <keiths@redhat.com>
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Date: Fri, 11 Jan 2019 17:02:17 -0500
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Subject: gdb-rhbz1187581-power8-regs-not-in-8-2-12of15.patch
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;; [PowerPC] Add support for EBB and PMU registers
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;; Edjunior Barbosa Machado and Pedro Franco de Carvalho
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[PowerPC] Add support for EBB and PMU registers
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This patch adds support for registers of the Event Based Branching and
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Performance Monitoring Units for the powerpc linux native and core
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file targets, and for the powerpc linux server stub.
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All three EBB registers are accessible. Only a subset of the PMU
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registers can be accessed through ptrace. Because of this, the PMU
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registers are enumerated individually in gdbarch_tdep, as opposed to
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having a single "have_pmu" flag. This is intended to make it easier
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to add additional PMU registers in the future, since checking a
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"have_pmu" flag elsewhere in the code would no longer be correct. The
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tdesc feature is named org.gnu.gdb.power.linux.pmu because of this.
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It's unclear if it makes sense to save and restore these registers
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across function calls, since some of them can be modified
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asynchronously. They are also not tracked in record-replay mode.
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The kernel can return ENODATA when ptrace is used to get the EBB
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registers, unless a linux performance event that uses EBB is open in
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the inferior. For this reason, the "fill" functions in the server
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stub for the ebb register sets is not implemented.
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Since gdbserver writes all registers in one go before resuming the
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inferior, this error would not be detected at the time the user tries
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to write to one of the registers on the client side, and gdbserver
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would print out warnings every time it resumes the inferior when no
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ebb performance event is opened, so there is currently no
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straightforward way to handle this case. This means the ebb registers
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in the client-side regcache can become dirty when the user tries to
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write to them, until the inferior is resumed and stopped again.
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A related issue is that 'G' packets used to write to unrelated
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registers will include bad data for the EBB registers if they are
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unavailable, since no register status information is included in the
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'G' packet. This data won't be written to the inferior by the
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gdbserver stub because the "fill" functions are not implemented, and
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currently the gdbserver stub doesn't change the status of the
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registers in its own regcache in response to 'G' packets.
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Another limitation for the ebb registers is that traceframes don't
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record if registers are available or not, so if these registers are
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collected when a tracepoint is hit and the inferior has no ebb event
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opened, the user will see zero values for all of them, instead of the
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usual <unavailable>.
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Because these registers are often unavailable, trying to store them
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with target_store_registers with -1 for the regno argument (all
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registers) would almost always fail, so they are ignored in this case.
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gdb/ChangeLog:
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2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
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Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
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* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_EBBREGSET)
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(PPC_LINUX_SIZEOF_PMUREGSET): Declare.
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* nat/ppc-linux.h (PPC_FEATURE2_EBB, NT_PPC_EBB, NT_PPC_PMU):
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Define if not already defined.
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* features/rs6000/power-ebb.xml: New file.
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* features/rs6000/power-linux-pmu.xml: New file.
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* features/rs6000/powerpc-isa207-vsx32l.xml: Include ebb and pmu
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features.
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* features/rs6000/powerpc-isa207-vsx64l.xml: Likewise.
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* features/rs6000/powerpc-isa207-vsx32l.c: Re-generate.
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* features/rs6000/powerpc-isa207-vsx64l.c: Re-generate.
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* regformats/rs6000/powerpc-isa207-vsx32l.dat: Re-generate.
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* regformats/rs6000/powerpc-isa207-vsx64l.dat: Re-generate.
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* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
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fetch_regset with ebb and pmu regsets.
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(store_register, store_ppc_registers): Call store_regset with ebb
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and pmu regsets.
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(ppc_linux_nat_target::read_description): Set isa207 field in the
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features struct if ebb and pmu are avaiable.
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* ppc-linux-tdep.c (ppc32_regmap_ebb, ppc32_regmap_pmu)
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(ppc32_linux_ebbregset, ppc32_linux_pmuregset): New globals.
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(ppc_linux_iterate_over_regset_sections): Call back with the ebb
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and pmu regsets.
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(ppc_linux_core_read_description): Check if the pmu section is
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present and set isa207 in the features struct.
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* ppc-linux-tdep.h (ppc32_linux_ebbregset)
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(ppc32_linux_pmuregset): Declare.
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* ppc-tdep.h (struct gdbarch_tdep) <ppc_mmcr0_regnum>: New field.
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<ppc_mmcr2_regnum, ppc_siar_regnum, ppc_sdar_regnum>: New fields.
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<ppc_sier_regnum>: New field.
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(enum): <PPC_BESCR_REGNUM, PPC_EBBHR_REGNUM, PPC_EBBRR_REGNUM>:
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New enum values.
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<PPC_MMCR0_REGNUM, PPC_MMCR2_REGNUM, PPC_SIAR_REGNUM>: New enum
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values.
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<PPC_SDAR_REGNUM, PPC_SIER_REGNUM>: New enum values.
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(PPC_IS_EBB_REGNUM, PPC_IS_PMU_REGNUM): Define.
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* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate the
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ebb and pmu features.
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gdb/gdbserver/ChangeLog:
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2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
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* configure.srv (powerpc*-*-linux*): Add rs6000/power-ebb.xml and
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rs6000/power-linux-pmu.xml to srv_xmlfiles.
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* linux-ppc-low.c (ppc_store_ebbregset, ppc_fill_pmuregset)
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(ppc_store_pmuregset): New functions.
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(ppc_regsets): Add entries for ebb and pmu regsets.
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(ppc_arch_setup): Set isa207 in features struct if the ebb and
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pmu regsets are available. Set sizes for these regsets.
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gdb/doc/ChangeLog:
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2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
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* gdb.texinfo (PowerPC Features): Describe new features
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"org.gnu.gdb.power.ebb" and "org.gnu.gdb.power.linux.pmu".
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diff --git a/gdb/arch/ppc-linux-common.h b/gdb/arch/ppc-linux-common.h
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--- a/gdb/arch/ppc-linux-common.h
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+++ b/gdb/arch/ppc-linux-common.h
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@@ -33,6 +33,8 @@ struct target_desc;
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#define PPC_LINUX_SIZEOF_PPRREGSET 8
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#define PPC_LINUX_SIZEOF_DSCRREGSET 8
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#define PPC_LINUX_SIZEOF_TARREGSET 8
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+#define PPC_LINUX_SIZEOF_EBBREGSET (3*8)
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+#define PPC_LINUX_SIZEOF_PMUREGSET (5*8)
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/* Check if the hwcap auxv entry indicates that isa205 is supported. */
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bool ppc_linux_has_isa205 (CORE_ADDR hwcap);
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diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
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--- a/gdb/doc/gdb.texinfo
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+++ b/gdb/doc/gdb.texinfo
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@@ -42585,6 +42585,15 @@ contain the 64-bit register @samp{dscr}.
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The @samp{org.gnu.gdb.power.tar} feature is optional. It should
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contain the 64-bit register @samp{tar}.
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+The @samp{org.gnu.gdb.power.ebb} feature is optional. It should
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+contain registers @samp{bescr}, @samp{ebbhr} and @samp{ebbrr}, all
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+64-bit wide.
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+
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+The @samp{org.gnu.gdb.power.linux.pmu} feature is optional. It should
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+contain registers @samp{mmcr0}, @samp{mmcr2}, @samp{siar}, @samp{sdar}
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+and @samp{sier}, all 64-bit wide. This is the subset of the isa 2.07
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+server PMU registers provided by @sc{gnu}/Linux.
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+
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@node S/390 and System z Features
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@subsection S/390 and System z Features
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@cindex target descriptions, S/390 features
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diff --git a/gdb/features/rs6000/power-ebb.xml b/gdb/features/rs6000/power-ebb.xml
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new file mode 100644
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--- /dev/null
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+++ b/gdb/features/rs6000/power-ebb.xml
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@@ -0,0 +1,14 @@
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+
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+
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+
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+
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+<feature name="org.gnu.gdb.power.ebb">
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+ <reg name="bescr" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="ebbhr" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="ebbrr" bitsize="64" type="uint64" save-restore="no"/>
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+</feature>
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diff --git a/gdb/features/rs6000/power-linux-pmu.xml b/gdb/features/rs6000/power-linux-pmu.xml
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new file mode 100644
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--- /dev/null
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+++ b/gdb/features/rs6000/power-linux-pmu.xml
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@@ -0,0 +1,17 @@
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+
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+
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+
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+ provided by Linux. -->
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+
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+<feature name="org.gnu.gdb.power.linux.pmu">
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+ <reg name="mmcr0" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="mmcr2" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="siar" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="sdar" bitsize="64" type="uint64" save-restore="no"/>
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+ <reg name="sier" bitsize="64" type="uint64" save-restore="no"/>
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+</feature>
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diff --git a/gdb/features/rs6000/powerpc-isa207-vsx32l.c b/gdb/features/rs6000/powerpc-isa207-vsx32l.c
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--- a/gdb/features/rs6000/powerpc-isa207-vsx32l.c
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+++ b/gdb/features/rs6000/powerpc-isa207-vsx32l.c
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@@ -199,5 +199,17 @@ initialize_tdesc_powerpc_isa207_vsx32l (void)
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feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
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tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
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+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
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+ tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
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+
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+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux.pmu");
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+ tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
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+
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tdesc_powerpc_isa207_vsx32l = result;
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}
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diff --git a/gdb/features/rs6000/powerpc-isa207-vsx32l.xml b/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
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--- a/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
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+++ b/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
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@@ -16,4 +16,6 @@
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<xi:include href="power-ppr.xml"/>
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<xi:include href="power-dscr.xml"/>
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<xi:include href="power-tar.xml"/>
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+ <xi:include href="power-ebb.xml"/>
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+ <xi:include href="power-linux-pmu.xml"/>
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</target>
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diff --git a/gdb/features/rs6000/powerpc-isa207-vsx64l.c b/gdb/features/rs6000/powerpc-isa207-vsx64l.c
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--- a/gdb/features/rs6000/powerpc-isa207-vsx64l.c
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+++ b/gdb/features/rs6000/powerpc-isa207-vsx64l.c
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@@ -199,5 +199,17 @@ initialize_tdesc_powerpc_isa207_vsx64l (void)
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feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
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tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
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+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
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+ tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
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+
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+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux.pmu");
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+ tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
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+ tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
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+
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tdesc_powerpc_isa207_vsx64l = result;
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}
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diff --git a/gdb/features/rs6000/powerpc-isa207-vsx64l.xml b/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
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|
|
ce65b8 |
--- a/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
|
|
|
ce65b8 |
+++ b/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
|
|
|
ce65b8 |
@@ -16,4 +16,6 @@
|
|
|
ce65b8 |
<xi:include href="power-ppr.xml"/>
|
|
|
ce65b8 |
<xi:include href="power-dscr.xml"/>
|
|
|
ce65b8 |
<xi:include href="power-tar.xml"/>
|
|
|
ce65b8 |
+ <xi:include href="power-ebb.xml"/>
|
|
|
ce65b8 |
+ <xi:include href="power-linux-pmu.xml"/>
|
|
|
ce65b8 |
</target>
|
|
|
ce65b8 |
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
|
|
|
ce65b8 |
--- a/gdb/gdbserver/configure.srv
|
|
|
ce65b8 |
+++ b/gdb/gdbserver/configure.srv
|
|
|
ce65b8 |
@@ -249,6 +249,8 @@ case "${target}" in
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/power-dscr.xml"
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/power-ppr.xml"
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/power-tar.xml"
|
|
|
ce65b8 |
+ srv_xmlfiles="${srv_xmlfiles} rs6000/power-ebb.xml"
|
|
|
ce65b8 |
+ srv_xmlfiles="${srv_xmlfiles} rs6000/power-linux-pmu.xml"
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-e500l.xml"
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
|
|
|
ce65b8 |
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml"
|
|
|
ce65b8 |
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
|
|
|
ce65b8 |
--- a/gdb/gdbserver/linux-ppc-low.c
|
|
|
ce65b8 |
+++ b/gdb/gdbserver/linux-ppc-low.c
|
|
|
ce65b8 |
@@ -545,6 +545,61 @@ ppc_store_tarregset (struct regcache *regcache, const void *buf)
|
|
|
ce65b8 |
supply_register_by_name (regcache, "tar", tar);
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
+/* Event-Based Branching regset store function. Unless the inferior
|
|
|
ce65b8 |
+ has a perf event open, ptrace can return in error when reading and
|
|
|
ce65b8 |
+ writing to the regset, with ENODATA. For reading, the registers
|
|
|
ce65b8 |
+ will correctly show as unavailable. For writing, gdbserver
|
|
|
ce65b8 |
+ currently only caches any register writes from P and G packets and
|
|
|
ce65b8 |
+ the stub always tries to write all the regsets when resuming the
|
|
|
ce65b8 |
+ inferior, which would result in frequent warnings. For this
|
|
|
ce65b8 |
+ reason, we don't define a fill function. This also means that the
|
|
|
ce65b8 |
+ client-side regcache will be dirty if the user tries to write to
|
|
|
ce65b8 |
+ the EBB registers. G packets that the client sends to write to
|
|
|
ce65b8 |
+ unrelated registers will also include data for EBB registers, even
|
|
|
ce65b8 |
+ if they are unavailable. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+static void
|
|
|
ce65b8 |
+ppc_store_ebbregset (struct regcache *regcache, const void *buf)
|
|
|
ce65b8 |
+{
|
|
|
ce65b8 |
+ const char *regset = (const char *) buf;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* The order in the kernel regset is: EBBRR, EBBHR, BESCR. In the
|
|
|
ce65b8 |
+ .dat file is BESCR, EBBHR, EBBRR. */
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "ebbrr", ®set[0]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "ebbhr", ®set[8]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "bescr", ®set[16]);
|
|
|
ce65b8 |
+}
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Performance Monitoring Unit regset fill function. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+static void
|
|
|
ce65b8 |
+ppc_fill_pmuregset (struct regcache *regcache, void *buf)
|
|
|
ce65b8 |
+{
|
|
|
ce65b8 |
+ char *regset = (char *) buf;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* The order in the kernel regset is SIAR, SDAR, SIER, MMCR2, MMCR0.
|
|
|
ce65b8 |
+ In the .dat file is MMCR0, MMCR2, SIAR, SDAR, SIER. */
|
|
|
ce65b8 |
+ collect_register_by_name (regcache, "siar", ®set[0]);
|
|
|
ce65b8 |
+ collect_register_by_name (regcache, "sdar", ®set[8]);
|
|
|
ce65b8 |
+ collect_register_by_name (regcache, "sier", ®set[16]);
|
|
|
ce65b8 |
+ collect_register_by_name (regcache, "mmcr2", ®set[24]);
|
|
|
ce65b8 |
+ collect_register_by_name (regcache, "mmcr0", ®set[32]);
|
|
|
ce65b8 |
+}
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Performance Monitoring Unit regset store function. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+static void
|
|
|
ce65b8 |
+ppc_store_pmuregset (struct regcache *regcache, const void *buf)
|
|
|
ce65b8 |
+{
|
|
|
ce65b8 |
+ const char *regset = (const char *) buf;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "siar", ®set[0]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "sdar", ®set[8]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "sier", ®set[16]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "mmcr2", ®set[24]);
|
|
|
ce65b8 |
+ supply_register_by_name (regcache, "mmcr0", ®set[32]);
|
|
|
ce65b8 |
+}
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
static void
|
|
|
ce65b8 |
ppc_fill_vsxregset (struct regcache *regcache, void *buf)
|
|
|
ce65b8 |
{
|
|
|
ce65b8 |
@@ -654,6 +709,10 @@ static struct regset_info ppc_regsets[] = {
|
|
|
ce65b8 |
fetch them every time, but still fall back to PTRACE_PEEKUSER for the
|
|
|
ce65b8 |
general registers. Some kernels support these, but not the newer
|
|
|
ce65b8 |
PPC_PTRACE_GETREGS. */
|
|
|
ce65b8 |
+ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_EBB, 0, EXTENDED_REGS,
|
|
|
ce65b8 |
+ NULL, ppc_store_ebbregset },
|
|
|
ce65b8 |
+ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_PMU, 0, EXTENDED_REGS,
|
|
|
ce65b8 |
+ ppc_fill_pmuregset, ppc_store_pmuregset },
|
|
|
ce65b8 |
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_TAR, 0, EXTENDED_REGS,
|
|
|
ce65b8 |
ppc_fill_tarregset, ppc_store_tarregset },
|
|
|
ce65b8 |
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_PPR, 0, EXTENDED_REGS,
|
|
|
ce65b8 |
@@ -734,8 +793,13 @@ ppc_arch_setup (void)
|
|
|
ce65b8 |
features.ppr_dscr = true;
|
|
|
ce65b8 |
if ((ppc_hwcap2 & PPC_FEATURE2_ARCH_2_07)
|
|
|
ce65b8 |
&& (ppc_hwcap2 & PPC_FEATURE2_TAR)
|
|
|
ce65b8 |
+ && (ppc_hwcap2 & PPC_FEATURE2_EBB)
|
|
|
ce65b8 |
&& ppc_check_regset (tid, NT_PPC_TAR,
|
|
|
ce65b8 |
- PPC_LINUX_SIZEOF_TARREGSET))
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_TARREGSET)
|
|
|
ce65b8 |
+ && ppc_check_regset (tid, NT_PPC_EBB,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET)
|
|
|
ce65b8 |
+ && ppc_check_regset (tid, NT_PPC_PMU,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET))
|
|
|
ce65b8 |
features.isa207 = true;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
@@ -798,6 +862,14 @@ ppc_arch_setup (void)
|
|
|
ce65b8 |
regset->size = (features.isa207 ?
|
|
|
ce65b8 |
PPC_LINUX_SIZEOF_TARREGSET : 0);
|
|
|
ce65b8 |
break;
|
|
|
ce65b8 |
+ case NT_PPC_EBB:
|
|
|
ce65b8 |
+ regset->size = (features.isa207 ?
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET : 0);
|
|
|
ce65b8 |
+ break;
|
|
|
ce65b8 |
+ case NT_PPC_PMU:
|
|
|
ce65b8 |
+ regset->size = (features.isa207 ?
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET : 0);
|
|
|
ce65b8 |
+ break;
|
|
|
ce65b8 |
default:
|
|
|
ce65b8 |
break;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
diff --git a/gdb/nat/ppc-linux.h b/gdb/nat/ppc-linux.h
|
|
|
ce65b8 |
--- a/gdb/nat/ppc-linux.h
|
|
|
ce65b8 |
+++ b/gdb/nat/ppc-linux.h
|
|
|
ce65b8 |
@@ -60,6 +60,9 @@
|
|
|
ce65b8 |
#ifndef PPC_FEATURE2_TAR
|
|
|
ce65b8 |
#define PPC_FEATURE2_TAR 0x04000000
|
|
|
ce65b8 |
#endif
|
|
|
ce65b8 |
+#ifndef PPC_FEATURE2_EBB
|
|
|
ce65b8 |
+#define PPC_FEATURE2_EBB 0x10000000
|
|
|
ce65b8 |
+#endif
|
|
|
ce65b8 |
|
|
|
ce65b8 |
/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
|
|
|
ce65b8 |
configure time check. Some older glibc's (for instance 2.2.1)
|
|
|
ce65b8 |
@@ -106,6 +109,16 @@
|
|
|
ce65b8 |
#define NT_PPC_DSCR 0x105
|
|
|
ce65b8 |
#endif
|
|
|
ce65b8 |
|
|
|
ce65b8 |
+/* Event Based Branch Registers. */
|
|
|
ce65b8 |
+#ifndef NT_PPC_EBB
|
|
|
ce65b8 |
+#define NT_PPC_EBB 0x106
|
|
|
ce65b8 |
+#endif
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Performance Monitor Registers. */
|
|
|
ce65b8 |
+#ifndef NT_PPC_PMU
|
|
|
ce65b8 |
+#define NT_PPC_PMU 0x107
|
|
|
ce65b8 |
+#endif
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
/* Return the wordsize of the target, either 4 or 8 bytes. */
|
|
|
ce65b8 |
int ppc_linux_target_wordsize (int tid);
|
|
|
ce65b8 |
|
|
|
ce65b8 |
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
|
|
|
ce65b8 |
--- a/gdb/ppc-linux-nat.c
|
|
|
ce65b8 |
+++ b/gdb/ppc-linux-nat.c
|
|
|
ce65b8 |
@@ -667,6 +667,24 @@ fetch_register (struct regcache *regcache, int tid, int regno)
|
|
|
ce65b8 |
&ppc32_linux_tarregset);
|
|
|
ce65b8 |
return;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
+ else if (PPC_IS_EBB_REGNUM (regno))
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ gdb_assert (tdep->have_ebb);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ fetch_regset (regcache, tid, NT_PPC_EBB,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_ebbregset);
|
|
|
ce65b8 |
+ return;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ else if (PPC_IS_PMU_REGNUM (regno))
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ gdb_assert (tdep->ppc_mmcr0_regnum != -1);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ fetch_regset (regcache, tid, NT_PPC_PMU,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_pmuregset);
|
|
|
ce65b8 |
+ return;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
|
|
|
ce65b8 |
if (regaddr == -1)
|
|
|
ce65b8 |
{
|
|
|
ce65b8 |
@@ -875,6 +893,14 @@ fetch_ppc_registers (struct regcache *regcache, int tid)
|
|
|
ce65b8 |
fetch_regset (regcache, tid, NT_PPC_TAR,
|
|
|
ce65b8 |
PPC_LINUX_SIZEOF_TARREGSET,
|
|
|
ce65b8 |
&ppc32_linux_tarregset);
|
|
|
ce65b8 |
+ if (tdep->have_ebb)
|
|
|
ce65b8 |
+ fetch_regset (regcache, tid, NT_PPC_EBB,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_ebbregset);
|
|
|
ce65b8 |
+ if (tdep->ppc_mmcr0_regnum != -1)
|
|
|
ce65b8 |
+ fetch_regset (regcache, tid, NT_PPC_PMU,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_pmuregset);
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
/* Fetch registers from the child process. Fetch all registers if
|
|
|
ce65b8 |
@@ -1082,6 +1108,24 @@ store_register (const struct regcache *regcache, int tid, int regno)
|
|
|
ce65b8 |
&ppc32_linux_tarregset);
|
|
|
ce65b8 |
return;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
+ else if (PPC_IS_EBB_REGNUM (regno))
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ gdb_assert (tdep->have_ebb);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ store_regset (regcache, tid, regno, NT_PPC_EBB,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_ebbregset);
|
|
|
ce65b8 |
+ return;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ else if (PPC_IS_PMU_REGNUM (regno))
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ gdb_assert (tdep->ppc_mmcr0_regnum != -1);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ store_regset (regcache, tid, regno, NT_PPC_PMU,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_pmuregset);
|
|
|
ce65b8 |
+ return;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
|
|
|
ce65b8 |
if (regaddr == -1)
|
|
|
ce65b8 |
return;
|
|
|
ce65b8 |
@@ -1308,6 +1352,15 @@ store_ppc_registers (const struct regcache *regcache, int tid)
|
|
|
ce65b8 |
store_regset (regcache, tid, -1, NT_PPC_TAR,
|
|
|
ce65b8 |
PPC_LINUX_SIZEOF_TARREGSET,
|
|
|
ce65b8 |
&ppc32_linux_tarregset);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ if (tdep->ppc_mmcr0_regnum != -1)
|
|
|
ce65b8 |
+ store_regset (regcache, tid, -1, NT_PPC_PMU,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_pmuregset);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* Because the EBB registers can be unavailable, attempts to store
|
|
|
ce65b8 |
+ them here would cause this function to fail most of the time, so
|
|
|
ce65b8 |
+ we ignore them. */
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
/* Fetch the AT_HWCAP entry from the aux vector. */
|
|
|
ce65b8 |
@@ -2439,7 +2492,10 @@ ppc_linux_nat_target::read_description ()
|
|
|
ce65b8 |
features.ppr_dscr = true;
|
|
|
ce65b8 |
if ((hwcap2 & PPC_FEATURE2_ARCH_2_07)
|
|
|
ce65b8 |
&& (hwcap2 & PPC_FEATURE2_TAR)
|
|
|
ce65b8 |
- && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET))
|
|
|
ce65b8 |
+ && (hwcap2 & PPC_FEATURE2_EBB)
|
|
|
ce65b8 |
+ && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET)
|
|
|
ce65b8 |
+ && check_regset (tid, NT_PPC_EBB, PPC_LINUX_SIZEOF_EBBREGSET)
|
|
|
ce65b8 |
+ && check_regset (tid, NT_PPC_PMU, PPC_LINUX_SIZEOF_PMUREGSET))
|
|
|
ce65b8 |
features.isa207 = true;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
|
|
|
ce65b8 |
--- a/gdb/ppc-linux-tdep.c
|
|
|
ce65b8 |
+++ b/gdb/ppc-linux-tdep.c
|
|
|
ce65b8 |
@@ -599,6 +599,44 @@ const struct regset ppc32_linux_tarregset = {
|
|
|
ce65b8 |
regcache_collect_regset
|
|
|
ce65b8 |
};
|
|
|
ce65b8 |
|
|
|
ce65b8 |
+/* Event-Based Branching regmap. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+static const struct regcache_map_entry ppc32_regmap_ebb[] =
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ { 1, PPC_EBBRR_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_EBBHR_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_BESCR_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 0 }
|
|
|
ce65b8 |
+ };
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Event-Based Branching regset. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+const struct regset ppc32_linux_ebbregset = {
|
|
|
ce65b8 |
+ ppc32_regmap_ebb,
|
|
|
ce65b8 |
+ regcache_supply_regset,
|
|
|
ce65b8 |
+ regcache_collect_regset
|
|
|
ce65b8 |
+};
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Performance Monitoring Unit regmap. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+static const struct regcache_map_entry ppc32_regmap_pmu[] =
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ { 1, PPC_SIAR_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_SDAR_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_SIER_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_MMCR2_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 1, PPC_MMCR0_REGNUM, 8 },
|
|
|
ce65b8 |
+ { 0 }
|
|
|
ce65b8 |
+ };
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+/* Performance Monitoring Unit regset. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+const struct regset ppc32_linux_pmuregset = {
|
|
|
ce65b8 |
+ ppc32_regmap_pmu,
|
|
|
ce65b8 |
+ regcache_supply_regset,
|
|
|
ce65b8 |
+ regcache_collect_regset
|
|
|
ce65b8 |
+};
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
const struct regset *
|
|
|
ce65b8 |
ppc_linux_gregset (int wordsize)
|
|
|
ce65b8 |
{
|
|
|
ce65b8 |
@@ -674,6 +712,22 @@ ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
|
|
|
ce65b8 |
cb (".reg-ppc-tar", PPC_LINUX_SIZEOF_TARREGSET,
|
|
|
ce65b8 |
PPC_LINUX_SIZEOF_TARREGSET,
|
|
|
ce65b8 |
&ppc32_linux_tarregset, "Target Address Register", cb_data);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* EBB registers are unavailable when ptrace returns ENODATA. Check
|
|
|
ce65b8 |
+ availability when generating a core file (regcache != NULL). */
|
|
|
ce65b8 |
+ if (tdep->have_ebb)
|
|
|
ce65b8 |
+ if (regcache == NULL
|
|
|
ce65b8 |
+ || REG_VALID == regcache->get_register_status (PPC_BESCR_REGNUM))
|
|
|
ce65b8 |
+ cb (".reg-ppc-ebb", PPC_LINUX_SIZEOF_EBBREGSET,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_EBBREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_ebbregset, "Event-based Branching Registers",
|
|
|
ce65b8 |
+ cb_data);
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ if (tdep->ppc_mmcr0_regnum != -1)
|
|
|
ce65b8 |
+ cb (".reg-ppc-pmu", PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ PPC_LINUX_SIZEOF_PMUREGSET,
|
|
|
ce65b8 |
+ &ppc32_linux_pmuregset, "Performance Monitor Registers",
|
|
|
ce65b8 |
+ cb_data);
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
static void
|
|
|
ce65b8 |
@@ -1089,6 +1143,7 @@ ppc_linux_core_read_description (struct gdbarch *gdbarch,
|
|
|
ce65b8 |
asection *ppr = bfd_get_section_by_name (abfd, ".reg-ppc-ppr");
|
|
|
ce65b8 |
asection *dscr = bfd_get_section_by_name (abfd, ".reg-ppc-dscr");
|
|
|
ce65b8 |
asection *tar = bfd_get_section_by_name (abfd, ".reg-ppc-tar");
|
|
|
ce65b8 |
+ asection *pmu = bfd_get_section_by_name (abfd, ".reg-ppc-pmu");
|
|
|
ce65b8 |
|
|
|
ce65b8 |
if (! section)
|
|
|
ce65b8 |
return NULL;
|
|
|
ce65b8 |
@@ -1124,7 +1179,12 @@ ppc_linux_core_read_description (struct gdbarch *gdbarch,
|
|
|
ce65b8 |
if (ppr && dscr)
|
|
|
ce65b8 |
{
|
|
|
ce65b8 |
features.ppr_dscr = true;
|
|
|
ce65b8 |
- if (tar)
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* We don't require the EBB note section to be present in the
|
|
|
ce65b8 |
+ core file to select isa207 because these registers could have
|
|
|
ce65b8 |
+ been unavailable when the core file was created. They will
|
|
|
ce65b8 |
+ be in the tdep but will show as unavailable. */
|
|
|
ce65b8 |
+ if (tar && pmu)
|
|
|
ce65b8 |
features.isa207 = true;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
diff --git a/gdb/ppc-linux-tdep.h b/gdb/ppc-linux-tdep.h
|
|
|
ce65b8 |
--- a/gdb/ppc-linux-tdep.h
|
|
|
ce65b8 |
+++ b/gdb/ppc-linux-tdep.h
|
|
|
ce65b8 |
@@ -48,5 +48,7 @@ int ppc_linux_trap_reg_p (struct gdbarch *gdbarch);
|
|
|
ce65b8 |
extern const struct regset ppc32_linux_pprregset;
|
|
|
ce65b8 |
extern const struct regset ppc32_linux_dscrregset;
|
|
|
ce65b8 |
extern const struct regset ppc32_linux_tarregset;
|
|
|
ce65b8 |
+extern const struct regset ppc32_linux_ebbregset;
|
|
|
ce65b8 |
+extern const struct regset ppc32_linux_pmuregset;
|
|
|
ce65b8 |
|
|
|
ce65b8 |
#endif /* PPC_LINUX_TDEP_H */
|
|
|
ce65b8 |
diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h
|
|
|
ce65b8 |
--- a/gdb/ppc-tdep.h
|
|
|
ce65b8 |
+++ b/gdb/ppc-tdep.h
|
|
|
ce65b8 |
@@ -265,6 +265,15 @@ struct gdbarch_tdep
|
|
|
ce65b8 |
/* Decimal 128 registers. */
|
|
|
ce65b8 |
int ppc_dl0_regnum; /* First Decimal128 argument register pair. */
|
|
|
ce65b8 |
|
|
|
ce65b8 |
+ int have_ebb;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* PMU registers. */
|
|
|
ce65b8 |
+ int ppc_mmcr0_regnum;
|
|
|
ce65b8 |
+ int ppc_mmcr2_regnum;
|
|
|
ce65b8 |
+ int ppc_siar_regnum;
|
|
|
ce65b8 |
+ int ppc_sdar_regnum;
|
|
|
ce65b8 |
+ int ppc_sier_regnum;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
/* Offset to ABI specific location where link register is saved. */
|
|
|
ce65b8 |
int lr_frame_offset;
|
|
|
ce65b8 |
|
|
|
ce65b8 |
@@ -321,12 +330,31 @@ enum {
|
|
|
ce65b8 |
PPC_PPR_REGNUM = 172,
|
|
|
ce65b8 |
PPC_DSCR_REGNUM = 173,
|
|
|
ce65b8 |
PPC_TAR_REGNUM = 174,
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* EBB registers. */
|
|
|
ce65b8 |
+ PPC_BESCR_REGNUM = 175,
|
|
|
ce65b8 |
+ PPC_EBBHR_REGNUM = 176,
|
|
|
ce65b8 |
+ PPC_EBBRR_REGNUM = 177,
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* PMU registers. */
|
|
|
ce65b8 |
+ PPC_MMCR0_REGNUM = 178,
|
|
|
ce65b8 |
+ PPC_MMCR2_REGNUM = 179,
|
|
|
ce65b8 |
+ PPC_SIAR_REGNUM = 180,
|
|
|
ce65b8 |
+ PPC_SDAR_REGNUM = 181,
|
|
|
ce65b8 |
+ PPC_SIER_REGNUM = 182,
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
PPC_NUM_REGS
|
|
|
ce65b8 |
};
|
|
|
ce65b8 |
|
|
|
ce65b8 |
/* Big enough to hold the size of the largest register in bytes. */
|
|
|
ce65b8 |
#define PPC_MAX_REGISTER_SIZE 64
|
|
|
ce65b8 |
|
|
|
ce65b8 |
+#define PPC_IS_EBB_REGNUM(i) \
|
|
|
ce65b8 |
+ ((i) >= PPC_BESCR_REGNUM && (i) <= PPC_EBBRR_REGNUM)
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+#define PPC_IS_PMU_REGNUM(i) \
|
|
|
ce65b8 |
+ ((i) >= PPC_MMCR0_REGNUM && (i) <= PPC_SIER_REGNUM)
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
/* An instruction to match. */
|
|
|
ce65b8 |
|
|
|
ce65b8 |
struct ppc_insn_pattern
|
|
|
ce65b8 |
diff --git a/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat b/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
|
|
|
ce65b8 |
--- a/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
|
|
|
ce65b8 |
+++ b/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
|
|
|
ce65b8 |
@@ -145,3 +145,11 @@ expedite:r1,pc
|
|
|
ce65b8 |
64:ppr
|
|
|
ce65b8 |
64:dscr
|
|
|
ce65b8 |
64:tar
|
|
|
ce65b8 |
+64:bescr
|
|
|
ce65b8 |
+64:ebbhr
|
|
|
ce65b8 |
+64:ebbrr
|
|
|
ce65b8 |
+64:mmcr0
|
|
|
ce65b8 |
+64:mmcr2
|
|
|
ce65b8 |
+64:siar
|
|
|
ce65b8 |
+64:sdar
|
|
|
ce65b8 |
+64:sier
|
|
|
ce65b8 |
diff --git a/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat b/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
|
|
|
ce65b8 |
--- a/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
|
|
|
ce65b8 |
+++ b/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
|
|
|
ce65b8 |
@@ -145,3 +145,11 @@ expedite:r1,pc
|
|
|
ce65b8 |
64:ppr
|
|
|
ce65b8 |
64:dscr
|
|
|
ce65b8 |
64:tar
|
|
|
ce65b8 |
+64:bescr
|
|
|
ce65b8 |
+64:ebbhr
|
|
|
ce65b8 |
+64:ebbrr
|
|
|
ce65b8 |
+64:mmcr0
|
|
|
ce65b8 |
+64:mmcr2
|
|
|
ce65b8 |
+64:siar
|
|
|
ce65b8 |
+64:sdar
|
|
|
ce65b8 |
+64:sier
|
|
|
ce65b8 |
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
|
|
|
ce65b8 |
--- a/gdb/rs6000-tdep.c
|
|
|
ce65b8 |
+++ b/gdb/rs6000-tdep.c
|
|
|
ce65b8 |
@@ -5871,7 +5871,7 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
ce65b8 |
enum powerpc_elf_abi elf_abi = POWERPC_ELF_AUTO;
|
|
|
ce65b8 |
int have_fpu = 0, have_spe = 0, have_mq = 0, have_altivec = 0;
|
|
|
ce65b8 |
int have_dfp = 0, have_vsx = 0, have_ppr = 0, have_dscr = 0;
|
|
|
ce65b8 |
- int have_tar = 0;
|
|
|
ce65b8 |
+ int have_tar = 0, have_ebb = 0, have_pmu = 0;
|
|
|
ce65b8 |
int tdesc_wordsize = -1;
|
|
|
ce65b8 |
const struct target_desc *tdesc = info.target_desc;
|
|
|
ce65b8 |
struct tdesc_arch_data *tdesc_data = NULL;
|
|
|
ce65b8 |
@@ -6211,6 +6211,64 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
else
|
|
|
ce65b8 |
have_tar = 0;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* Event-based Branching Registers. */
|
|
|
ce65b8 |
+ feature = tdesc_find_feature (tdesc,
|
|
|
ce65b8 |
+ "org.gnu.gdb.power.ebb");
|
|
|
ce65b8 |
+ if (feature != NULL)
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ static const char *const ebb_regs[] = {
|
|
|
ce65b8 |
+ "bescr", "ebbhr", "ebbrr"
|
|
|
ce65b8 |
+ };
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ valid_p = 1;
|
|
|
ce65b8 |
+ for (i = 0; i < ARRAY_SIZE (ebb_regs); i++)
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_BESCR_REGNUM + i,
|
|
|
ce65b8 |
+ ebb_regs[i]);
|
|
|
ce65b8 |
+ if (!valid_p)
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ tdesc_data_cleanup (tdesc_data);
|
|
|
ce65b8 |
+ return NULL;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ have_ebb = 1;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ else
|
|
|
ce65b8 |
+ have_ebb = 0;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* Subset of the ISA 2.07 Performance Monitor Registers provided
|
|
|
ce65b8 |
+ by Linux. */
|
|
|
ce65b8 |
+ feature = tdesc_find_feature (tdesc,
|
|
|
ce65b8 |
+ "org.gnu.gdb.power.linux.pmu");
|
|
|
ce65b8 |
+ if (feature != NULL)
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ valid_p = 1;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_MMCR0_REGNUM,
|
|
|
ce65b8 |
+ "mmcr0");
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_MMCR2_REGNUM,
|
|
|
ce65b8 |
+ "mmcr2");
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_SIAR_REGNUM,
|
|
|
ce65b8 |
+ "siar");
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_SDAR_REGNUM,
|
|
|
ce65b8 |
+ "sdar");
|
|
|
ce65b8 |
+ valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
|
|
ce65b8 |
+ PPC_SIER_REGNUM,
|
|
|
ce65b8 |
+ "sier");
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ if (!valid_p)
|
|
|
ce65b8 |
+ {
|
|
|
ce65b8 |
+ tdesc_data_cleanup (tdesc_data);
|
|
|
ce65b8 |
+ return NULL;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ have_pmu = 1;
|
|
|
ce65b8 |
+ }
|
|
|
ce65b8 |
+ else
|
|
|
ce65b8 |
+ have_pmu = 0;
|
|
|
ce65b8 |
}
|
|
|
ce65b8 |
|
|
|
ce65b8 |
/* If we have a 64-bit binary on a 32-bit target, complain. Also
|
|
|
ce65b8 |
@@ -6408,6 +6466,20 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
ce65b8 |
tdep->ppc_ppr_regnum = have_ppr ? PPC_PPR_REGNUM : -1;
|
|
|
ce65b8 |
tdep->ppc_dscr_regnum = have_dscr ? PPC_DSCR_REGNUM : -1;
|
|
|
ce65b8 |
tdep->ppc_tar_regnum = have_tar ? PPC_TAR_REGNUM : -1;
|
|
|
ce65b8 |
+ tdep->have_ebb = have_ebb;
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ /* If additional pmu registers are added, care must be taken when
|
|
|
ce65b8 |
+ setting new fields in the tdep below, to maintain compatibility
|
|
|
ce65b8 |
+ with features that only provide some of the registers. Currently
|
|
|
ce65b8 |
+ gdb access to the pmu registers is only supported in linux, and
|
|
|
ce65b8 |
+ linux only provides a subset of the pmu registers defined in the
|
|
|
ce65b8 |
+ architecture. */
|
|
|
ce65b8 |
+
|
|
|
ce65b8 |
+ tdep->ppc_mmcr0_regnum = have_pmu ? PPC_MMCR0_REGNUM : -1;
|
|
|
ce65b8 |
+ tdep->ppc_mmcr2_regnum = have_pmu ? PPC_MMCR2_REGNUM : -1;
|
|
|
ce65b8 |
+ tdep->ppc_siar_regnum = have_pmu ? PPC_SIAR_REGNUM : -1;
|
|
|
ce65b8 |
+ tdep->ppc_sdar_regnum = have_pmu ? PPC_SDAR_REGNUM : -1;
|
|
|
ce65b8 |
+ tdep->ppc_sier_regnum = have_pmu ? PPC_SIER_REGNUM : -1;
|
|
|
ce65b8 |
|
|
|
ce65b8 |
set_gdbarch_pc_regnum (gdbarch, PPC_PC_REGNUM);
|
|
|
ce65b8 |
set_gdbarch_sp_regnum (gdbarch, PPC_R0_REGNUM + 1);
|