From fac4ff2e36533b03604ae6211d07021af6d893a3 Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: Dec 19 2019 11:49:12 +0000 Subject: import devtoolset-8-binutils-2.30-55.el7.1 --- diff --git a/SOURCES/binutils-plugins-need-dlsym.patch b/SOURCES/binutils-plugins-need-dlsym.patch new file mode 100644 index 0000000..c9800fc --- /dev/null +++ b/SOURCES/binutils-plugins-need-dlsym.patch @@ -0,0 +1,17 @@ +--- binutils.orig/config/plugins.m4 2019-05-14 13:04:26.467925154 +0100 ++++ binutils-2.30/config/plugins.m4 2019-05-14 13:05:36.961396058 +0100 +@@ -10,12 +10,13 @@ AC_DEFUN([AC_PLUGINS], + no) plugins=no ;; + *) plugins=yes + if test "$maybe_plugins" != "yes" ; then +- AC_MSG_ERROR([Building with plugin support requires a host that supports dlopen.]) ++ AC_MSG_ERROR([Building with plugin support requires a host that supports dlopen and dlsym.]) + fi ;; + esac], + [plugins=$maybe_plugins] + ) + if test "$plugins" = "yes"; then + AC_SEARCH_LIBS([dlopen], [dl]) ++ AC_SEARCH_LIBS([dlsym], [dl]) + fi + ]) diff --git a/SOURCES/binutils-special-sections-in-groups.patch b/SOURCES/binutils-special-sections-in-groups.patch deleted file mode 100644 index 7010332..0000000 --- a/SOURCES/binutils-special-sections-in-groups.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- binutils.orig/bfd/elf.c 2018-10-19 11:42:10.107277490 +0100 -+++ binutils-2.31.1/bfd/elf.c 2018-10-19 11:44:33.607105801 +0100 -@@ -828,7 +828,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd - } - } - -- if (elf_group_name (newsect) == NULL) -+ if (elf_group_name (newsect) == NULL -+ /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section) -+ but they will not have been added to the group because they do not -+ have contents that the ELF code in the BFD library knows how to -+ process. This is OK though - we rely upon the target backends to -+ handle these sections for us. */ -+ && hdr->sh_type < SHT_LOOS) - { - /* xgettext:c-format */ - _bfd_error_handler (_("%B: no group info for section '%A'"), -@@ -934,7 +940,8 @@ _bfd_elf_setup_sections (bfd *abfd) - else if (idx->shdr->bfd_section) - elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section; - else if (idx->shdr->sh_type != SHT_RELA -- && idx->shdr->sh_type != SHT_REL) -+ && idx->shdr->sh_type != SHT_REL -+ && idx->shdr->sh_type < SHT_LOOS) - { - /* There are some unknown sections in the group. */ - _bfd_error_handler diff --git a/SOURCES/binutils-x86-JCC-Errata.patch b/SOURCES/binutils-x86-JCC-Errata.patch new file mode 100644 index 0000000..3c42d33 --- /dev/null +++ b/SOURCES/binutils-x86-JCC-Errata.patch @@ -0,0 +1,3733 @@ +diff -rupN binutils.orig/gas/config/tc-i386.c binutils-2.30/gas/config/tc-i386.c +--- binutils.orig/gas/config/tc-i386.c 2019-11-20 10:59:21.586883777 +0000 ++++ binutils-2.30/gas/config/tc-i386.c 2019-11-20 15:25:34.197910787 +0000 +@@ -392,6 +392,9 @@ struct _i386_insn + + /* Error message. */ + enum i386_error error; ++ ++ /* Has GOTPC relocation. */ ++ bfd_boolean has_gotpc_reloc; + }; + + typedef struct _i386_insn i386_insn; +@@ -521,6 +524,8 @@ static enum flag_code flag_code; + static unsigned int object_64bit; + static unsigned int disallow_64bit_reloc; + static int use_rela_relocations = 0; ++/* __tls_get_addr/___tls_get_addr symbol for TLS. */ ++static const char *tls_get_addr; + + #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ + || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \ +@@ -584,6 +589,21 @@ static int omit_lock_prefix = 0; + "lock addl $0, (%{re}sp)". */ + static int avoid_fence = 0; + ++/* Type of the previous instruction. */ ++static struct ++{ ++ segT seg; ++ const char *file; ++ const char *name; ++ unsigned int line; ++ enum last_insn_kind ++ { ++ last_insn_other = 0, ++ last_insn_directive, ++ last_insn_prefix ++ } kind; ++} last_insn; ++ + /* 1 if the assembler should generate relax relocations. */ + + static int generate_relax_relocations +@@ -597,6 +617,31 @@ static enum check_kind + } + sse_check, operand_check = check_warning; + ++/* Non-zero if branches should be aligned within power of 2 boundary. */ ++static int align_branch_power = 0; ++ ++/* Types of branches to align. */ ++enum align_branch_kind ++ { ++ align_branch_none = 0, ++ align_branch_jcc = 1 << 0, ++ align_branch_fused = 1 << 1, ++ align_branch_jmp = 1 << 2, ++ align_branch_call = 1 << 3, ++ align_branch_indirect = 1 << 4, ++ align_branch_ret = 1 << 5 ++ }; ++ ++static unsigned int align_branch = (align_branch_jcc ++ | align_branch_fused ++ | align_branch_jmp); ++ ++/* The maximum padding size for fused jcc. */ ++#define MAX_FUSED_JCC_PADDING_SIZE 20 ++ ++/* The maximum number of prefixes added for an instruction. */ ++static unsigned int align_branch_prefix_size = 5; ++ + /* Register prefix used for error message. */ + static const char *register_prefix = "%"; + +@@ -677,12 +722,19 @@ int x86_cie_data_alignment; + /* Interface to relax_segment. + There are 3 major relax states for 386 jump insns because the + different types of jumps add different sizes to frags when we're +- figuring out what sort of jump to choose to reach a given label. */ ++ figuring out what sort of jump to choose to reach a given label. ++ ++ BRANCH_PADDING, BRANCH_PREFIX and FUSED_JCC_PADDING are used to align ++ branches which are handled by md_estimate_size_before_relax() and ++ i386_generic_table_relax_frag(). */ + + /* Types. */ + #define UNCOND_JUMP 0 + #define COND_JUMP 1 + #define COND_JUMP86 2 ++#define BRANCH_PADDING 3 ++#define BRANCH_PREFIX 4 ++#define FUSED_JCC_PADDING 5 + + /* Sizes. */ + #define CODE16 1 +@@ -1402,7 +1454,9 @@ i386_align_code (fragS *fragP, int count + patt [padding - 1], padding); + } + } +- fragP->fr_var = count; ++ ++ if (fragP->fr_type != rs_machine_dependent) ++ fragP->fr_var = count; + } + + static INLINE int +@@ -2807,6 +2861,11 @@ md_begin (void) + x86_dwarf2_return_column = 8; + x86_cie_data_alignment = -4; + } ++ ++ /* NB: FUSED_JCC_PADDING frag must have sufficient room so that it ++ can be turned into BRANCH_PREFIX frag. */ ++ if (align_branch_prefix_size > MAX_FUSED_JCC_PADDING_SIZE) ++ abort (); + } + + void +@@ -3929,6 +3988,17 @@ md_assemble (char *line) + + /* We are ready to output the insn. */ + output_insn (); ++ ++ last_insn.seg = now_seg; ++ ++ if (i.tm.opcode_modifier.isprefix) ++ { ++ last_insn.kind = last_insn_prefix; ++ last_insn.name = i.tm.name; ++ last_insn.file = as_where (&last_insn.line); ++ } ++ else ++ last_insn.kind = last_insn_other; + } + + static char * +@@ -7162,11 +7232,202 @@ output_interseg_jump (void) + md_number_to_chars (p + size, (valueT) i.op[0].imms->X_add_number, 2); + } + ++/* Return TRUE for test, and, cmp, add, sub, inc and dec which may ++ be macro-fused with conditional jumps. */ ++ ++static bfd_boolean ++maybe_fused_with_jcc_p (void) ++{ ++ /* No RIP address. */ ++ if (i.base_reg && i.base_reg->reg_num == RegRip) ++ return FALSE; ++ ++ /* and, add, sub with destination register. */ ++ if (!strcmp (i.tm.name, "and") ++ || !strcmp (i.tm.name, "add") ++ || !strcmp (i.tm.name, "sub")) ++ return i.types[1].bitfield.reg; ++ ++ /* test, cmp with any register. */ ++ if (!strcmp (i.tm.name, "test") || !strcmp (i.tm.name, "cmp")) ++ return (i.types[0].bitfield.reg ++ || i.types[1].bitfield.reg); ++ ++ /* inc, dec with 16/32/64-bit register. */ ++ if (!strcmp (i.tm.name, "inc") || !strcmp (i.tm.name, "dec")) ++ return i.types[0].bitfield.reg; ++ ++ return FALSE; ++} ++ ++/* Return TRUE if a FUSED_JCC_PADDING frag should be generated. */ ++ ++static bfd_boolean ++add_fused_jcc_padding_frag_p (void) ++{ ++ if (!align_branch_power ++ || now_seg == absolute_section ++ || !cpu_arch_flags.bitfield.cpui386 ++ || !(align_branch & align_branch_fused)) ++ return FALSE; ++ ++ if (maybe_fused_with_jcc_p ()) ++ { ++ if (last_insn.kind != last_insn_other ++ && last_insn.seg == now_seg) ++ { ++ if (flag_debug) ++ as_warn_where (last_insn.file, last_insn.line, ++ _("`%s` skips -malign-branch-boundary on `%s`"), ++ last_insn.name, i.tm.name); ++ return FALSE; ++ } ++ return TRUE; ++ } ++ ++ return FALSE; ++} ++ ++/* Return TRUE if a BRANCH_PREFIX frag should be generated. */ ++ ++static bfd_boolean ++add_branch_prefix_frag_p (void) ++{ ++ if (!align_branch_power ++ || now_seg == absolute_section ++ || i.tm.cpu_flags.bitfield.cpupadlock ++ || !cpu_arch_flags.bitfield.cpui386) ++ return FALSE; ++ ++ /* Don't add prefix if it is a prefix or there is no operand. */ ++ if (!i.operands || i.tm.opcode_modifier.isprefix) ++ return FALSE; ++ ++ if (last_insn.kind != last_insn_other ++ && last_insn.seg == now_seg) ++ { ++ if (flag_debug) ++ as_warn_where (last_insn.file, last_insn.line, ++ _("`%s` skips -malign-branch-boundary on `%s`"), ++ last_insn.name, i.tm.name); ++ return FALSE; ++ } ++ ++ return TRUE; ++} ++ ++/* Return TRUE if a BRANCH_PADDING frag should be generated. */ ++ ++static int ++add_branch_padding_frag_p (enum align_branch_kind *branch_p) ++{ ++ bfd_boolean add_padding; ++ ++ if (!align_branch_power ++ || now_seg == absolute_section ++ || !cpu_arch_flags.bitfield.cpui386) ++ return FALSE; ++ ++ add_padding = FALSE; ++ ++ /* Check for jcc and direct jmp. */ ++ if (i.tm.opcode_modifier.jump) ++ { ++ if (i.tm.base_opcode == JUMP_PC_RELATIVE) ++ { ++ *branch_p = align_branch_jmp; ++ add_padding = align_branch & align_branch_jmp; ++ } ++ else ++ { ++ *branch_p = align_branch_jcc; ++ if ((align_branch & align_branch_jcc)) ++ add_padding = TRUE; ++ } ++ } ++ else if (i.tm.base_opcode == 0xc2 ++ || i.tm.base_opcode == 0xc3 ++ || i.tm.base_opcode == 0xca ++ || i.tm.base_opcode == 0xcb) ++ { ++ *branch_p = align_branch_ret; ++ if ((align_branch & align_branch_ret)) ++ add_padding = TRUE; ++ } ++ else ++ { ++ if (i.tm.base_opcode == 0xe8) ++ { ++ *branch_p = align_branch_call; ++ if ((align_branch & align_branch_call)) ++ add_padding = TRUE; ++ } ++ else if (i.tm.base_opcode == 0xff ++ && (i.rm.reg == 2 || i.rm.reg == 4)) ++ { ++ *branch_p = align_branch_indirect; ++ if ((align_branch & align_branch_indirect)) ++ add_padding = TRUE; ++ } ++ ++ /* Check for indirect jmp, direct and indirect calls. */ ++ if (add_padding ++ && i.disp_operands ++ && tls_get_addr ++ && (i.op[0].disps->X_op == O_symbol ++ || (i.op[0].disps->X_op == O_subtract ++ && i.op[0].disps->X_op_symbol == GOT_symbol))) ++ { ++ symbolS *s = i.op[0].disps->X_add_symbol; ++ /* No padding to call to global or undefined tls_get_addr. */ ++ if ((S_IS_EXTERNAL (s) || !S_IS_DEFINED (s)) ++ && strcmp (S_GET_NAME (s), tls_get_addr) == 0) ++ return FALSE; ++ } ++ } ++ ++ if (add_padding ++ && last_insn.kind != last_insn_other ++ && last_insn.seg == now_seg) ++ { ++ if (flag_debug) ++ as_warn_where (last_insn.file, last_insn.line, ++ _("`%s` skips -malign-branch-boundary on `%s`"), ++ last_insn.name, i.tm.name); ++ return FALSE; ++ } ++ ++ return add_padding; ++} ++ ++static unsigned int ++encoding_length (const fragS *start_frag, offsetT start_off, ++ const char *frag_now_ptr) ++{ ++ unsigned int len = 0; ++ ++ if (start_frag != frag_now) ++ { ++ const fragS *fr = start_frag; ++ ++ do ++ { ++ len += fr->fr_fix; ++ fr = fr->fr_next; ++ } ++ while (fr && fr != frag_now); ++ } ++ ++ return len - start_off + (frag_now_ptr - frag_now->fr_literal); ++} ++ + static void + output_insn (void) + { + fragS *insn_start_frag; + offsetT insn_start_off; ++ fragS *fragP = NULL; ++ enum align_branch_kind branch = align_branch_none; + + /* Tie dwarf2 debug info to the address at the start of the insn. + We can't do this after the insn has been output as the current +@@ -7176,6 +7437,30 @@ output_insn (void) + insn_start_frag = frag_now; + insn_start_off = frag_now_fix (); + ++ if (add_branch_padding_frag_p (&branch)) ++ { ++ char *p; ++ unsigned int max_branch_padding_size = 14; ++ ++ /* Align section to boundary. */ ++ record_alignment (now_seg, align_branch_power); ++ ++ /* Make room for padding. */ ++ frag_grow (max_branch_padding_size); ++ ++ /* Start of the padding. */ ++ p = frag_more (0); ++ ++ fragP = frag_now; ++ ++ frag_var (rs_machine_dependent, max_branch_padding_size, 0, ++ ENCODE_RELAX_STATE (BRANCH_PADDING, 0), ++ NULL, 0, p); ++ ++ fragP->tc_frag_data.branch_type = branch; ++ fragP->tc_frag_data.max_bytes = max_branch_padding_size; ++ } ++ + /* Output jumps. */ + if (i.tm.opcode_modifier.jump) + output_branch (); +@@ -7217,6 +7502,44 @@ output_insn (void) + i.prefix[LOCK_PREFIX] = 0; + } + ++ if (branch) ++ /* Skip if this is a branch. */ ++ ; ++ else if (add_fused_jcc_padding_frag_p ()) ++ { ++ unsigned int max_fused_padding_size ++ = MAX_FUSED_JCC_PADDING_SIZE; ++ ++ /* Make room for padding. */ ++ frag_grow (max_fused_padding_size); ++ p = frag_more (0); ++ ++ fragP = frag_now; ++ ++ frag_var (rs_machine_dependent, max_fused_padding_size, 0, ++ ENCODE_RELAX_STATE (FUSED_JCC_PADDING, 0), ++ NULL, 0, p); ++ ++ fragP->tc_frag_data.branch_type = align_branch_fused; ++ fragP->tc_frag_data.max_bytes = max_fused_padding_size; ++ } ++ else if (add_branch_prefix_frag_p ()) ++ { ++ unsigned int max_prefix_size = align_branch_prefix_size; ++ ++ /* Make room for padding. */ ++ frag_grow (max_prefix_size); ++ p = frag_more (0); ++ ++ fragP = frag_now; ++ ++ frag_var (rs_machine_dependent, max_prefix_size, 0, ++ ENCODE_RELAX_STATE (BRANCH_PREFIX, 0), ++ NULL, 0, p); ++ ++ fragP->tc_frag_data.max_bytes = max_prefix_size; ++ } ++ + /* Since the VEX/EVEX prefix contains the implicit prefix, we + don't need the explicit prefix. */ + if (!i.tm.opcode_modifier.vex && !i.tm.opcode_modifier.evex) +@@ -7358,6 +7681,83 @@ check_prefix: + + if (i.imm_operands) + output_imm (insn_start_frag, insn_start_off); ++ ++ if (now_seg != absolute_section) ++ { ++ j = encoding_length (insn_start_frag, insn_start_off, frag_more (0)); ++ if (fragP) ++ { ++ /* NB: Don't add prefix with GOTPC relocation since ++ output_disp() above depends on the fixed encoding ++ length. */ ++ unsigned int max = i.has_gotpc_reloc ? 0 : 15 - j; ++ /* Prefix count on the current instruction. */ ++ unsigned int count = 0; ++ unsigned int k; ++ for (k = 0; k < ARRAY_SIZE (i.prefix); k++) ++ if (i.prefix[k]) ++ count++; ++ ++ /* NB: prefix count + instruction size must be <= 15. */ ++ if (j > 15) ++ as_fatal (_("instruction length of %u bytes exceeds the limit of 15"), ++ j); ++ ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) ++ == BRANCH_PREFIX) ++ { ++ /* Set the maximum prefix size in BRANCH_PREFIX ++ frag. */ ++ if (fragP->tc_frag_data.max_bytes > max) ++ fragP->tc_frag_data.max_bytes = max; ++ if (fragP->tc_frag_data.max_bytes > count) ++ fragP->tc_frag_data.max_bytes -= count; ++ else ++ fragP->tc_frag_data.max_bytes = 0; ++ } ++ else ++ { ++ /* Remember the maximum prefix size in FUSED_JCC_PADDING ++ frag. */ ++ unsigned int max_prefix_size; ++ if (align_branch_prefix_size > max) ++ max_prefix_size = max; ++ else ++ max_prefix_size = align_branch_prefix_size; ++ if (max_prefix_size > count) ++ fragP->tc_frag_data.max_prefix_length ++ = max_prefix_size - count; ++ } ++ ++ /* Use existing segment prefix if possible. Use CS ++ segment prefix in 64-bit mode. In 32-bit mode, use SS ++ segment prefix with ESP/EBP base register and use DS ++ segment prefix without ESP/EBP base register. */ ++ if (i.prefix[SEG_PREFIX]) ++ fragP->tc_frag_data.default_prefix = i.prefix[SEG_PREFIX]; ++ else if (flag_code == CODE_64BIT) ++ fragP->tc_frag_data.default_prefix = CS_PREFIX_OPCODE; ++ else if (i.base_reg ++ && (i.base_reg->reg_num == 4 ++ || i.base_reg->reg_num == 5)) ++ fragP->tc_frag_data.default_prefix = SS_PREFIX_OPCODE; ++ else ++ fragP->tc_frag_data.default_prefix = DS_PREFIX_OPCODE; ++ } ++ else if (j > 15) ++ as_warn (_("instruction length of %u bytes exceeds the limit of 15"), ++ j); ++ } ++ } ++ ++ if (align_branch_power ++ && now_seg != absolute_section ++ && cpu_arch_flags.bitfield.cpui386) ++ { ++ /* Terminate each frag so that we can add prefix and check for ++ fused jcc. */ ++ frag_wane (frag_now); ++ frag_new (0); + } + + #ifdef DEBUG386 +@@ -7484,6 +7884,7 @@ output_disp (fragS *insn_start_frag, off + { + reloc_type = BFD_RELOC_386_GOTPC; + i.op[n].imms->X_add_number += add; ++ i.has_gotpc_reloc = TRUE; + } + else if (reloc_type == BFD_RELOC_64) + reloc_type = BFD_RELOC_X86_64_GOTPC64; +@@ -7649,6 +8050,7 @@ output_imm (fragS *insn_start_frag, offs + reloc_type = BFD_RELOC_X86_64_GOTPC32; + else if (size == 8) + reloc_type = BFD_RELOC_X86_64_GOTPC64; ++ i.has_gotpc_reloc = TRUE; + i.op[n].imms->X_add_number += add; + } + fix_new_exp (frag_now, p - frag_now->fr_literal, size, +@@ -9264,6 +9666,355 @@ elf_symbol_resolved_in_segment_p (symbol + } + #endif + ++/* Return the next non-empty frag. */ ++ ++static fragS * ++i386_next_non_empty_frag (fragS *fragP) ++{ ++ /* There may be a frag with a ".fill 0" when there is no room in ++ the current frag for frag_grow in output_insn. */ ++ for (fragP = fragP->fr_next; ++ (fragP != NULL ++ && fragP->fr_type == rs_fill ++ && fragP->fr_fix == 0); ++ fragP = fragP->fr_next) ++ ; ++ return fragP; ++} ++ ++/* Return the next jcc frag after BRANCH_PADDING. */ ++ ++static fragS * ++i386_next_jcc_frag (fragS *fragP) ++{ ++ if (!fragP) ++ return NULL; ++ ++ if (fragP->fr_type == rs_machine_dependent ++ && (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) ++ == BRANCH_PADDING)) ++ { ++ fragP = i386_next_non_empty_frag (fragP); ++ if (fragP->fr_type != rs_machine_dependent) ++ return NULL; ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == COND_JUMP) ++ return fragP; ++ } ++ ++ return NULL; ++} ++ ++/* Classify BRANCH_PADDING, BRANCH_PREFIX and FUSED_JCC_PADDING frags. */ ++ ++static void ++i386_classify_machine_dependent_frag (fragS *fragP) ++{ ++ fragS *cmp_fragP; ++ fragS *pad_fragP; ++ fragS *branch_fragP; ++ fragS *next_fragP; ++ unsigned int max_prefix_length; ++ ++ if (fragP->tc_frag_data.classified) ++ return; ++ ++ /* First scan for BRANCH_PADDING and FUSED_JCC_PADDING. Convert ++ FUSED_JCC_PADDING and merge BRANCH_PADDING. */ ++ for (next_fragP = fragP; ++ next_fragP != NULL; ++ next_fragP = next_fragP->fr_next) ++ { ++ next_fragP->tc_frag_data.classified = 1; ++ if (next_fragP->fr_type == rs_machine_dependent) ++ switch (TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype)) ++ { ++ case BRANCH_PADDING: ++ /* The BRANCH_PADDING frag must be followed by a branch ++ frag. */ ++ branch_fragP = i386_next_non_empty_frag (next_fragP); ++ next_fragP->tc_frag_data.u.branch_fragP = branch_fragP; ++ break; ++ case FUSED_JCC_PADDING: ++ /* Check if this is a fused jcc: ++ FUSED_JCC_PADDING ++ CMP ++ BRANCH_PADDING ++ COND_JUMP ++ */ ++ cmp_fragP = i386_next_non_empty_frag (next_fragP); ++ pad_fragP = i386_next_non_empty_frag (cmp_fragP); ++ branch_fragP = i386_next_jcc_frag (pad_fragP); ++ if (branch_fragP) ++ { ++ /* The BRANCH_PADDING frag is merged with the ++ FUSED_JCC_PADDING frag. */ ++ next_fragP->tc_frag_data.u.branch_fragP = branch_fragP; ++ /* CMP instruction size. */ ++ next_fragP->tc_frag_data.cmp_size = cmp_fragP->fr_fix; ++ frag_wane (pad_fragP); ++ /* Skip to branch_fragP. */ ++ next_fragP = branch_fragP; ++ } ++ else if (next_fragP->tc_frag_data.max_prefix_length) ++ { ++ /* Turn FUSED_JCC_PADDING into BRANCH_PREFIX if it isn't ++ a fused jcc. */ ++ next_fragP->fr_subtype ++ = ENCODE_RELAX_STATE (BRANCH_PREFIX, 0); ++ next_fragP->tc_frag_data.max_bytes ++ = next_fragP->tc_frag_data.max_prefix_length; ++ /* This will be updated in the BRANCH_PREFIX scan. */ ++ next_fragP->tc_frag_data.max_prefix_length = 0; ++ } ++ else ++ frag_wane (next_fragP); ++ break; ++ } ++ } ++ ++ /* Scan for BRANCH_PREFIX. */ ++ for (; fragP != NULL; fragP = fragP->fr_next) ++ if (fragP->fr_type == rs_machine_dependent ++ && (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) ++ == BRANCH_PREFIX)) ++ { ++ /* Count all BRANCH_PREFIX frags before BRANCH_PADDING and ++ COND_JUMP_PREFIX. */ ++ max_prefix_length = 0; ++ for (next_fragP = fragP; ++ next_fragP != NULL; ++ next_fragP = next_fragP->fr_next) ++ { ++ if (next_fragP->fr_type == rs_fill) ++ /* Skip rs_fill frags. */ ++ ; ++ else if (next_fragP->fr_type == rs_machine_dependent) ++ { ++ if (TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype) ++ == BRANCH_PREFIX) ++ { ++ /* Count BRANCH_PREFIX frags. */ ++ if (max_prefix_length >= MAX_FUSED_JCC_PADDING_SIZE) ++ { ++ max_prefix_length = MAX_FUSED_JCC_PADDING_SIZE; ++ frag_wane (next_fragP); ++ } ++ else ++ max_prefix_length ++ += next_fragP->tc_frag_data.max_bytes; ++ } ++ else if ((TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype) ++ == BRANCH_PADDING) ++ || (TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype) ++ == FUSED_JCC_PADDING)) ++ { ++ /* Stop at BRANCH_PADDING and FUSED_JCC_PADDING. */ ++ fragP->tc_frag_data.u.padding_fragP = next_fragP; ++ break; ++ } ++ else ++ /* Stop for other rs_machine_dependent frags. */ ++ break; ++ } ++ else ++ /* Stop for all other frags. */ ++ break; ++ } ++ ++ fragP->tc_frag_data.max_prefix_length = max_prefix_length; ++ ++ /* Skip to the next frag. */ ++ fragP = next_fragP; ++ } ++} ++ ++/* Compute padding size for ++ ++ FUSED_JCC_PADDING ++ CMP ++ BRANCH_PADDING ++ COND_JUMP/UNCOND_JUMP ++ ++ or ++ ++ BRANCH_PADDING ++ COND_JUMP/UNCOND_JUMP ++ */ ++ ++static int ++i386_branch_padding_size (fragS *fragP, offsetT address) ++{ ++ unsigned int offset, size, padding_size; ++ fragS *branch_fragP = fragP->tc_frag_data.u.branch_fragP; ++ ++ /* The start address of the BRANCH_PADDING or FUSED_JCC_PADDING frag. */ ++ if (!address) ++ address = fragP->fr_address; ++ address += fragP->fr_fix; ++ ++ /* CMP instrunction size. */ ++ size = fragP->tc_frag_data.cmp_size; ++ ++ /* The base size of the branch frag. */ ++ size += branch_fragP->fr_fix; ++ ++ /* Add opcode and displacement bytes for the rs_machine_dependent ++ branch frag. */ ++ if (branch_fragP->fr_type == rs_machine_dependent) ++ size += md_relax_table[branch_fragP->fr_subtype].rlx_length; ++ ++ /* Check if branch is within boundary and doesn't end at the last ++ byte. */ ++ offset = address & ((1U << align_branch_power) - 1); ++ if ((offset + size) >= (1U << align_branch_power)) ++ /* Padding needed to avoid crossing boundary. */ ++ padding_size = (1 << align_branch_power) - offset; ++ else ++ /* No padding needed. */ ++ padding_size = 0; ++ ++ if (!fits_in_signed_byte (padding_size)) ++ abort (); ++ ++ return padding_size; ++} ++ ++/* i386_generic_table_relax_frag() ++ ++ Handle BRANCH_PADDING, BRANCH_PREFIX and FUSED_JCC_PADDING frags to ++ grow/shrink padding to align branch frags. Hand others to ++ relax_frag(). */ ++ ++long ++i386_generic_table_relax_frag (segT segment, fragS *fragP, long stretch) ++{ ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PADDING ++ || TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == FUSED_JCC_PADDING) ++ { ++ long padding_size = i386_branch_padding_size (fragP, 0); ++ long grow = padding_size - fragP->tc_frag_data.length; ++ ++ /* When the BRANCH_PREFIX frag is used, the computed address ++ must match the actual address and there should be no padding. */ ++ if (fragP->tc_frag_data.padding_address ++ && (fragP->tc_frag_data.padding_address != fragP->fr_address ++ || padding_size)) ++ abort (); ++ ++ /* Update the padding size. */ ++ if (grow) ++ fragP->tc_frag_data.length = padding_size; ++ ++ return grow; ++ } ++ else if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PREFIX) ++ { ++ fragS *padding_fragP, *next_fragP; ++ long padding_size, left_size, last_size; ++ ++ padding_fragP = fragP->tc_frag_data.u.padding_fragP; ++ if (!padding_fragP) ++ /* Use the padding set by the leading BRANCH_PREFIX frag. */ ++ return (fragP->tc_frag_data.length ++ - fragP->tc_frag_data.last_length); ++ ++ /* Compute the relative address of the padding frag in the very ++ first time where the BRANCH_PREFIX frag sizes are zero. */ ++ if (!fragP->tc_frag_data.padding_address) ++ fragP->tc_frag_data.padding_address ++ = padding_fragP->fr_address - (fragP->fr_address - stretch); ++ ++ /* First update the last length from the previous interation. */ ++ left_size = fragP->tc_frag_data.prefix_length; ++ for (next_fragP = fragP; ++ next_fragP != padding_fragP; ++ next_fragP = next_fragP->fr_next) ++ if (next_fragP->fr_type == rs_machine_dependent ++ && (TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype) ++ == BRANCH_PREFIX)) ++ { ++ if (left_size) ++ { ++ int max = next_fragP->tc_frag_data.max_bytes; ++ if (max) ++ { ++ int size; ++ if (max > left_size) ++ size = left_size; ++ else ++ size = max; ++ left_size -= size; ++ next_fragP->tc_frag_data.last_length = size; ++ } ++ } ++ else ++ next_fragP->tc_frag_data.last_length = 0; ++ } ++ ++ /* Check the padding size for the padding frag. */ ++ padding_size = i386_branch_padding_size ++ (padding_fragP, (fragP->fr_address ++ + fragP->tc_frag_data.padding_address)); ++ ++ last_size = fragP->tc_frag_data.prefix_length; ++ /* Check if there is change from the last interation. */ ++ if (padding_size == last_size) ++ { ++ /* Update the expected address of the padding frag. */ ++ padding_fragP->tc_frag_data.padding_address ++ = (fragP->fr_address + padding_size ++ + fragP->tc_frag_data.padding_address); ++ return 0; ++ } ++ ++ if (padding_size > fragP->tc_frag_data.max_prefix_length) ++ { ++ /* No padding if there is no sufficient room. Clear the ++ expected address of the padding frag. */ ++ padding_fragP->tc_frag_data.padding_address = 0; ++ padding_size = 0; ++ } ++ else ++ /* Store the expected address of the padding frag. */ ++ padding_fragP->tc_frag_data.padding_address ++ = (fragP->fr_address + padding_size ++ + fragP->tc_frag_data.padding_address); ++ ++ fragP->tc_frag_data.prefix_length = padding_size; ++ ++ /* Update the length for the current interation. */ ++ left_size = padding_size; ++ for (next_fragP = fragP; ++ next_fragP != padding_fragP; ++ next_fragP = next_fragP->fr_next) ++ if (next_fragP->fr_type == rs_machine_dependent ++ && (TYPE_FROM_RELAX_STATE (next_fragP->fr_subtype) ++ == BRANCH_PREFIX)) ++ { ++ if (left_size) ++ { ++ int max = next_fragP->tc_frag_data.max_bytes; ++ if (max) ++ { ++ int size; ++ if (max > left_size) ++ size = left_size; ++ else ++ size = max; ++ left_size -= size; ++ next_fragP->tc_frag_data.length = size; ++ } ++ } ++ else ++ next_fragP->tc_frag_data.length = 0; ++ } ++ ++ return (fragP->tc_frag_data.length ++ - fragP->tc_frag_data.last_length); ++ } ++ return relax_frag (segment, fragP, stretch); ++} ++ + /* md_estimate_size_before_relax() + + Called just before relax() for rs_machine_dependent frags. The x86 +@@ -9280,6 +10031,14 @@ elf_symbol_resolved_in_segment_p (symbol + int + md_estimate_size_before_relax (fragS *fragP, segT segment) + { ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PADDING ++ || TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PREFIX ++ || TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == FUSED_JCC_PADDING) ++ { ++ i386_classify_machine_dependent_frag (fragP); ++ return fragP->tc_frag_data.length; ++ } ++ + /* We've already got fragP->fr_subtype right; all we have to do is + check for un-relaxable symbols. On an ELF system, we can't relax + an externally visible symbol, because it may be overridden by a +@@ -9409,6 +10168,109 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU + unsigned int extension = 0; + offsetT displacement_from_opcode_start; + ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PADDING ++ || TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == FUSED_JCC_PADDING ++ || TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PREFIX) ++ { ++ /* Generate nop padding. */ ++ unsigned int size = fragP->tc_frag_data.length; ++ ++ if (size == 0) ++ return; ++ ++ if (size > fragP->tc_frag_data.max_bytes) ++ abort (); ++ ++ if (flag_debug) ++ { ++ const char *msg; ++ const char *branch = "branch"; ++ const char *prefix = ""; ++ fragS *padding_fragP; ++ ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) ++ == BRANCH_PREFIX) ++ { ++ padding_fragP = fragP->tc_frag_data.u.padding_fragP; ++ switch (fragP->tc_frag_data.default_prefix) ++ { ++ default: ++ abort (); ++ break; ++ case CS_PREFIX_OPCODE: ++ prefix = " cs"; ++ break; ++ case DS_PREFIX_OPCODE: ++ prefix = " ds"; ++ break; ++ case ES_PREFIX_OPCODE: ++ prefix = " es"; ++ break; ++ case FS_PREFIX_OPCODE: ++ prefix = " fs"; ++ break; ++ case GS_PREFIX_OPCODE: ++ prefix = " gs"; ++ break; ++ case SS_PREFIX_OPCODE: ++ prefix = " ss"; ++ break; ++ } ++ if (padding_fragP) ++ msg = _("%s:%u: add %d%s at 0x%llx to align " ++ "%s within %d-byte boundary\n"); ++ else ++ msg = _("%s:%u: add additional %d%s at 0x%llx to " ++ "align %s within %d-byte boundary\n"); ++ } ++ else ++ { ++ padding_fragP = fragP; ++ msg = _("%s:%u: add %d%s-byte nop at 0x%llx to align " ++ "%s within %d-byte boundary\n"); ++ } ++ ++ if (padding_fragP) ++ switch (padding_fragP->tc_frag_data.branch_type) ++ { ++ case align_branch_jcc: ++ branch = "jcc"; ++ break; ++ case align_branch_fused: ++ branch = "fused jcc"; ++ break; ++ case align_branch_jmp: ++ branch = "jmp"; ++ break; ++ case align_branch_call: ++ branch = "call"; ++ break; ++ case align_branch_indirect: ++ branch = "indiret branch"; ++ break; ++ case align_branch_ret: ++ branch = "ret"; ++ break; ++ default: ++ break; ++ } ++ ++ fprintf (stdout, msg, ++ fragP->fr_file, fragP->fr_line, size, prefix, ++ (long long) fragP->fr_address, branch, ++ 1 << align_branch_power); ++ } ++ ++ if (TYPE_FROM_RELAX_STATE (fragP->fr_subtype) == BRANCH_PREFIX) ++ memset (fragP->fr_opcode, ++ fragP->tc_frag_data.default_prefix, size); ++ else ++ i386_align_code (fragP, size); ++ fragP->fr_fix += size; ++ ++ return; ++ } ++ + opcode = (unsigned char *) fragP->fr_opcode; + + /* Address we want to reach in file space. */ +@@ -9963,6 +10825,10 @@ const char *md_shortopts = "qn"; + #define OPTION_MINTEL64 (OPTION_MD_BASE + 23) + #define OPTION_MFENCE_AS_LOCK_ADD (OPTION_MD_BASE + 24) + #define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 25) ++#define OPTION_MALIGN_BRANCH_BOUNDARY (OPTION_MD_BASE + 27) ++#define OPTION_MALIGN_BRANCH_PREFIX_SIZE (OPTION_MD_BASE + 28) ++#define OPTION_MALIGN_BRANCH (OPTION_MD_BASE + 29) ++#define OPTION_MBRANCHES_WITH_32B_BOUNDARIES (OPTION_MD_BASE + 30) + + struct option md_longopts[] = + { +@@ -9997,6 +10863,10 @@ struct option md_longopts[] = + {"mfence-as-lock-add", required_argument, NULL, OPTION_MFENCE_AS_LOCK_ADD}, + {"mrelax-relocations", required_argument, NULL, OPTION_MRELAX_RELOCATIONS}, + {"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG}, ++ {"malign-branch-boundary", required_argument, NULL, OPTION_MALIGN_BRANCH_BOUNDARY}, ++ {"malign-branch-prefix-size", required_argument, NULL, OPTION_MALIGN_BRANCH_PREFIX_SIZE}, ++ {"malign-branch", required_argument, NULL, OPTION_MALIGN_BRANCH}, ++ {"mbranches-within-32B-boundaries", no_argument, NULL, OPTION_MBRANCHES_WITH_32B_BOUNDARIES}, + {"mamd64", no_argument, NULL, OPTION_MAMD64}, + {"mintel64", no_argument, NULL, OPTION_MINTEL64}, + {NULL, no_argument, NULL, 0} +@@ -10007,7 +10877,7 @@ int + md_parse_option (int c, const char *arg) + { + unsigned int j; +- char *arch, *next, *saved; ++ char *arch, *next, *saved, *type; + + switch (c) + { +@@ -10110,6 +10980,82 @@ md_parse_option (int c, const char *arg) + #endif + break; + ++ case OPTION_MALIGN_BRANCH_BOUNDARY: ++ { ++ char *end; ++ int align = strtoul (arg, &end, 0); ++ ++ if (*end == '\0') ++ { ++ if (align == 0) ++ { ++ align_branch_power = 0; ++ break; ++ } ++ else if (align >= 32) ++ { ++ int align_power; ++ ++ for (align_power = 0; ++ (align & 1) == 0; ++ align >>= 1, align_power++) ++ continue; ++ ++ if (align == 1) ++ { ++ align_branch_power = align_power; ++ break; ++ } ++ } ++ } ++ as_fatal (_("invalid -malign-branch-boundary= value: %s"), arg); ++ } ++ break; ++ ++ case OPTION_MALIGN_BRANCH_PREFIX_SIZE: ++ { ++ char *end; ++ int align = strtoul (arg, &end, 0); ++ ++ if (*end == '\0' && align >= 0 && align < 6) ++ { ++ align_branch_prefix_size = align; ++ break; ++ } ++ as_fatal (_("invalid -malign-branch-prefix-size= value: %s"), ++ arg); ++ } ++ break; ++ ++ case OPTION_MALIGN_BRANCH: ++ align_branch = 0; ++ saved = xstrdup (arg); ++ type = saved; ++ do ++ { ++ next = strchr (type, '+'); ++ if (next) ++ *next++ = '\0'; ++ if (strcasecmp (type, "jcc") == 0) ++ align_branch |= align_branch_jcc; ++ else if (strcasecmp (type, "fused") == 0) ++ align_branch |= align_branch_fused; ++ else if (strcasecmp (type, "jmp") == 0) ++ align_branch |= align_branch_jmp; ++ else if (strcasecmp (type, "call") == 0) ++ align_branch |= align_branch_call; ++ else if (strcasecmp (type, "ret") == 0) ++ align_branch |= align_branch_ret; ++ else if (strcasecmp (type, "indirect") == 0) ++ align_branch |= align_branch_indirect; ++ else ++ as_fatal (_("invalid -malign-branch= option: `%s'"), arg); ++ type = next; ++ } ++ while (next != NULL); ++ free (saved); ++ break; ++ + case OPTION_MARCH: + saved = xstrdup (arg); + arch = saved; +@@ -10363,6 +11309,14 @@ md_parse_option (int c, const char *arg) + as_fatal (_("invalid -mrelax-relocations= option: `%s'"), arg); + break; + ++ case OPTION_MBRANCHES_WITH_32B_BOUNDARIES: ++ align_branch_power = 5; ++ align_branch_prefix_size = 5; ++ align_branch = (align_branch_jcc ++ | align_branch_fused ++ | align_branch_jmp); ++ break; ++ + case OPTION_MAMD64: + intel64 = 0; + break; +@@ -10567,6 +11521,20 @@ md_show_usage (FILE *stream) + -mrelax-relocations=[no|yes]\n\ + generate relax relocations\n")); + fprintf (stream, _("\ ++ -malign-branch-boundary=NUM (default: 0)\n\ ++ align branches within NUM byte boundary\n")); ++ fprintf (stream, _("\ ++ -malign-branch=TYPE[+TYPE...] (default: jcc+fused+jmp)\n\ ++ TYPE is combination of jcc, fused, jmp, call, ret,\n\ ++ indirect\n\ ++ specify types of branches to align\n")); ++ fprintf (stream, _("\ ++ -malign-branch-prefix-size=NUM (default: 5)\n\ ++ align branches with NUM prefixes per instruction\n")); ++ fprintf (stream, _("\ ++ -mbranches-within-32B-boundaries\n\ ++ align branches within 32 byte boundary\n")); ++ fprintf (stream, _("\ + -mamd64 accept only AMD64 ISA\n")); + fprintf (stream, _("\ + -mintel64 accept only Intel64 ISA\n")); +@@ -10650,17 +11618,26 @@ i386_target_format (void) + { + default: + format = ELF_TARGET_FORMAT; ++#ifndef TE_SOLARIS ++ tls_get_addr = "___tls_get_addr"; ++#endif + break; + case X86_64_ABI: + use_rela_relocations = 1; + object_64bit = 1; + format = ELF_TARGET_FORMAT64; ++#ifndef TE_SOLARIS ++ tls_get_addr = "__tls_get_addr"; ++#endif + break; + case X86_64_X32_ABI: + use_rela_relocations = 1; + object_64bit = 1; + disallow_64bit_reloc = 1; + format = ELF_TARGET_FORMAT32; ++#ifndef TE_SOLARIS ++ tls_get_addr = "__tls_get_addr"; ++#endif + break; + } + if (cpu_arch_isa == PROCESSOR_L1OM) +@@ -10775,6 +11752,21 @@ s_bss (int ignore ATTRIBUTE_UNUSED) + + #endif + ++/* Remember constant diretive. */ ++ ++void ++i386_cons_worker (int ignore ATTRIBUTE_UNUSED) ++{ ++ if (last_insn.kind != last_insn_directive ++ && (bfd_get_section_flags (NULL, now_seg) & SEC_CODE)) ++ { ++ last_insn.seg = now_seg; ++ last_insn.kind = last_insn_directive; ++ last_insn.name = "constant diretive"; ++ last_insn.file = as_where (&last_insn.line); ++ } ++} ++ + void + i386_validate_fix (fixS *fixp) + { +diff -rupN binutils.orig/gas/config/tc-i386.h binutils-2.30/gas/config/tc-i386.h +--- binutils.orig/gas/config/tc-i386.h 2019-11-20 10:59:21.585883785 +0000 ++++ binutils-2.30/gas/config/tc-i386.h 2019-11-20 15:24:24.677440688 +0000 +@@ -215,12 +215,19 @@ if (fragP->fr_type == rs_align_code) + - fragP->fr_address \ + - fragP->fr_fix)); + ++extern void i386_cons_worker (int); ++#define md_cons_align(nbytes) i386_cons_worker (nbytes) ++ + void i386_print_statistics (FILE *); + #define tc_print_statistics i386_print_statistics + + extern unsigned int i386_frag_max_var (fragS *); + #define md_frag_max_var i386_frag_max_var + ++extern long i386_generic_table_relax_frag (segT, fragS *, long); ++#define md_generic_table_relax_frag(segment, fragP, stretch) \ ++ i386_generic_table_relax_frag (segment, fragP, stretch) ++ + #define md_number_to_chars number_to_chars_littleendian + + enum processor_type +@@ -255,9 +262,24 @@ extern i386_cpu_flags cpu_arch_isa_flags + + struct i386_tc_frag_data + { ++ union ++ { ++ fragS *padding_fragP; ++ fragS *branch_fragP; ++ } u; ++ addressT padding_address; + enum processor_type isa; + i386_cpu_flags isa_flags; ++ unsigned int max_bytes; + enum processor_type tune; ++ signed char length; ++ signed char last_length; ++ signed char max_prefix_length; ++ signed char prefix_length; ++ signed char default_prefix; ++ signed char cmp_size; ++ unsigned int classified : 1; ++ unsigned int branch_type : 7; + }; + + /* We need to emit the right NOP pattern in .align frags. This is +@@ -268,9 +290,20 @@ struct i386_tc_frag_data + #define TC_FRAG_INIT(FRAGP) \ + do \ + { \ ++ (FRAGP)->tc_frag_data.u.padding_fragP = NULL; \ ++ (FRAGP)->tc_frag_data.padding_address = 0; \ + (FRAGP)->tc_frag_data.isa = cpu_arch_isa; \ + (FRAGP)->tc_frag_data.isa_flags = cpu_arch_isa_flags; \ + (FRAGP)->tc_frag_data.tune = cpu_arch_tune; \ ++ (FRAGP)->tc_frag_data.length = 0; \ ++ (FRAGP)->tc_frag_data.max_bytes = max_chars; \ ++ (FRAGP)->tc_frag_data.last_length = 0; \ ++ (FRAGP)->tc_frag_data.max_prefix_length = 0; \ ++ (FRAGP)->tc_frag_data.prefix_length = 0; \ ++ (FRAGP)->tc_frag_data.default_prefix = 0; \ ++ (FRAGP)->tc_frag_data.cmp_size = 0; \ ++ (FRAGP)->tc_frag_data.classified = 0; \ ++ (FRAGP)->tc_frag_data.branch_type = 0; \ + } \ + while (0) + +diff -rupN binutils.orig/gas/doc/c-i386.texi binutils-2.30/gas/doc/c-i386.texi +--- binutils.orig/gas/doc/c-i386.texi 2019-11-20 10:59:21.590883746 +0000 ++++ binutils-2.30/gas/doc/c-i386.texi 2019-11-20 15:08:24.874736461 +0000 +@@ -389,6 +389,43 @@ R_X86_64_REX_GOTPCRELX, in 64-bit mode. + relocations. The default can be controlled by a configure option + @option{--enable-x86-relax-relocations}. + ++@cindex @samp{-malign-branch-boundary=} option, i386 ++@cindex @samp{-malign-branch-boundary=} option, x86-64 ++@item -malign-branch-boundary=@var{NUM} ++This option controls how the assembler should align branches with segment ++prefixes or NOP. @var{NUM} must be a power of 2. It should be 0 or ++no less than 32. Branches will be aligned within @var{NUM} byte ++boundary. @option{-malign-branch-boundary=0}, which is the default, ++doesn't align branches. ++ ++@cindex @samp{-malign-branch=} option, i386 ++@cindex @samp{-malign-branch=} option, x86-64 ++@item -malign-branch=@var{TYPE}[+@var{TYPE}...] ++This option specifies types of branches to align. @var{TYPE} is ++combination of @samp{jcc}, which aligns conditional jumps, ++@samp{fused}, which aligns fused conditional jumps, @samp{jmp}, ++which aligns unconditional jumps, @samp{call} which aligns calls, ++@samp{ret}, which aligns rets, @samp{indirect}, which aligns indirect ++jumps and calls. The default is @option{-malign-branch=jcc+fused+jmp}. ++ ++@cindex @samp{-malign-branch-prefix-size=} option, i386 ++@cindex @samp{-malign-branch-prefix-size=} option, x86-64 ++@item -malign-branch-prefix-size=@var{NUM} ++This option specifies the maximum number of prefixes on an instruction ++to align branches. @var{NUM} should be between 0 and 5. The default ++@var{NUM} is 5. ++ ++@cindex @samp{-mbranches-within-32B-boundaries} option, i386 ++@cindex @samp{-mbranches-within-32B-boundaries} option, x86-64 ++@item -mbranches-within-32B-boundaries ++This option aligns conditional jumps, fused conditional jumps and ++unconditional jumps within 32 byte boundary with up to 5 segment prefixes ++on an instruction. It is equivalent to ++@option{-malign-branch-boundary=32} ++@option{-malign-branch=jcc+fused+jmp} ++@option{-malign-branch-prefix-size=5}. ++The default doesn't align branches. ++ + @cindex @samp{-mevexrcig=} option, i386 + @cindex @samp{-mevexrcig=} option, x86-64 + @item -mevexrcig=@var{rne} +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1a.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1a.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1a.d 2019-11-20 14:09:25.593915106 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 65 65 a3 01 00 00 00 gs gs mov %eax,%gs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: 39 c5 cmp %eax,%ebp ++ 22: 74 5e je 82 ++ 24: 3e 89 73 f4 mov %esi,%ds:-0xc\(%ebx\) ++ 28: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 5d pop %ebp ++ 3e: 5d pop %ebp ++ 3f: 5d pop %ebp ++ 40: 74 40 je 82 ++ 42: 5d pop %ebp ++ 43: 74 3d je 82 ++ 45: 36 89 44 24 fc mov %eax,%ss:-0x4\(%esp\) ++ 4a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4d: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 50: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 53: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 56: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 59: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5f: 5d pop %ebp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 78: 5d pop %ebp ++ 79: 5d pop %ebp ++ 7a: 39 c5 cmp %eax,%ebp ++ 7c: 74 04 je 82 ++ 7e: 66 90 xchg %ax,%ax ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a0: 89 75 0c mov %esi,0xc\(%ebp\) ++ a3: e9 [0-9a-f ]+ jmp .* ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ c0: 89 75 00 mov %esi,0x0\(%ebp\) ++ c3: 74 c3 je 88 ++ c5: 74 c1 je 88 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1b.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1b.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1b.d 2019-11-20 14:09:25.593915106 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 65 65 a3 01 00 00 00 gs gs mov %eax,%gs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: 39 c5 cmp %eax,%ebp ++ 22: 74 5e je 82 ++ 24: 3e 89 73 f4 mov %esi,%ds:-0xc\(%ebx\) ++ 28: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 5d pop %ebp ++ 3e: 5d pop %ebp ++ 3f: 5d pop %ebp ++ 40: 74 40 je 82 ++ 42: 5d pop %ebp ++ 43: 74 3d je 82 ++ 45: 36 89 44 24 fc mov %eax,%ss:-0x4\(%esp\) ++ 4a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4d: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 50: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 53: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 56: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 59: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5f: 5d pop %ebp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 78: 5d pop %ebp ++ 79: 5d pop %ebp ++ 7a: 39 c5 cmp %eax,%ebp ++ 7c: 74 04 je 82 ++ 7e: 66 90 xchg %ax,%ax ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a0: 89 75 0c mov %esi,0xc\(%ebp\) ++ a3: e9 [0-9a-f ]+ jmp .* ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ c0: 89 75 00 mov %esi,0x0\(%ebp\) ++ c3: 74 c3 je 88 ++ c5: 74 c1 je 88 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1c.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1c.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1c.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1c.d 2019-11-20 14:09:25.594915098 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch-prefix-size=1 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 a3 01 00 00 00 mov %eax,%gs:0x1 ++ 6: 3e 55 ds push %ebp ++ 8: 3e 55 ds push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: 39 c5 cmp %eax,%ebp ++ 22: 74 5e je 82 ++ 24: 3e 89 73 f4 mov %esi,%ds:-0xc\(%ebx\) ++ 28: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 5d pop %ebp ++ 3e: 5d pop %ebp ++ 3f: 5d pop %ebp ++ 40: 74 40 je 82 ++ 42: 5d pop %ebp ++ 43: 74 3d je 82 ++ 45: 36 89 44 24 fc mov %eax,%ss:-0x4\(%esp\) ++ 4a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4d: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 50: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 53: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 56: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 59: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5f: 5d pop %ebp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 78: 5d pop %ebp ++ 79: 5d pop %ebp ++ 7a: 39 c5 cmp %eax,%ebp ++ 7c: 74 04 je 82 ++ 7e: 66 90 xchg %ax,%ax ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a0: 89 75 0c mov %esi,0xc\(%ebp\) ++ a3: e9 [0-9a-f ]+ jmp .* ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ c0: 89 75 00 mov %esi,0x0\(%ebp\) ++ c3: 74 c3 je 88 ++ c5: 74 c1 je 88 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1d.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1d.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1d.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1d.d 2019-11-20 14:09:25.594915098 +0000 +@@ -0,0 +1,76 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 65 65 a3 01 00 00 00 gs gs mov %eax,%gs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: 39 c5 cmp %eax,%ebp ++ 22: 74 5b je 7f ++ 24: 3e 89 73 f4 mov %esi,%ds:-0xc\(%ebx\) ++ 28: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 5d pop %ebp ++ 3e: 5d pop %ebp ++ 3f: 5d pop %ebp ++ 40: 74 3d je 7f ++ 42: 5d pop %ebp ++ 43: 74 3a je 7f ++ 45: 89 44 24 fc mov %eax,-0x4\(%esp\) ++ 49: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5e: 5d pop %ebp ++ 5f: eb 24 jmp 85 ++ 61: eb 22 jmp 85 ++ 63: eb 20 jmp 85 ++ 65: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 68: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 71: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 74: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 77: 5d pop %ebp ++ 78: 5d pop %ebp ++ 79: 39 c5 cmp %eax,%ebp ++ 7b: 74 02 je 7f ++ 7d: eb 06 jmp 85 ++ 7f: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 82: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 85: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8b: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 91: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 97: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9d: 89 75 0c mov %esi,0xc\(%ebp\) ++ a0: e9 [0-9a-f ]+ jmp .* ++ a5: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ab: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b1: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b7: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ bd: 89 75 00 mov %esi,0x0\(%ebp\) ++ c0: 74 c3 je 85 ++ c2: 74 c1 je 85 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1e.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1e.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1e.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1e.d 2019-11-20 14:09:25.594915098 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=jcc ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 a3 01 00 00 00 mov %eax,%gs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 89 e5 mov %esp,%ebp ++ c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1e: 39 c5 cmp %eax,%ebp ++ 20: 74 5a je 7c ++ 22: 89 73 f4 mov %esi,-0xc\(%ebx\) ++ 25: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 5d pop %ebp ++ 3b: 5d pop %ebp ++ 3c: 5d pop %ebp ++ 3d: 74 3d je 7c ++ 3f: 5d pop %ebp ++ 40: 74 3a je 7c ++ 42: 89 44 24 fc mov %eax,-0x4\(%esp\) ++ 46: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 49: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 4c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5b: 5d pop %ebp ++ 5c: eb 24 jmp 82 ++ 5e: eb 22 jmp 82 ++ 60: eb 20 jmp 82 ++ 62: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 65: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 68: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 71: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 74: 5d pop %ebp ++ 75: 5d pop %ebp ++ 76: 39 c5 cmp %eax,%ebp ++ 78: 74 02 je 7c ++ 7a: eb 06 jmp 82 ++ 7c: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 7f: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 82: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 75 0c mov %esi,0xc\(%ebp\) ++ 9d: e9 [0-9a-f ]+ jmp .* ++ a2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 75 00 mov %esi,0x0\(%ebp\) ++ bd: 74 c3 je 82 ++ bf: 90 nop ++ c0: 74 c0 je 82 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1f.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1f.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1f.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1f.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 a3 01 00 00 00 mov %eax,%gs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 89 e5 mov %esp,%ebp ++ c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1e: 39 c5 cmp %eax,%ebp ++ 20: 74 5c je 7e ++ 22: 89 73 f4 mov %esi,-0xc\(%ebx\) ++ 25: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 5d pop %ebp ++ 3b: 5d pop %ebp ++ 3c: 5d pop %ebp ++ 3d: 74 3f je 7e ++ 3f: 5d pop %ebp ++ 40: 74 3c je 7e ++ 42: 89 44 24 fc mov %eax,-0x4\(%esp\) ++ 46: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 49: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 4c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5b: 5d pop %ebp ++ 5c: eb 27 jmp 85 ++ 5e: 66 90 xchg %ax,%ax ++ 60: eb 23 jmp 85 ++ 62: eb 21 jmp 85 ++ 64: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 67: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6a: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 70: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 73: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 76: 5d pop %ebp ++ 77: 5d pop %ebp ++ 78: 39 c5 cmp %eax,%ebp ++ 7a: 74 02 je 7e ++ 7c: eb 07 jmp 85 ++ 7e: 36 8b 45 f4 mov %ss:-0xc\(%ebp\),%eax ++ 82: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 85: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8b: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 91: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 97: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9d: 89 75 0c mov %esi,0xc\(%ebp\) ++ a0: e9 [0-9a-f ]+ jmp .* ++ a5: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ab: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b1: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b7: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ bd: 89 75 00 mov %esi,0x0\(%ebp\) ++ c0: 74 c3 je 85 ++ c2: 74 c1 je 85 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1g.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1g.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1g.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1g.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,77 @@ ++#source: align-branch-1.s ++#as: -mbranches-within-32B-boundaries ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 65 65 a3 01 00 00 00 gs gs mov %eax,%gs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: 39 c5 cmp %eax,%ebp ++ 22: 74 5e je 82 ++ 24: 3e 89 73 f4 mov %esi,%ds:-0xc\(%ebx\) ++ 28: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2b: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 5d pop %ebp ++ 3e: 5d pop %ebp ++ 3f: 5d pop %ebp ++ 40: 74 40 je 82 ++ 42: 5d pop %ebp ++ 43: 74 3d je 82 ++ 45: 36 89 44 24 fc mov %eax,%ss:-0x4\(%esp\) ++ 4a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4d: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 50: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 53: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 56: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 59: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5f: 5d pop %ebp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 78: 5d pop %ebp ++ 79: 5d pop %ebp ++ 7a: 39 c5 cmp %eax,%ebp ++ 7c: 74 04 je 82 ++ 7e: 66 90 xchg %ax,%ax ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a0: 89 75 0c mov %esi,0xc\(%ebp\) ++ a3: e9 [0-9a-f ]+ jmp .* ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ c0: 89 75 00 mov %esi,0x0\(%ebp\) ++ c3: 74 c3 je 88 ++ c5: 74 c1 je 88 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1h.d binutils-2.30/gas/testsuite/gas/i386/align-branch-1h.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1h.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1h.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,76 @@ ++#source: align-branch-1.s ++#as: -mbranches-within-32B-boundaries -malign-branch-boundary=0 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 65 a3 01 00 00 00 mov %eax,%gs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 89 e5 mov %esp,%ebp ++ c: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1e: 39 c5 cmp %eax,%ebp ++ 20: 74 5a je 7c ++ 22: 89 73 f4 mov %esi,-0xc\(%ebx\) ++ 25: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 5d pop %ebp ++ 3b: 5d pop %ebp ++ 3c: 5d pop %ebp ++ 3d: 74 3d je 7c ++ 3f: 5d pop %ebp ++ 40: 74 3a je 7c ++ 42: 89 44 24 fc mov %eax,-0x4\(%esp\) ++ 46: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 49: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 4c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5b: 5d pop %ebp ++ 5c: eb 24 jmp 82 ++ 5e: eb 22 jmp 82 ++ 60: eb 20 jmp 82 ++ 62: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 65: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 68: 89 7d f8 mov %edi,-0x8\(%ebp\) ++ 6b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 71: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 74: 5d pop %ebp ++ 75: 5d pop %ebp ++ 76: 39 c5 cmp %eax,%ebp ++ 78: 74 02 je 7c ++ 7a: eb 06 jmp 82 ++ 7c: 8b 45 f4 mov -0xc\(%ebp\),%eax ++ 7f: 89 45 fc mov %eax,-0x4\(%ebp\) ++ 82: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ 9a: 89 75 0c mov %esi,0xc\(%ebp\) ++ 9d: e9 [0-9a-f ]+ jmp .* ++ a2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ a8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ae: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ b4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%ebp\) ++ ba: 89 75 00 mov %esi,0x0\(%ebp\) ++ bd: 74 c3 je 82 ++ bf: 74 c1 je 82 ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-1.s binutils-2.30/gas/testsuite/gas/i386/align-branch-1.s +--- binutils.orig/gas/testsuite/gas/i386/align-branch-1.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-1.s 2019-11-20 14:09:25.592915114 +0000 +@@ -0,0 +1,72 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %gs:0x1 ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ movl %esp, %ebp ++ movl %edi, -8(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ cmp %eax, %ebp ++ je .L_2 ++ movl %esi, -12(%ebx) ++ movl %esi, -12(%ebp) ++ movl %edi, -8(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ popl %ebp ++ popl %ebp ++ popl %ebp ++ je .L_2 ++ popl %ebp ++ je .L_2 ++ movl %eax, -4(%esp) ++ movl %esi, -12(%ebp) ++ movl %edi, -8(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ popl %ebp ++ jmp .L_3 ++ jmp .L_3 ++ jmp .L_3 ++ movl %eax, -4(%ebp) ++ movl %esi, -12(%ebp) ++ movl %edi, -8(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ popl %ebp ++ popl %ebp ++ cmp %eax, %ebp ++ je .L_2 ++ jmp .L_3 ++.L_2: ++ movl -12(%ebp), %eax ++ movl %eax, -4(%ebp) ++.L_3: ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, 12(%ebp) ++ jmp bar ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, -1200(%ebp) ++ movl %esi, (%ebp) ++ je .L_3 ++ je .L_3 +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-2a.d binutils-2.30/gas/testsuite/gas/i386/align-branch-2a.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-2a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-2a.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,55 @@ ++#source: align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 89 e5 mov %esp,%ebp ++ c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1e: ff e0 jmp \*%eax ++ 20: 55 push %ebp ++ 21: 55 push %ebp ++ 22: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 28: 89 e5 mov %esp,%ebp ++ 2a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 30: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 33: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 36: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 39: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3c: ff d0 call \*%eax ++ 3e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 41: 55 push %ebp ++ 42: 55 push %ebp ++ 43: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 49: 89 e5 mov %esp,%ebp ++ 4b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 4e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 51: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 54: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 57: e8 [0-9a-f ]+ call .* ++ 5c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5f: 55 push %ebp ++ 60: 55 push %ebp ++ 61: 55 push %ebp ++ 62: 55 push %ebp ++ 63: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 69: 89 e5 mov %esp,%ebp ++ 6b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 71: ff 15 00 00 00 00 call \*0x0 ++ 77: 55 push %ebp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-2b.d binutils-2.30/gas/testsuite/gas/i386/align-branch-2b.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-2b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-2b.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,55 @@ ++#source: align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=indirect ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 a3 01 00 00 00 fs fs mov %eax,%fs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: ff e0 jmp \*%eax ++ 22: 3e 3e 55 ds ds push %ebp ++ 25: 55 push %ebp ++ 26: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 2c: 89 e5 mov %esp,%ebp ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 40: ff d0 call \*%eax ++ 42: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 45: 55 push %ebp ++ 46: 55 push %ebp ++ 47: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 4d: 89 e5 mov %esp,%ebp ++ 4f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5b: e8 [0-9a-f ]+ call .* ++ 60: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 63: 55 push %ebp ++ 64: 55 push %ebp ++ 65: 55 push %ebp ++ 66: 55 push %ebp ++ 67: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 6d: 89 e5 mov %esp,%ebp ++ 6f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 75: ff 15 00 00 00 00 call \*0x0 ++ 7b: 55 push %ebp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-2c.d binutils-2.30/gas/testsuite/gas/i386/align-branch-2c.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-2c.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-2c.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,55 @@ ++#source: align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=indirect+call ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 a3 01 00 00 00 fs fs mov %eax,%fs:0x1 ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: ff e0 jmp \*%eax ++ 22: 3e 3e 55 ds ds push %ebp ++ 25: 55 push %ebp ++ 26: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 2c: 89 e5 mov %esp,%ebp ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 40: ff d0 call \*%eax ++ 42: 36 36 36 36 36 89 75 f4 ss ss ss ss mov %esi,%ss:-0xc\(%ebp\) ++ 4a: 55 push %ebp ++ 4b: 55 push %ebp ++ 4c: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 52: 89 e5 mov %esp,%ebp ++ 54: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 57: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 5d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 60: e8 [0-9a-f ]+ call .* ++ 65: 36 36 36 36 36 89 75 f4 ss ss ss ss mov %esi,%ss:-0xc\(%ebp\) ++ 6d: 3e 55 ds push %ebp ++ 6f: 55 push %ebp ++ 70: 55 push %ebp ++ 71: 55 push %ebp ++ 72: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 78: 89 e5 mov %esp,%ebp ++ 7a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 7d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 80: ff 15 00 00 00 00 call \*0x0 ++ 86: 55 push %ebp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-2.s binutils-2.30/gas/testsuite/gas/i386/align-branch-2.s +--- binutils.orig/gas/testsuite/gas/i386/align-branch-2.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-2.s 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,49 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ jmp *%eax ++ pushl %ebp ++ pushl %ebp ++ movl %eax, %fs:0x1 ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ call *%eax ++ movl %esi, -12(%ebp) ++ pushl %ebp ++ pushl %ebp ++ movl %eax, %fs:0x1 ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ call foo ++ movl %esi, -12(%ebp) ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ movl %eax, %fs:0x1 ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ call *foo ++ pushl %ebp +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-3.d binutils-2.30/gas/testsuite/gas/i386/align-branch-3.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-3.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-3.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,33 @@ ++#as: -malign-branch-boundary=32 -malign-branch=indirect+call ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 89 e5 mov %esp,%ebp ++ c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1e: e8 fc ff ff ff call 1f ++ 23: 55 push %ebp ++ 24: 55 push %ebp ++ 25: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 2b: 89 e5 mov %esp,%ebp ++ 2d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 30: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 33: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 36: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 39: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3c: ff 91 00 00 00 00 call \*0x0\(%ecx\) ++ 42: 89 75 f4 mov %esi,-0xc\(%ebp\) ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-3.s binutils-2.30/gas/testsuite/gas/i386/align-branch-3.s +--- binutils.orig/gas/testsuite/gas/i386/align-branch-3.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-3.s 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,28 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ call ___tls_get_addr ++ pushl %ebp ++ pushl %ebp ++ movl %eax, %fs:0x1 ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ call *___tls_get_addr@GOT(%ecx) ++ movl %esi, -12(%ebp) +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-4a.d binutils-2.30/gas/testsuite/gas/i386/align-branch-4a.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-4a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-4a.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,36 @@ ++#source: align-branch-4.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 6: 55 push %ebp ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 89 e5 mov %esp,%ebp ++ d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 10: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 13: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 16: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 19: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1c: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1f: c3 ret ++ 20: 55 push %ebp ++ 21: 55 push %ebp ++ 22: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 28: 89 e5 mov %esp,%ebp ++ 2a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 2d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 30: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 33: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 36: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 39: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3c: c2 1e 00 ret \$0x1e ++ 3f: 89 75 f4 mov %esi,-0xc\(%ebp\) ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-4b.d binutils-2.30/gas/testsuite/gas/i386/align-branch-4b.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-4b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-4b.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,36 @@ ++#source: align-branch-4.s ++#as: -malign-branch-boundary=32 -malign-branch=ret ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 a3 01 00 00 00 fs mov %eax,%fs:0x1 ++ 7: 55 push %ebp ++ 8: 55 push %ebp ++ 9: 55 push %ebp ++ a: 55 push %ebp ++ b: 55 push %ebp ++ c: 89 e5 mov %esp,%ebp ++ e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 20: c3 ret ++ 21: 3e 3e 3e 55 ds ds ds push %ebp ++ 25: 55 push %ebp ++ 26: 64 a3 01 00 00 00 mov %eax,%fs:0x1 ++ 2c: 89 e5 mov %esp,%ebp ++ 2e: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%ebp\) ++ 40: c2 1e 00 ret \$0x1e ++ 43: 89 75 f4 mov %esi,-0xc\(%ebp\) ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-4.s binutils-2.30/gas/testsuite/gas/i386/align-branch-4.s +--- binutils.orig/gas/testsuite/gas/i386/align-branch-4.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-4.s 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,30 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ pushl %ebp ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ ret ++ pushl %ebp ++ pushl %ebp ++ movl %eax, %fs:0x1 ++ movl %esp, %ebp ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ movl %esi, -12(%ebp) ++ ret $30 ++ movl %esi, -12(%ebp) +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-5.d binutils-2.30/gas/testsuite/gas/i386/align-branch-5.d +--- binutils.orig/gas/testsuite/gas/i386/align-branch-5.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-5.d 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,36 @@ ++#as: -malign-branch-boundary=32 -malign-branch=jcc+fused+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: c1 e9 02 shr \$0x2,%ecx ++ 3: c1 e9 02 shr \$0x2,%ecx ++ 6: c1 e9 02 shr \$0x2,%ecx ++ 9: 89 d1 mov %edx,%ecx ++ b: 31 c0 xor %eax,%eax ++ d: c1 e9 02 shr \$0x2,%ecx ++ 10: c1 e9 02 shr \$0x2,%ecx ++ 13: c1 e9 02 shr \$0x2,%ecx ++ 16: c1 e9 02 shr \$0x2,%ecx ++ 19: c1 e9 02 shr \$0x2,%ecx ++ 1c: c1 e9 02 shr \$0x2,%ecx ++ 1f: f6 c2 02 test \$0x2,%dl ++ 22: f3 ab rep stos %eax,%es:\(%edi\) ++ 24: 75 dd jne 3 ++ 26: 31 c0 xor %eax,%eax ++ 28: c1 e9 02 shr \$0x2,%ecx ++ 2b: c1 e9 02 shr \$0x2,%ecx ++ 2e: c1 e9 02 shr \$0x2,%ecx ++ 31: 89 d1 mov %edx,%ecx ++ 33: 31 c0 xor %eax,%eax ++ 35: c1 e9 02 shr \$0x2,%ecx ++ 38: c1 e9 02 shr \$0x2,%ecx ++ 3b: c1 e9 02 shr \$0x2,%ecx ++ 3e: f6 c2 02 test \$0x2,%dl ++ 41: e8 [0-9a-f ]+ call .* ++ 46: 75 e3 jne 2b ++ 48: 31 c0 xor %eax,%eax ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/align-branch-5.s binutils-2.30/gas/testsuite/gas/i386/align-branch-5.s +--- binutils.orig/gas/testsuite/gas/i386/align-branch-5.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/align-branch-5.s 2019-11-20 14:09:25.595915091 +0000 +@@ -0,0 +1,32 @@ ++ .text ++ .p2align 4,,15 ++foo: ++ shrl $2, %ecx ++.L1: ++ shrl $2, %ecx ++ shrl $2, %ecx ++ movl %edx, %ecx ++ xorl %eax, %eax ++ shrl $2, %ecx ++ shrl $2, %ecx ++ shrl $2, %ecx ++ shrl $2, %ecx ++ shrl $2, %ecx ++ shrl $2, %ecx ++ testb $2, %dl ++ rep stosl ++ jne .L1 ++ xorl %eax, %eax ++ shrl $2, %ecx ++.L2: ++ shrl $2, %ecx ++ shrl $2, %ecx ++ movl %edx, %ecx ++ xorl %eax, %eax ++ shrl $2, %ecx ++ shrl $2, %ecx ++ shrl $2, %ecx ++ testb $2, %dl ++ call bar ++ jne .L2 ++ xorl %eax, %eax +diff -rupN binutils.orig/gas/testsuite/gas/i386/i386.exp binutils-2.30/gas/testsuite/gas/i386/i386.exp +--- binutils.orig/gas/testsuite/gas/i386/i386.exp 2019-11-20 10:59:21.657883233 +0000 ++++ binutils-2.30/gas/testsuite/gas/i386/i386.exp 2019-11-20 14:09:39.865805050 +0000 +@@ -425,6 +425,20 @@ if [expr ([istarget "i*86-*-*"] || [ist + run_dump_test "align-1a" + run_dump_test "align-1b" + run_list_test "inval-pseudo" "-al" ++ run_dump_test "align-branch-1a" ++ run_dump_test "align-branch-1b" ++ run_dump_test "align-branch-1c" ++ run_dump_test "align-branch-1d" ++ run_dump_test "align-branch-1e" ++ run_dump_test "align-branch-1f" ++ run_dump_test "align-branch-1g" ++ run_dump_test "align-branch-1h" ++ run_dump_test "align-branch-2a" ++ run_dump_test "align-branch-2b" ++ run_dump_test "align-branch-2c" ++ run_dump_test "align-branch-4a" ++ run_dump_test "align-branch-4b" ++ run_dump_test "align-branch-5" + + # These tests require support for 8 and 16 bit relocs, + # so we only run them for ELF and COFF targets. +@@ -489,6 +503,10 @@ if [expr ([istarget "i*86-*-*"] || [ist + + run_dump_test "addend" + ++ if {[istarget "*-*-linux*"]} then { ++ run_dump_test "align-branch-3" ++ } ++ + if { [gas_64_check] } then { + run_dump_test "att-regs" + run_dump_test "intel-regs" +@@ -892,6 +910,20 @@ if [expr ([istarget "i*86-*-*"] || [ista + run_list_test "x86-64-notrackbad" "-al" + run_dump_test "x86-64-movd" + run_dump_test "x86-64-movd-intel" ++ run_dump_test "x86-64-align-branch-1a" ++ run_dump_test "x86-64-align-branch-1b" ++ run_dump_test "x86-64-align-branch-1c" ++ run_dump_test "x86-64-align-branch-1d" ++ run_dump_test "x86-64-align-branch-1e" ++ run_dump_test "x86-64-align-branch-1f" ++ run_dump_test "x86-64-align-branch-1g" ++ run_dump_test "x86-64-align-branch-1h" ++ run_dump_test "x86-64-align-branch-2a" ++ run_dump_test "x86-64-align-branch-2b" ++ run_dump_test "x86-64-align-branch-2c" ++ run_dump_test "x86-64-align-branch-4a" ++ run_dump_test "x86-64-align-branch-4b" ++ run_dump_test "x86-64-align-branch-5" + + if { ![istarget "*-*-aix*"] + && ![istarget "*-*-beos*"] +@@ -949,6 +981,10 @@ if [expr ([istarget "i*86-*-*"] || [ista + run_dump_test "x86-64-gotpcrel-no-relax" + + run_dump_test "x86-64-addend" ++ ++ if {[istarget "*-*-linux*"]} then { ++ run_dump_test "x86-64-align-branch-3" ++ } + } + + set ASFLAGS "$old_ASFLAGS" +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1a.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1a.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1a.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,75 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 64 89 04 25 01 00 00 00 fs fs fs mov %eax,%fs:0x1 ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: 48 39 c5 cmp %rax,%rbp ++ 23: 74 5d je 82 ++ 25: 2e 89 75 f4 mov %esi,%cs:-0xc\(%rbp\) ++ 29: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 32: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 35: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 38: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3e: 5d pop %rbp ++ 3f: 5d pop %rbp ++ 40: 74 40 je 82 ++ 42: 5d pop %rbp ++ 43: 74 3d je 82 ++ 45: 2e 89 45 fc mov %eax,%cs:-0x4\(%rbp\) ++ 49: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5e: 5d pop %rbp ++ 5f: 5d pop %rbp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 78: 5d pop %rbp ++ 79: 5d pop %rbp ++ 7a: 48 39 c5 cmp %rax,%rbp ++ 7d: 74 03 je 82 ++ 7f: 90 nop ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ac: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c4: eb c2 jmp 88 ++ c6: 5d pop %rbp ++ c7: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1b.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1b.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1b.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,75 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 64 89 04 25 01 00 00 00 fs fs fs mov %eax,%fs:0x1 ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: 48 39 c5 cmp %rax,%rbp ++ 23: 74 5d je 82 ++ 25: 2e 89 75 f4 mov %esi,%cs:-0xc\(%rbp\) ++ 29: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 32: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 35: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 38: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3e: 5d pop %rbp ++ 3f: 5d pop %rbp ++ 40: 74 40 je 82 ++ 42: 5d pop %rbp ++ 43: 74 3d je 82 ++ 45: 2e 89 45 fc mov %eax,%cs:-0x4\(%rbp\) ++ 49: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5e: 5d pop %rbp ++ 5f: 5d pop %rbp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 78: 5d pop %rbp ++ 79: 5d pop %rbp ++ 7a: 48 39 c5 cmp %rax,%rbp ++ 7d: 74 03 je 82 ++ 7f: 90 nop ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ac: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c4: eb c2 jmp 88 ++ c6: 5d pop %rbp ++ c7: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1c.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1c.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1c.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1c.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,75 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch-prefix-size=1 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 2e 55 cs push %rbp ++ a: 2e 55 cs push %rbp ++ c: 2e 55 cs push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: 48 39 c5 cmp %rax,%rbp ++ 23: 74 5d je 82 ++ 25: 2e 89 75 f4 mov %esi,%cs:-0xc\(%rbp\) ++ 29: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 32: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 35: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 38: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3e: 5d pop %rbp ++ 3f: 5d pop %rbp ++ 40: 74 40 je 82 ++ 42: 5d pop %rbp ++ 43: 74 3d je 82 ++ 45: 2e 89 45 fc mov %eax,%cs:-0x4\(%rbp\) ++ 49: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5e: 5d pop %rbp ++ 5f: 5d pop %rbp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 78: 5d pop %rbp ++ 79: 5d pop %rbp ++ 7a: 48 39 c5 cmp %rax,%rbp ++ 7d: 74 03 je 82 ++ 7f: 90 nop ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ac: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c4: eb c2 jmp 88 ++ c6: 5d pop %rbp ++ c7: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1d.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1d.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1d.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1d.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,74 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 64 89 04 25 01 00 00 00 fs fs fs mov %eax,%fs:0x1 ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: 48 39 c5 cmp %rax,%rbp ++ 23: 74 5b je 80 ++ 25: 2e 89 75 f4 mov %esi,%cs:-0xc\(%rbp\) ++ 29: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 32: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 35: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 38: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3e: 5d pop %rbp ++ 3f: 5d pop %rbp ++ 40: 74 3e je 80 ++ 42: 5d pop %rbp ++ 43: 74 3b je 80 ++ 45: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 48: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4b: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 51: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 54: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 57: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5d: 5d pop %rbp ++ 5e: 5d pop %rbp ++ 5f: eb 25 jmp 86 ++ 61: eb 23 jmp 86 ++ 63: eb 21 jmp 86 ++ 65: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 68: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6b: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 71: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 74: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 77: 5d pop %rbp ++ 78: 5d pop %rbp ++ 79: 48 39 c5 cmp %rax,%rbp ++ 7c: 74 02 je 80 ++ 7e: eb 06 jmp 86 ++ 80: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 83: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 86: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8c: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 92: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 98: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a4: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ aa: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ bc: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c2: eb c2 jmp 86 ++ c4: 5d pop %rbp ++ c5: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1e.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1e.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1e.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1e.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,74 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=jcc ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 48 89 e5 mov %rsp,%rbp ++ e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 48 39 c5 cmp %rax,%rbp ++ 20: 74 5b je 7d ++ 22: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 25: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 5d pop %rbp ++ 3b: 5d pop %rbp ++ 3c: 74 3f je 7d ++ 3e: 2e 5d cs pop %rbp ++ 40: 74 3b je 7d ++ 42: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 45: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 48: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 51: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 54: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 57: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5a: 5d pop %rbp ++ 5b: 5d pop %rbp ++ 5c: eb 25 jmp 83 ++ 5e: eb 23 jmp 83 ++ 60: eb 21 jmp 83 ++ 62: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 65: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 68: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 71: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 74: 5d pop %rbp ++ 75: 5d pop %rbp ++ 76: 48 39 c5 cmp %rax,%rbp ++ 79: 74 02 je 7d ++ 7b: eb 06 jmp 83 ++ 7d: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 80: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 83: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 89: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8f: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 95: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9b: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a1: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a7: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ad: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b3: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b9: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ bf: eb c2 jmp 83 ++ c1: 5d pop %rbp ++ c2: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1f.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1f.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1f.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1f.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,75 @@ ++#source: x86-64-align-branch-1.s ++#as: -malign-branch-boundary=32 -malign-branch=jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 48 89 e5 mov %rsp,%rbp ++ e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 48 39 c5 cmp %rax,%rbp ++ 20: 74 5d je 7f ++ 22: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 25: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 5d pop %rbp ++ 3b: 5d pop %rbp ++ 3c: 74 41 je 7f ++ 3e: 2e 5d cs pop %rbp ++ 40: 74 3d je 7f ++ 42: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 45: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 48: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 51: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 54: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 57: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5a: 5d pop %rbp ++ 5b: 5d pop %rbp ++ 5c: eb 27 jmp 85 ++ 5e: 66 90 xchg %ax,%ax ++ 60: eb 23 jmp 85 ++ 62: eb 21 jmp 85 ++ 64: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 67: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6a: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 70: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 73: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 76: 5d pop %rbp ++ 77: 5d pop %rbp ++ 78: 48 39 c5 cmp %rax,%rbp ++ 7b: 74 02 je 7f ++ 7d: eb 06 jmp 85 ++ 7f: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 82: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 85: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8b: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 91: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 97: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9d: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a3: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a9: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ af: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b5: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ bb: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c1: eb c2 jmp 85 ++ c3: 5d pop %rbp ++ c4: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1g.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1g.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1g.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1g.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,75 @@ ++#source: x86-64-align-branch-1.s ++#as: -mbranches-within-32B-boundaries ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 64 89 04 25 01 00 00 00 fs fs fs mov %eax,%fs:0x1 ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: 48 39 c5 cmp %rax,%rbp ++ 23: 74 5d je 82 ++ 25: 2e 89 75 f4 mov %esi,%cs:-0xc\(%rbp\) ++ 29: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 32: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 35: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 38: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3e: 5d pop %rbp ++ 3f: 5d pop %rbp ++ 40: 74 40 je 82 ++ 42: 5d pop %rbp ++ 43: 74 3d je 82 ++ 45: 2e 89 45 fc mov %eax,%cs:-0x4\(%rbp\) ++ 49: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 52: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5e: 5d pop %rbp ++ 5f: 5d pop %rbp ++ 60: eb 26 jmp 88 ++ 62: eb 24 jmp 88 ++ 64: eb 22 jmp 88 ++ 66: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 69: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6c: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 72: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 75: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 78: 5d pop %rbp ++ 79: 5d pop %rbp ++ 7a: 48 39 c5 cmp %rax,%rbp ++ 7d: 74 03 je 82 ++ 7f: 90 nop ++ 80: eb 06 jmp 88 ++ 82: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 85: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ac: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ c4: eb c2 jmp 88 ++ c6: 5d pop %rbp ++ c7: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1h.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1h.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1h.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1h.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,74 @@ ++#source: x86-64-align-branch-1.s ++#as: -mbranches-within-32B-boundaries -malign-branch-boundary=0 ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 48 89 e5 mov %rsp,%rbp ++ e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 48 39 c5 cmp %rax,%rbp ++ 20: 74 5a je 7c ++ 22: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 25: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 28: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 2b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 5d pop %rbp ++ 3b: 5d pop %rbp ++ 3c: 74 3e je 7c ++ 3e: 5d pop %rbp ++ 3f: 74 3b je 7c ++ 41: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 44: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 47: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 4a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 4d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 50: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 53: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 56: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 59: 5d pop %rbp ++ 5a: 5d pop %rbp ++ 5b: eb 25 jmp 82 ++ 5d: eb 23 jmp 82 ++ 5f: eb 21 jmp 82 ++ 61: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 64: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 67: 89 7d f8 mov %edi,-0x8\(%rbp\) ++ 6a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 6d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 70: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 73: 5d pop %rbp ++ 74: 5d pop %rbp ++ 75: 48 39 c5 cmp %rax,%rbp ++ 78: 74 02 je 7c ++ 7a: eb 06 jmp 82 ++ 7c: 8b 45 f4 mov -0xc\(%rbp\),%eax ++ 7f: 89 45 fc mov %eax,-0x4\(%rbp\) ++ 82: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 88: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 8e: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 94: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ 9a: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a0: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ a6: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ ac: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b2: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\) ++ be: eb c2 jmp 82 ++ c0: 5d pop %rbp ++ c1: c3 retq ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1.s binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1.s +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-1.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-1.s 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,70 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ cmp %rax, %rbp ++ je .L_2 ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %edi, -8(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ popq %rbp ++ popq %rbp ++ je .L_2 ++ popq %rbp ++ je .L_2 ++ movl %eax, -4(%rbp) ++ movl %esi, -12(%rbp) ++ movl %edi, -8(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ popq %rbp ++ popq %rbp ++ jmp .L_3 ++ jmp .L_3 ++ jmp .L_3 ++ movl %eax, -4(%rbp) ++ movl %esi, -12(%rbp) ++ movl %edi, -8(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ popq %rbp ++ popq %rbp ++ cmp %rax, %rbp ++ je .L_2 ++ jmp .L_3 ++.L_2: ++ movl -12(%rbp), %eax ++ movl %eax, -4(%rbp) ++.L_3: ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ movl %esi, -1200(%rbp) ++ jmp .L_3 ++ popq %rbp ++ retq +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2a.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2a.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2a.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,50 @@ ++#source: x86-64-align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 55 push %rbp ++ c: 48 89 e5 mov %rsp,%rbp ++ f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1e: ff e0 jmpq \*%rax ++ 20: 55 push %rbp ++ 21: 55 push %rbp ++ 22: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 2a: 48 89 e5 mov %rsp,%rbp ++ 2d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 30: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 33: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 36: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 39: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3c: ff d0 callq \*%rax ++ 3e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 41: 55 push %rbp ++ 42: 55 push %rbp ++ 43: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 4b: 48 89 e5 mov %rsp,%rbp ++ 4e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 51: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 54: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 57: e8 [0-9a-f ]+ callq .* ++ 5c: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5f: 55 push %rbp ++ 60: 55 push %rbp ++ 61: 55 push %rbp ++ 62: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 6a: 48 89 e5 mov %rsp,%rbp ++ 6d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 70: ff 14 25 00 00 00 00 callq \*0x0 ++ 77: 55 push %rbp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2b.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2b.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2b.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,50 @@ ++#source: x86-64-align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=indirect ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 89 04 25 01 00 00 00 fs fs mov %eax,%fs:0x1 ++ a: 55 push %rbp ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: ff e0 jmpq \*%rax ++ 22: 2e 2e 55 cs cs push %rbp ++ 25: 55 push %rbp ++ 26: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 2e: 48 89 e5 mov %rsp,%rbp ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 40: ff d0 callq \*%rax ++ 42: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 45: 55 push %rbp ++ 46: 55 push %rbp ++ 47: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 4f: 48 89 e5 mov %rsp,%rbp ++ 52: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 55: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 58: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5b: e8 [0-9a-f ]+ callq .* ++ 60: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 63: 55 push %rbp ++ 64: 55 push %rbp ++ 65: 55 push %rbp ++ 66: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 6e: 48 89 e5 mov %rsp,%rbp ++ 71: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 74: ff 14 25 00 00 00 00 callq \*0x0 ++ 7b: 55 push %rbp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2c.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2c.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2c.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2c.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,50 @@ ++#source: x86-64-align-branch-2.s ++#as: -malign-branch-boundary=32 -malign-branch=indirect+call ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 64 89 04 25 01 00 00 00 fs fs mov %eax,%fs:0x1 ++ a: 55 push %rbp ++ b: 55 push %rbp ++ c: 55 push %rbp ++ d: 55 push %rbp ++ e: 48 89 e5 mov %rsp,%rbp ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: ff e0 jmpq \*%rax ++ 22: 2e 2e 55 cs cs push %rbp ++ 25: 55 push %rbp ++ 26: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 2e: 48 89 e5 mov %rsp,%rbp ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 40: ff d0 callq \*%rax ++ 42: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\) ++ 4a: 55 push %rbp ++ 4b: 55 push %rbp ++ 4c: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 54: 48 89 e5 mov %rsp,%rbp ++ 57: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 5d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 60: e8 [0-9a-f ]+ callq .* ++ 65: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\) ++ 6d: 2e 2e 55 cs cs push %rbp ++ 70: 55 push %rbp ++ 71: 55 push %rbp ++ 72: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 7a: 48 89 e5 mov %rsp,%rbp ++ 7d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 80: ff 14 25 00 00 00 00 callq \*0x0 ++ 87: 55 push %rbp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2.s binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2.s +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-2.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-2.s 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,44 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ jmp *%rax ++ pushq %rbp ++ pushq %rbp ++ movl %eax, %fs:0x1 ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ call *%rax ++ movl %esi, -12(%rbp) ++ pushq %rbp ++ pushq %rbp ++ movl %eax, %fs:0x1 ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ call foo ++ movl %esi, -12(%rbp) ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ movl %eax, %fs:0x1 ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ call *foo ++ pushq %rbp +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-3.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-3.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-3.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-3.d 2019-11-20 14:09:25.596915083 +0000 +@@ -0,0 +1,32 @@ ++#as: -malign-branch-boundary=32 -malign-branch=indirect+call ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 55 push %rbp ++ c: 48 89 e5 mov %rsp,%rbp ++ f: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 12: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 15: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 18: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1e: e8 00 00 00 00 callq 23 ++ 23: 55 push %rbp ++ 24: 55 push %rbp ++ 25: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 2d: 48 89 e5 mov %rsp,%rbp ++ 30: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 33: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 36: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 39: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3c: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3f: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 45 ++ 45: 89 75 f4 mov %esi,-0xc\(%rbp\) ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-3.s binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-3.s +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-3.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-3.s 2019-11-20 14:09:25.597915075 +0000 +@@ -0,0 +1,27 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ pushq %rbp ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ call __tls_get_addr ++ pushq %rbp ++ pushq %rbp ++ movl %eax, %fs:0x1 ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ call *__tls_get_addr@GOTPCREL(%rip) ++ movl %esi, -12(%rbp) +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4a.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4a.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4a.d 2019-11-20 14:09:25.597915075 +0000 +@@ -0,0 +1,33 @@ ++#source: x86-64-align-branch-4.s ++#as: -malign-branch-boundary=32 -malign-branch=fused+jcc+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 8: 55 push %rbp ++ 9: 55 push %rbp ++ a: 48 89 e5 mov %rsp,%rbp ++ d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 10: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 13: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 16: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 19: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1c: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1f: c3 retq ++ 20: 55 push %rbp ++ 21: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 29: 55 push %rbp ++ 2a: 55 push %rbp ++ 2b: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 2e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3d: c2 1e 00 retq \$0x1e ++ 40: 55 push %rbp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4b.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4b.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4b.d 2019-11-20 14:09:25.597915075 +0000 +@@ -0,0 +1,33 @@ ++#source: x86-64-align-branch-4.s ++#as: -malign-branch-boundary=32 -malign-branch=ret ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: 64 64 89 04 25 01 00 00 00 fs mov %eax,%fs:0x1 ++ 9: 55 push %rbp ++ a: 55 push %rbp ++ b: 48 89 e5 mov %rsp,%rbp ++ e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 11: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 14: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 17: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 1d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 20: c3 retq ++ 21: 2e 2e 55 cs cs push %rbp ++ 24: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1 ++ 2c: 55 push %rbp ++ 2d: 55 push %rbp ++ 2e: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 31: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 34: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 37: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3a: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 3d: 89 75 f4 mov %esi,-0xc\(%rbp\) ++ 40: c2 1e 00 retq \$0x1e ++ 43: 55 push %rbp ++#pass +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4.s binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4.s +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-4.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-4.s 2019-11-20 14:09:25.597915075 +0000 +@@ -0,0 +1,27 @@ ++ .text ++ .globl foo ++ .p2align 4 ++foo: ++ movl %eax, %fs:0x1 ++ pushq %rbp ++ pushq %rbp ++ movq %rsp, %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ ret ++ pushq %rbp ++ movl %eax, %fs:0x1 ++ pushq %rbp ++ pushq %rbp ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ movl %esi, -12(%rbp) ++ ret $30 ++ pushq %rbp +diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-5.d binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-5.d +--- binutils.orig/gas/testsuite/gas/i386/x86-64-align-branch-5.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.30/gas/testsuite/gas/i386/x86-64-align-branch-5.d 2019-11-20 14:09:25.597915075 +0000 +@@ -0,0 +1,37 @@ ++#source: align-branch-5.s ++#as: -malign-branch-boundary=32 -malign-branch=jcc+fused+jmp ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+ : ++ 0: c1 e9 02 shr \$0x2,%ecx ++ 3: c1 e9 02 shr \$0x2,%ecx ++ 6: c1 e9 02 shr \$0x2,%ecx ++ 9: 89 d1 mov %edx,%ecx ++ b: 31 c0 xor %eax,%eax ++ d: c1 e9 02 shr \$0x2,%ecx ++ 10: c1 e9 02 shr \$0x2,%ecx ++ 13: c1 e9 02 shr \$0x2,%ecx ++ 16: c1 e9 02 shr \$0x2,%ecx ++ 19: c1 e9 02 shr \$0x2,%ecx ++ 1c: c1 e9 02 shr \$0x2,%ecx ++ 1f: f6 c2 02 test \$0x2,%dl ++ 22: f3 ab rep stos %eax,%es:\(%rdi\) ++ 24: 75 dd jne 3 ++ 26: 31 c0 xor %eax,%eax ++ 28: c1 e9 02 shr \$0x2,%ecx ++ 2b: c1 e9 02 shr \$0x2,%ecx ++ 2e: c1 e9 02 shr \$0x2,%ecx ++ 31: 89 d1 mov %edx,%ecx ++ 33: 31 c0 xor %eax,%eax ++ 35: c1 e9 02 shr \$0x2,%ecx ++ 38: c1 e9 02 shr \$0x2,%ecx ++ 3b: c1 e9 02 shr \$0x2,%ecx ++ 3e: f6 c2 02 test \$0x2,%dl ++ 41: e8 00 00 00 00 callq 46 ++ 46: 75 e3 jne 2b ++ 48: 31 c0 xor %eax,%eax ++#pass +diff -rupN binutils.orig/gas/write.c binutils-2.30/gas/write.c +--- binutils.orig/gas/write.c 2019-11-20 10:59:21.592883731 +0000 ++++ binutils-2.30/gas/write.c 2019-11-20 14:30:33.613133740 +0000 +@@ -2987,7 +2987,12 @@ relax_segment (struct frag *segment_frag + #ifdef TC_GENERIC_RELAX_TABLE + /* The default way to relax a frag is to look through + TC_GENERIC_RELAX_TABLE. */ ++#ifdef md_generic_table_relax_frag ++ growth = md_generic_table_relax_frag (segment, fragP, ++ stretch); ++#else + growth = relax_frag (segment, fragP, stretch); ++#endif /* md_generic_table_relax_frag */ + #endif /* TC_GENERIC_RELAX_TABLE */ + #endif + break; diff --git a/SPECS/binutils.spec b/SPECS/binutils.spec index df3da4f..97bfdcb 100644 --- a/SPECS/binutils.spec +++ b/SPECS/binutils.spec @@ -65,7 +65,7 @@ Summary: A GNU collection of binary utilities Name: %{?scl_prefix}%{?cross}binutils%{?_with_debug:-debug} Version: 2.30 -Release: 54%{?dist} +Release: 55%{?dist}.1 License: GPLv3+ Group: Development/Tools URL: https://sourceware.org/binutils @@ -362,9 +362,14 @@ Patch52: binutils-s390x-arch13.patch # Lifetime: Unknown. Patch53: binutils-fix-testsuite-failures-2.patch -# Purpose: Allow OS specific sections in section groups. -# Lifetime: Might be fixed in 2.33 -Patch9999: binutils-special-sections-in-groups.patch +# Purpose: Enable building the binutils with address sanitization enabled. +# Lifetime: Fixed in 2.31. +Patch54: binutils-plugins-need-dlsym.patch + +# Purpose: Add a feature to the x86/64 assembler to enable +# workarounds for the Intel Jcc Erratum. +# Lifetime: Fixed in 2.34 +Patch55: binutils-x86-JCC-Errata.patch #---------------------------------------------------------------------------- @@ -553,8 +558,8 @@ using libelf instead of BFD. %patch51 -p1 %patch52 -p1 %patch53 -p1 - -%patch9999 -p1 +%patch54 -p1 +%patch55 -p1 # We cannot run autotools as there is an exact requirement of autoconf-2.59. # FIXME - this is no longer true. Maybe try reinstating autotool use ? @@ -991,8 +996,11 @@ exit 0 #---------------------------------------------------------------------------- %changelog -* Thu Jun 13 2019 Pablo Greco - 2.30-54 -- Fix bad linking in armhfp +* Sun Dec 08 2019 Nick Clifton - 2.30-55.1 +- Add ability to x86 assembler to generate workarounds for Intel JCC flaw. (#1779412) + +* Tue May 14 2019 Nick Clifton - 2.30-55 +- Fix building the binutils with address sanitization enabled. (#1709720) * Tue Apr 23 2019 Nick Clifton - 2.30-54 - Fix AArch64 linker testsuite problems. (#1702247)