Blame SOURCES/gcc48-rh1469697-7.patch

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commit 2bb044f9734259945e2b5048d92bc8d0af707d27
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Author: law <law@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date:   Wed Sep 20 05:43:28 2017 +0000
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            * combine-stack-adj.c (combine_stack_adjustments_for_block): Do
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            nothing for stack adjustments with REG_STACK_CHECK.
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            * sched-deps.c (parse_add_or_inc): Reject insns with
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            REG_STACK_CHECK from dependency breaking.
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            * config/i386/i386.c (pro_epilogue_adjust_stack): Return insn.
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            (ix86_adjust_satck_and_probe_stack_clash): Add REG_STACK_NOTEs.
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            * reg-notes.def (STACK_CHECK): New note.
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            * gcc.target/i386/stack-check-11.c: New test.
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    git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@252999 138bc75d-0d04-0410-961f-82ee72b054a4
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diff --git a/gcc/combine-stack-adj.c b/gcc/combine-stack-adj.c
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index 0a4d8a51d1d..ee66c28ca35 100644
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--- a/gcc/combine-stack-adj.c
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+++ b/gcc/combine-stack-adj.c
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@@ -441,6 +441,8 @@ combine_stack_adjustments_for_block (basic_block bb)
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 	continue;
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       set = single_set_for_csa (insn);
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+      if (set && find_reg_note (insn, REG_STACK_CHECK, NULL_RTX))
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+	set = NULL_RTX;
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       if (set)
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 	{
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 	  rtx dest = SET_DEST (set);
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diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
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index a07104d304d..a9072f58f50 100644
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--- a/gcc/config/i386/i386.c
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+++ b/gcc/config/i386/i386.c
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@@ -9502,7 +9502,7 @@ ix86_add_queued_cfa_restore_notes (rtx insn)
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    zero if %r11 register is live and cannot be freely used and positive
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    otherwise.  */
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-static void
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+static rtx
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 pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset,
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 			   int style, bool set_cfa)
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 {
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@@ -9589,6 +9589,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset,
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       m->fs.sp_offset = ooffset - INTVAL (offset);
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       m->fs.sp_valid = valid;
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     }
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+  return insn;
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 }
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 /* Find an available register to be used as dynamic realign argument
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@@ -9902,9 +9903,11 @@ ix86_adjust_stack_and_probe_stack_clash (const HOST_WIDE_INT size)
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       for (i = probe_interval; i <= size; i += probe_interval)
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 	{
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 	  /* Allocate PROBE_INTERVAL bytes.  */
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-	  pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
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-				     GEN_INT (-probe_interval), -1,
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-				     m->fs.cfa_reg == stack_pointer_rtx);
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+	  rtx insn
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+	    = pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
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+					 GEN_INT (-PROBE_INTERVAL), -1,
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+					 m->fs.cfa_reg == stack_pointer_rtx);
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+	  add_reg_note (insn, REG_STACK_CHECK, const0_rtx);
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 	  /* And probe at *sp.  */
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 	  emit_stack_probe (stack_pointer_rtx);
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diff --git a/gcc/reg-notes.def b/gcc/reg-notes.def
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index db61c092aab..1d7a4356a85 100644
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--- a/gcc/reg-notes.def
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+++ b/gcc/reg-notes.def
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@@ -216,3 +216,7 @@ REG_NOTE (ARGS_SIZE)
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    that the return value of a call can be used to reinitialize a
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    pseudo reg.  */
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 REG_NOTE (RETURNED)
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+
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+/* Indicates the instruction is a stack check probe that should not
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+   be combined with other stack adjustments.  */
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+REG_NOTE (STACK_CHECK)
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diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
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index 4ac2542a3af..75780150e34 100644
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--- a/gcc/sched-deps.c
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+++ b/gcc/sched-deps.c
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@@ -4607,6 +4607,11 @@ parse_add_or_inc (struct mem_inc_info *mii, rtx insn, bool before_mem)
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   if (RTX_FRAME_RELATED_P (insn) || !pat)
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     return false;
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+  /* Do not allow breaking data dependencies for insns that are marked
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+     with REG_STACK_CHECK.  */
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+  if (find_reg_note (insn, REG_STACK_CHECK, NULL))
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+    return false;
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+
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   /* Result must be single reg.  */
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   if (!REG_P (SET_DEST (pat)))
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     return false;
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diff --git a/gcc/testsuite/gcc.target/i386/stack-check-11.c b/gcc/testsuite/gcc.target/i386/stack-check-11.c
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new file mode 100644
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index 00000000000..183103f01e5
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/i386/stack-check-11.c
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@@ -0,0 +1,16 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -fstack-clash-protection" } */
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+/* { dg-require-effective-target supports_stack_clash_protection } */
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+
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+extern void arf (unsigned long int *, unsigned long int *);
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+void
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+frob ()
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+{
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+  unsigned long int num[859];
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+  unsigned long int den[859];
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+  arf (den, num);
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+}
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+
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+/* { dg-final { scan-assembler-times "subq" 4 } } */
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+/* { dg-final { scan-assembler-times "orq" 3 } } */
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+