Blame SOURCES/gcc48-pr78875.patch

5ed81e
2017-01-17  Segher Boessenkool  <segher@kernel.crashing.org>
5ed81e
5ed81e
	PR target/78875
5ed81e
	* config/rs6000/rs6000-opts.h (stack_protector_guard): New enum.
5ed81e
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Handle
5ed81e
	the new options.
5ed81e
	* config/rs6000/rs6000.md (stack_protect_set): Handle the new more
5ed81e
	flexible settings.
5ed81e
	(stack_protect_test): Ditto.
5ed81e
	* config/rs6000/rs6000.opt (mstack-protector-guard=,
5ed81e
	mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
5ed81e
	options.
5ed81e
	* doc/invoke.texi (Option Summary) [RS/6000 and PowerPC Options]:
5ed81e
	Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
5ed81e
	-mstack-protector-guard-offset=.
5ed81e
	(RS/6000 and PowerPC Options): Ditto.
5ed81e
5ed81e
	* gcc.target/powerpc/ssp-1.c: New testcase.
5ed81e
	* gcc.target/powerpc/ssp-2.c: New testcase.
5ed81e
5ed81e
--- gcc/config/rs6000/rs6000.opt	(revision 244555)
5ed81e
+++ gcc/config/rs6000/rs6000.opt	(revision 244556)
5ed81e
@@ -593,3 +593,31 @@ Allow float variables in upper registers
5ed81e
 moptimize-swaps
5ed81e
 Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
5ed81e
 Analyze and remove doubleword swaps from VSX computations.
5ed81e
+
5ed81e
+mstack-protector-guard=
5ed81e
+Target RejectNegative Joined Enum(stack_protector_guard) Var(rs6000_stack_protector_guard) Init(SSP_TLS)
5ed81e
+Use given stack-protector guard.
5ed81e
+
5ed81e
+Enum
5ed81e
+Name(stack_protector_guard) Type(enum stack_protector_guard)
5ed81e
+Valid arguments to -mstack-protector-guard=:
5ed81e
+
5ed81e
+EnumValue
5ed81e
+Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
5ed81e
+
5ed81e
+EnumValue
5ed81e
+Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
5ed81e
+
5ed81e
+mstack-protector-guard-reg=
5ed81e
+Target RejectNegative Joined Var(rs6000_stack_protector_guard_reg_str)
5ed81e
+Use the given base register for addressing the stack-protector guard.
5ed81e
+
5ed81e
+TargetVariable
5ed81e
+int rs6000_stack_protector_guard_reg = 0
5ed81e
+
5ed81e
+mstack-protector-guard-offset=
5ed81e
+Target RejectNegative Joined Integer Var(rs6000_stack_protector_guard_offset_str)
5ed81e
+Use the given offset for addressing the stack-protector guard.
5ed81e
+
5ed81e
+TargetVariable
5ed81e
+long rs6000_stack_protector_guard_offset = 0
5ed81e
--- gcc/config/rs6000/rs6000.c	(revision 244555)
5ed81e
+++ gcc/config/rs6000/rs6000.c	(revision 244556)
5ed81e
@@ -3727,6 +3727,54 @@ rs6000_option_override_internal (bool gl
5ed81e
 				    atoi (rs6000_sched_insert_nops_str));
5ed81e
     }
5ed81e
 
5ed81e
+  /* Handle stack protector */
5ed81e
+  if (!global_options_set.x_rs6000_stack_protector_guard)
5ed81e
+#ifdef TARGET_THREAD_SSP_OFFSET
5ed81e
+    rs6000_stack_protector_guard = SSP_TLS;
5ed81e
+#else
5ed81e
+    rs6000_stack_protector_guard = SSP_GLOBAL;
5ed81e
+#endif
5ed81e
+
5ed81e
+#ifdef TARGET_THREAD_SSP_OFFSET
5ed81e
+  rs6000_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
5ed81e
+  rs6000_stack_protector_guard_reg = TARGET_64BIT ? 13 : 2;
5ed81e
+#endif
5ed81e
+
5ed81e
+  if (global_options_set.x_rs6000_stack_protector_guard_offset_str)
5ed81e
+    {
5ed81e
+      char *endp;
5ed81e
+      const char *str = rs6000_stack_protector_guard_offset_str;
5ed81e
+
5ed81e
+      errno = 0;
5ed81e
+      long offset = strtol (str, &endp, 0);
5ed81e
+      if (!*str || *endp || errno)
5ed81e
+	error ("%qs is not a valid number "
5ed81e
+	       "in -mstack-protector-guard-offset=", str);
5ed81e
+
5ed81e
+      if (!IN_RANGE (offset, -0x8000, 0x7fff)
5ed81e
+	  || (TARGET_64BIT && (offset & 3)))
5ed81e
+	error ("%qs is not a valid offset "
5ed81e
+	       "in -mstack-protector-guard-offset=", str);
5ed81e
+
5ed81e
+      rs6000_stack_protector_guard_offset = offset;
5ed81e
+    }
5ed81e
+
5ed81e
+  if (global_options_set.x_rs6000_stack_protector_guard_reg_str)
5ed81e
+    {
5ed81e
+      const char *str = rs6000_stack_protector_guard_reg_str;
5ed81e
+      int reg = decode_reg_name (str);
5ed81e
+
5ed81e
+      if (!IN_RANGE (reg, 1, 31))
5ed81e
+	error ("%qs is not a valid base register "
5ed81e
+	       "in -mstack-protector-guard-reg=", str);
5ed81e
+
5ed81e
+      rs6000_stack_protector_guard_reg = reg;
5ed81e
+    }
5ed81e
+
5ed81e
+  if (rs6000_stack_protector_guard == SSP_TLS
5ed81e
+      && !IN_RANGE (rs6000_stack_protector_guard_reg, 1, 31))
5ed81e
+    error ("-mstack-protector-guard=tls needs a valid base register");
5ed81e
+
5ed81e
   if (global_init_p)
5ed81e
     {
5ed81e
 #ifdef TARGET_REGNAMES
5ed81e
--- gcc/config/rs6000/rs6000.md	(revision 244555)
5ed81e
+++ gcc/config/rs6000/rs6000.md	(revision 244556)
5ed81e
@@ -13092,19 +13092,23 @@
5ed81e
 
5ed81e
 
5ed81e
 (define_expand "stack_protect_set"
5ed81e
-  [(match_operand 0 "memory_operand" "")
5ed81e
-   (match_operand 1 "memory_operand" "")]
5ed81e
+  [(match_operand 0 "memory_operand")
5ed81e
+   (match_operand 1 "memory_operand")]
5ed81e
   ""
5ed81e
 {
5ed81e
-#ifdef TARGET_THREAD_SSP_OFFSET
5ed81e
-  rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
5ed81e
-  rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
5ed81e
-  operands[1] = gen_rtx_MEM (Pmode, addr);
5ed81e
-#endif
5ed81e
+  if (rs6000_stack_protector_guard == SSP_TLS)
5ed81e
+    {
5ed81e
+      rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
5ed81e
+      rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
5ed81e
+      rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
5ed81e
+      operands[1] = gen_rtx_MEM (Pmode, addr);
5ed81e
+    }
5ed81e
+
5ed81e
   if (TARGET_64BIT)
5ed81e
     emit_insn (gen_stack_protect_setdi (operands[0], operands[1]));
5ed81e
   else
5ed81e
     emit_insn (gen_stack_protect_setsi (operands[0], operands[1]));
5ed81e
+
5ed81e
   DONE;
5ed81e
 })
5ed81e
 
5ed81e
@@ -13127,21 +13131,26 @@
5ed81e
    (set_attr "length" "12")])
5ed81e
 
5ed81e
 (define_expand "stack_protect_test"
5ed81e
-  [(match_operand 0 "memory_operand" "")
5ed81e
-   (match_operand 1 "memory_operand" "")
5ed81e
-   (match_operand 2 "" "")]
5ed81e
+  [(match_operand 0 "memory_operand")
5ed81e
+   (match_operand 1 "memory_operand")
5ed81e
+   (match_operand 2 "")]
5ed81e
   ""
5ed81e
 {
5ed81e
-  rtx test, op0, op1;
5ed81e
-#ifdef TARGET_THREAD_SSP_OFFSET
5ed81e
-  rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
5ed81e
-  rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
5ed81e
-  operands[1] = gen_rtx_MEM (Pmode, addr);
5ed81e
-#endif
5ed81e
-  op0 = operands[0];
5ed81e
-  op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]), UNSPEC_SP_TEST);
5ed81e
-  test = gen_rtx_EQ (VOIDmode, op0, op1);
5ed81e
-  emit_jump_insn (gen_cbranchsi4 (test, op0, op1, operands[2]));
5ed81e
+  rtx guard = operands[1];
5ed81e
+
5ed81e
+  if (rs6000_stack_protector_guard == SSP_TLS)
5ed81e
+    {
5ed81e
+      rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
5ed81e
+      rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
5ed81e
+      rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
5ed81e
+      guard = gen_rtx_MEM (Pmode, addr);
5ed81e
+    }
5ed81e
+
5ed81e
+  operands[1] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, guard), UNSPEC_SP_TEST);
5ed81e
+  rtx test = gen_rtx_EQ (VOIDmode, operands[0], operands[1]);
5ed81e
+  rtx jump = gen_cbranchsi4 (test, operands[0], operands[1], operands[2]);
5ed81e
+  emit_jump_insn (jump);
5ed81e
+
5ed81e
   DONE;
5ed81e
 })
5ed81e
 
5ed81e
--- gcc/config/rs6000/rs6000-opts.h	(revision 244555)
5ed81e
+++ gcc/config/rs6000/rs6000-opts.h	(revision 244556)
5ed81e
@@ -154,6 +154,12 @@ enum rs6000_vector {
5ed81e
   VECTOR_OTHER			/* Some other vector unit */
5ed81e
 };
5ed81e
 
5ed81e
+/* Where to get the canary for the stack protector.  */
5ed81e
+enum stack_protector_guard {
5ed81e
+  SSP_TLS,			/* per-thread canary in TLS block */
5ed81e
+  SSP_GLOBAL			/* global canary */
5ed81e
+};
5ed81e
+
5ed81e
 /* No enumeration is defined to index the -mcpu= values (entries in
5ed81e
    processor_target_table), with the type int being used instead, but
5ed81e
    we need to distinguish the special "native" value.  */
5ed81e
--- gcc/doc/invoke.texi	(revision 244555)
5ed81e
+++ gcc/doc/invoke.texi	(revision 244556)
5ed81e
@@ -862,7 +862,9 @@ See RS/6000 and PowerPC Options.
5ed81e
 -mcrypto -mno-crypto -mdirect-move -mno-direct-move @gol
5ed81e
 -mquad-memory -mno-quad-memory @gol
5ed81e
 -mquad-memory-atomic -mno-quad-memory-atomic @gol
5ed81e
--mcompat-align-parm -mno-compat-align-parm}
5ed81e
+-mcompat-align-parm -mno-compat-align-parm @gol
5ed81e
+-mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
5ed81e
+-mstack-protector-guard-offset=@var{offset}}
5ed81e
 
5ed81e
 @emph{RX Options}
5ed81e
 @gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
5ed81e
@@ -18295,6 +18297,23 @@ GCC.
5ed81e
 
5ed81e
 In this version of the compiler, the @option{-mcompat-align-parm}
5ed81e
 is the default, except when using the Linux ELFv2 ABI.
5ed81e
+
5ed81e
+@item -mstack-protector-guard=@var{guard}
5ed81e
+@itemx -mstack-protector-guard-reg=@var{reg}
5ed81e
+@itemx -mstack-protector-guard-offset=@var{offset}
5ed81e
+@opindex mstack-protector-guard
5ed81e
+@opindex mstack-protector-guard-reg
5ed81e
+@opindex mstack-protector-guard-offset
5ed81e
+Generate stack protection code using canary at @var{guard}.  Supported
5ed81e
+locations are @samp{global} for global canary or @samp{tls} for per-thread
5ed81e
+canary in the TLS block (the default with GNU libc version 2.4 or later).
5ed81e
+
5ed81e
+With the latter choice the options
5ed81e
+@option{-mstack-protector-guard-reg=@var{reg}} and
5ed81e
+@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify
5ed81e
+which register to use as base register for reading the canary, and from what
5ed81e
+offset from that base register. The default for those is as specified in the
5ed81e
+relevant ABI.
5ed81e
 @end table
5ed81e
 
5ed81e
 @node RX Options
5ed81e
--- gcc/testsuite/gcc.target/powerpc/ssp-1.c	(nonexistent)
5ed81e
+++ gcc/testsuite/gcc.target/powerpc/ssp-1.c	(revision 244562)
5ed81e
@@ -0,0 +1,6 @@
5ed81e
+/* { dg-do compile } */
5ed81e
+/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
5ed81e
+
5ed81e
+/* { dg-final { scan-assembler "__stack_chk_guard" } } */
5ed81e
+
5ed81e
+void f(void) { }
5ed81e
--- gcc/testsuite/gcc.target/powerpc/ssp-2.c	(nonexistent)
5ed81e
+++ gcc/testsuite/gcc.target/powerpc/ssp-2.c	(revision 244562)
5ed81e
@@ -0,0 +1,6 @@
5ed81e
+/* { dg-do compile } */
5ed81e
+/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=tls -mstack-protector-guard-reg=r18 -mstack-protector-guard-offset=0x3038" } */
5ed81e
+
5ed81e
+/* { dg-final { scan-assembler {\m12344\(r?18\)} } } */
5ed81e
+
5ed81e
+void f(void) { }