|
 |
22033d |
2014-08-08 Richard Henderson <rth@redhat.com>
|
|
|
22033d |
|
|
|
22033d |
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Add
|
|
|
22033d |
cfi_ops argument, for restore put REG_CFA_RESTORE notes into
|
|
|
22033d |
*cfi_ops rather than on individual insns. Cleanup.
|
|
|
22033d |
(aarch64_save_or_restore_callee_save_registers): Likewise.
|
|
|
22033d |
(aarch64_expand_prologue): Adjust caller.
|
|
|
22033d |
(aarch64_expand_epilogue): Likewise. Cleanup. Emit queued cfi_ops
|
|
|
22033d |
on the stack restore insn.
|
|
|
22033d |
|
|
|
22033d |
--- gcc/config/aarch64/aarch64.c 2014-07-15 02:27:16.000000000 -0700
|
|
|
22033d |
+++ gcc/config/aarch64/aarch64.c 2014-08-21 12:52:44.190455860 -0700
|
|
|
22033d |
@@ -1603,24 +1603,23 @@ aarch64_register_saved_on_entry (int reg
|
|
|
22033d |
|
|
|
22033d |
static void
|
|
|
22033d |
aarch64_save_or_restore_fprs (int start_offset, int increment,
|
|
|
22033d |
- bool restore, rtx base_rtx)
|
|
|
22033d |
-
|
|
|
22033d |
+ bool restore, rtx base_rtx, rtx *cfi_ops)
|
|
|
22033d |
{
|
|
|
22033d |
unsigned regno;
|
|
|
22033d |
unsigned regno2;
|
|
|
22033d |
rtx insn;
|
|
|
22033d |
rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
|
|
|
22033d |
|
|
|
22033d |
-
|
|
|
22033d |
for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
|
|
|
22033d |
{
|
|
|
22033d |
if (aarch64_register_saved_on_entry (regno))
|
|
|
22033d |
{
|
|
|
22033d |
- rtx mem;
|
|
|
22033d |
+ rtx mem, reg1;
|
|
|
22033d |
mem = gen_mem_ref (DFmode,
|
|
|
22033d |
plus_constant (Pmode,
|
|
|
22033d |
base_rtx,
|
|
|
22033d |
start_offset));
|
|
|
22033d |
+ reg1 = gen_rtx_REG (DFmode, regno);
|
|
|
22033d |
|
|
|
22033d |
for (regno2 = regno + 1;
|
|
|
22033d |
regno2 <= V31_REGNUM
|
|
|
22033d |
@@ -1632,54 +1631,51 @@ aarch64_save_or_restore_fprs (int start_
|
|
|
22033d |
if (regno2 <= V31_REGNUM &&
|
|
|
22033d |
aarch64_register_saved_on_entry (regno2))
|
|
|
22033d |
{
|
|
|
22033d |
- rtx mem2;
|
|
|
22033d |
+ rtx mem2, reg2;
|
|
|
22033d |
/* Next highest register to be saved. */
|
|
|
22033d |
mem2 = gen_mem_ref (DFmode,
|
|
|
22033d |
plus_constant
|
|
|
22033d |
(Pmode,
|
|
|
22033d |
base_rtx,
|
|
|
22033d |
start_offset + increment));
|
|
|
22033d |
+ reg2 = gen_rtx_REG (DFmode, regno2);
|
|
|
22033d |
+
|
|
|
22033d |
if (restore == false)
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_insn
|
|
|
22033d |
- ( gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno),
|
|
|
22033d |
- mem2, gen_rtx_REG (DFmode, regno2)));
|
|
|
22033d |
-
|
|
|
22033d |
+ insn = emit_insn (gen_store_pairdf (mem, reg1, mem2, reg2));
|
|
|
22033d |
+ /* The first part of a frame-related parallel insn
|
|
|
22033d |
+ is always assumed to be relevant to the frame
|
|
|
22033d |
+ calculations; subsequent parts, are only
|
|
|
22033d |
+ frame-related if explicitly marked. */
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_insn
|
|
|
22033d |
- ( gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem,
|
|
|
22033d |
- gen_rtx_REG (DFmode, regno2), mem2));
|
|
|
22033d |
-
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno));
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno2));
|
|
|
22033d |
+ emit_insn (gen_load_pairdf (reg1, mem, reg2, mem2));
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
- /* The first part of a frame-related parallel insn
|
|
|
22033d |
- is always assumed to be relevant to the frame
|
|
|
22033d |
- calculations; subsequent parts, are only
|
|
|
22033d |
- frame-related if explicitly marked. */
|
|
|
22033d |
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0,
|
|
|
22033d |
- 1)) = 1;
|
|
|
22033d |
regno = regno2;
|
|
|
22033d |
start_offset += increment * 2;
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
if (restore == false)
|
|
|
22033d |
- insn = emit_move_insn (mem, gen_rtx_REG (DFmode, regno));
|
|
|
22033d |
+ {
|
|
|
22033d |
+ insn = emit_move_insn (mem, reg1);
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
+ }
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_move_insn (gen_rtx_REG (DFmode, regno), mem);
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
|
|
|
22033d |
+ emit_move_insn (reg1, mem);
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
start_offset += increment;
|
|
|
22033d |
}
|
|
|
22033d |
- RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
}
|
|
|
22033d |
-
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
|
|
|
22033d |
@@ -1687,13 +1683,14 @@ aarch64_save_or_restore_fprs (int start_
|
|
|
22033d |
restore's have to happen. */
|
|
|
22033d |
static void
|
|
|
22033d |
aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
|
|
|
22033d |
- bool restore)
|
|
|
22033d |
+ bool restore, rtx *cfi_ops)
|
|
|
22033d |
{
|
|
|
22033d |
rtx insn;
|
|
|
22033d |
rtx base_rtx = stack_pointer_rtx;
|
|
|
22033d |
HOST_WIDE_INT start_offset = offset;
|
|
|
22033d |
HOST_WIDE_INT increment = UNITS_PER_WORD;
|
|
|
22033d |
- rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
|
|
|
22033d |
+ rtx (*gen_mem_ref)(enum machine_mode, rtx)
|
|
|
22033d |
+ = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
|
|
|
22033d |
unsigned limit = (frame_pointer_needed)? R28_REGNUM: R30_REGNUM;
|
|
|
22033d |
unsigned regno;
|
|
|
22033d |
unsigned regno2;
|
|
|
22033d |
@@ -1702,11 +1699,13 @@ aarch64_save_or_restore_callee_save_regi
|
|
|
22033d |
{
|
|
|
22033d |
if (aarch64_register_saved_on_entry (regno))
|
|
|
22033d |
{
|
|
|
22033d |
- rtx mem;
|
|
|
22033d |
+ rtx mem, reg1;
|
|
|
22033d |
+
|
|
|
22033d |
mem = gen_mem_ref (Pmode,
|
|
|
22033d |
plus_constant (Pmode,
|
|
|
22033d |
base_rtx,
|
|
|
22033d |
start_offset));
|
|
|
22033d |
+ reg1 = gen_rtx_REG (DImode, regno);
|
|
|
22033d |
|
|
|
22033d |
for (regno2 = regno + 1;
|
|
|
22033d |
regno2 <= limit
|
|
|
22033d |
@@ -1718,56 +1717,54 @@ aarch64_save_or_restore_callee_save_regi
|
|
|
22033d |
if (regno2 <= limit &&
|
|
|
22033d |
aarch64_register_saved_on_entry (regno2))
|
|
|
22033d |
{
|
|
|
22033d |
- rtx mem2;
|
|
|
22033d |
+ rtx mem2, reg2;
|
|
|
22033d |
/* Next highest register to be saved. */
|
|
|
22033d |
mem2 = gen_mem_ref (Pmode,
|
|
|
22033d |
plus_constant
|
|
|
22033d |
(Pmode,
|
|
|
22033d |
base_rtx,
|
|
|
22033d |
start_offset + increment));
|
|
|
22033d |
+ reg2 = gen_rtx_REG (DImode, regno2);
|
|
|
22033d |
+
|
|
|
22033d |
if (restore == false)
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_insn
|
|
|
22033d |
- ( gen_store_pairdi (mem, gen_rtx_REG (DImode, regno),
|
|
|
22033d |
- mem2, gen_rtx_REG (DImode, regno2)));
|
|
|
22033d |
-
|
|
|
22033d |
+ insn = emit_insn (gen_store_pairdi (mem, reg1, mem2, reg2));
|
|
|
22033d |
+ /* The first part of a frame-related parallel insn
|
|
|
22033d |
+ is always assumed to be relevant to the frame
|
|
|
22033d |
+ calculations; subsequent parts, are only
|
|
|
22033d |
+ frame-related if explicitly marked. */
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_insn
|
|
|
22033d |
- ( gen_load_pairdi (gen_rtx_REG (DImode, regno), mem,
|
|
|
22033d |
- gen_rtx_REG (DImode, regno2), mem2));
|
|
|
22033d |
-
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2));
|
|
|
22033d |
+ emit_insn (gen_load_pairdi (reg1, mem, reg2, mem2));
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
- /* The first part of a frame-related parallel insn
|
|
|
22033d |
- is always assumed to be relevant to the frame
|
|
|
22033d |
- calculations; subsequent parts, are only
|
|
|
22033d |
- frame-related if explicitly marked. */
|
|
|
22033d |
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0,
|
|
|
22033d |
- 1)) = 1;
|
|
|
22033d |
regno = regno2;
|
|
|
22033d |
start_offset += increment * 2;
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
if (restore == false)
|
|
|
22033d |
- insn = emit_move_insn (mem, gen_rtx_REG (DImode, regno));
|
|
|
22033d |
+ {
|
|
|
22033d |
+ insn = emit_move_insn (mem, reg1);
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
+ }
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
- insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem);
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
|
|
|
22033d |
+ emit_move_insn (reg1, mem);
|
|
|
22033d |
+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
start_offset += increment;
|
|
|
22033d |
}
|
|
|
22033d |
- RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
- aarch64_save_or_restore_fprs (start_offset, increment, restore, base_rtx);
|
|
|
22033d |
-
|
|
|
22033d |
+ aarch64_save_or_restore_fprs (start_offset, increment, restore,
|
|
|
22033d |
+ base_rtx, cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
/* AArch64 stack frames generated by this compiler look like:
|
|
|
22033d |
@@ -1966,7 +1963,7 @@ aarch64_expand_prologue (void)
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
aarch64_save_or_restore_callee_save_registers
|
|
|
22033d |
- (fp_offset + cfun->machine->frame.hardfp_offset, 0);
|
|
|
22033d |
+ (fp_offset + cfun->machine->frame.hardfp_offset, 0, NULL);
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
/* when offset >= 512,
|
|
|
22033d |
@@ -1991,6 +1988,7 @@ aarch64_expand_epilogue (bool for_sibcal
|
|
|
22033d |
HOST_WIDE_INT fp_offset;
|
|
|
22033d |
rtx insn;
|
|
|
22033d |
rtx cfa_reg;
|
|
|
22033d |
+ rtx cfi_ops = NULL;
|
|
|
22033d |
|
|
|
22033d |
aarch64_layout_frame ();
|
|
|
22033d |
original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size;
|
|
|
22033d |
@@ -2035,15 +2033,17 @@ aarch64_expand_epilogue (bool for_sibcal
|
|
|
22033d |
insn = emit_insn (gen_add3_insn (stack_pointer_rtx,
|
|
|
22033d |
hard_frame_pointer_rtx,
|
|
|
22033d |
GEN_INT (- fp_offset)));
|
|
|
22033d |
+ /* CFA should be calculated from the value of SP from now on. */
|
|
|
22033d |
+ add_reg_note (insn, REG_CFA_ADJUST_CFA,
|
|
|
22033d |
+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
|
|
22033d |
+ plus_constant (Pmode, hard_frame_pointer_rtx,
|
|
|
22033d |
+ -fp_offset)));
|
|
|
22033d |
RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
- /* As SP is set to (FP - fp_offset), according to the rules in
|
|
|
22033d |
- dwarf2cfi.c:dwarf2out_frame_debug_expr, CFA should be calculated
|
|
|
22033d |
- from the value of SP from now on. */
|
|
|
22033d |
cfa_reg = stack_pointer_rtx;
|
|
|
22033d |
}
|
|
|
22033d |
|
|
|
22033d |
aarch64_save_or_restore_callee_save_registers
|
|
|
22033d |
- (fp_offset + cfun->machine->frame.hardfp_offset, 1);
|
|
|
22033d |
+ (fp_offset + cfun->machine->frame.hardfp_offset, 1, &cfi_ops);
|
|
|
22033d |
|
|
|
22033d |
/* Restore the frame pointer and lr if the frame pointer is needed. */
|
|
|
22033d |
if (offset > 0)
|
|
|
22033d |
@@ -2051,6 +2051,8 @@ aarch64_expand_epilogue (bool for_sibcal
|
|
|
22033d |
if (frame_pointer_needed)
|
|
|
22033d |
{
|
|
|
22033d |
rtx mem_fp, mem_lr;
|
|
|
22033d |
+ rtx reg_fp = hard_frame_pointer_rtx;
|
|
|
22033d |
+ rtx reg_lr = gen_rtx_REG (DImode, LR_REGNUM);
|
|
|
22033d |
|
|
|
22033d |
if (fp_offset)
|
|
|
22033d |
{
|
|
|
22033d |
@@ -2063,52 +2065,36 @@ aarch64_expand_epilogue (bool for_sibcal
|
|
|
22033d |
stack_pointer_rtx,
|
|
|
22033d |
fp_offset
|
|
|
22033d |
+ UNITS_PER_WORD));
|
|
|
22033d |
- insn = emit_insn (gen_load_pairdi (hard_frame_pointer_rtx,
|
|
|
22033d |
- mem_fp,
|
|
|
22033d |
- gen_rtx_REG (DImode,
|
|
|
22033d |
- LR_REGNUM),
|
|
|
22033d |
- mem_lr));
|
|
|
22033d |
+ emit_insn (gen_load_pairdi (reg_fp, mem_fp, reg_lr, mem_lr));
|
|
|
22033d |
+
|
|
|
22033d |
+ insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
|
|
|
22033d |
+ GEN_INT (offset)));
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
insn = emit_insn (gen_loadwb_pairdi_di
|
|
|
22033d |
- (stack_pointer_rtx,
|
|
|
22033d |
- stack_pointer_rtx,
|
|
|
22033d |
- hard_frame_pointer_rtx,
|
|
|
22033d |
- gen_rtx_REG (DImode, LR_REGNUM),
|
|
|
22033d |
- GEN_INT (offset),
|
|
|
22033d |
+ (stack_pointer_rtx, stack_pointer_rtx,
|
|
|
22033d |
+ reg_fp, reg_lr, GEN_INT (offset),
|
|
|
22033d |
GEN_INT (GET_MODE_SIZE (DImode) + offset)));
|
|
|
22033d |
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1;
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_ADJUST_CFA,
|
|
|
22033d |
- (gen_rtx_SET (Pmode, stack_pointer_rtx,
|
|
|
22033d |
- plus_constant (Pmode, cfa_reg,
|
|
|
22033d |
- offset))));
|
|
|
22033d |
- }
|
|
|
22033d |
-
|
|
|
22033d |
- /* The first part of a frame-related parallel insn
|
|
|
22033d |
- is always assumed to be relevant to the frame
|
|
|
22033d |
- calculations; subsequent parts, are only
|
|
|
22033d |
- frame-related if explicitly marked. */
|
|
|
22033d |
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
|
|
|
22033d |
- RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE, hard_frame_pointer_rtx);
|
|
|
22033d |
- add_reg_note (insn, REG_CFA_RESTORE,
|
|
|
22033d |
- gen_rtx_REG (DImode, LR_REGNUM));
|
|
|
22033d |
-
|
|
|
22033d |
- if (fp_offset)
|
|
|
22033d |
- {
|
|
|
22033d |
- insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
|
|
|
22033d |
- GEN_INT (offset)));
|
|
|
22033d |
- RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
+ cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg_fp, cfi_ops);
|
|
|
22033d |
+ cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg_lr, cfi_ops);
|
|
|
22033d |
}
|
|
|
22033d |
else
|
|
|
22033d |
{
|
|
|
22033d |
insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
|
|
|
22033d |
GEN_INT (offset)));
|
|
|
22033d |
- RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
+ cfi_ops = alloc_reg_note (REG_CFA_ADJUST_CFA,
|
|
|
22033d |
+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
|
|
22033d |
+ plus_constant (Pmode, cfa_reg,
|
|
|
22033d |
+ offset)),
|
|
|
22033d |
+ cfi_ops);
|
|
|
22033d |
+ REG_NOTES (insn) = cfi_ops;
|
|
|
22033d |
+ RTX_FRAME_RELATED_P (insn) = 1;
|
|
|
22033d |
}
|
|
|
22033d |
+ else
|
|
|
22033d |
+ gcc_assert (cfi_ops == NULL);
|
|
|
22033d |
|
|
|
22033d |
/* Stack adjustment for exception handler. */
|
|
|
22033d |
if (crtl->calls_eh_return)
|