Blame SOURCES/glibc-rh676076.patch

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2011-03-02  Harsha Jagasia  <harsha.jagasia@amd.com>
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	    Ulrich Drepper  <drepper@gmail.com>
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	* sysdeps/x86_64/memset.S: After aligning destination, code
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	branches to different locations depending on the value of
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	misalignment, when multiarch is enabled. Fix this.
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2011-03-02  Harsha Jagasia  <harsha.jagasia@amd.com>
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	* sysdeps/x86_64/cacheinfo.c (init_cacheinfo):
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	Set _x86_64_preferred_memory_instruction for AMD processsors.
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	* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
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	Set bit_Prefer_SSE_for_memop for AMD processors.
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2010-11-07  H.J. Lu  <hongjiu.lu@intel.com>
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	* sysdeps/x86_64/memset.S: Check USE_MULTIARCH and USE_SSE2 for
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	IFUNC support.
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	* sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add
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	memset-x86-64.
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	* sysdeps/x86_64/multiarch/bzero.S: New file.
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	* sysdeps/x86_64/multiarch/cacheinfo.c: New file.
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	* sysdeps/x86_64/multiarch/memset-x86-64.S: New file.
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	* sysdeps/x86_64/multiarch/memset.S: New file.
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	* sysdeps/x86_64/multiarch/memset_chk.S: New file.
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	* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
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	Set bit_Prefer_SSE_for_memop for Intel processors.
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	* sysdeps/x86_64/multiarch/init-arch.h (bit_Prefer_SSE_for_memop):
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	Define.
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	(index_Prefer_SSE_for_memop): Define.
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	(HAS_PREFER_SSE_FOR_MEMOP): Define.
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Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c
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===================================================================
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--- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/cacheinfo.c
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+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c
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@@ -613,6 +613,25 @@ init_cacheinfo (void)
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       long int core = handle_amd (_SC_LEVEL2_CACHE_SIZE);
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       shared = handle_amd (_SC_LEVEL3_CACHE_SIZE);
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+#ifndef DISABLE_PREFERRED_MEMORY_INSTRUCTION
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+# ifdef USE_MULTIARCH
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+      eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
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+      ebx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ebx;
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+      ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
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+      edx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].edx;
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+# else
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+      __cpuid (1, eax, ebx, ecx, edx);
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+# endif
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+
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+      /* AMD prefers SSSE3 instructions for memory/string routines
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+	 if they are avaiable, otherwise it prefers integer
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+	 instructions.  */
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+      if ((ecx & 0x200))
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+	__x86_64_preferred_memory_instruction = 3;
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+      else
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+	__x86_64_preferred_memory_instruction = 0;
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+#endif
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+
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       /* Get maximum extended function. */
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       __cpuid (0x80000000, max_cpuid_ex, ebx, ecx, edx);
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Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/memset.S
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===================================================================
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--- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/memset.S
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+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/memset.S
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@@ -24,7 +24,7 @@
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 #define __STOS_UPPER_BOUNDARY	$65536
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         .text
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-#ifndef NOT_IN_libc
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+#if !defined NOT_IN_libc && !defined USE_MULTIARCH
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 ENTRY(__bzero)
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 	mov	%rsi,%rdx	/* Adjust parameter.  */
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 	xorl	%esi,%esi	/* Fill with 0s.  */
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@@ -34,10 +34,10 @@ weak_alias (__bzero, bzero)
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 #endif
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 #if defined PIC && !defined NOT_IN_libc
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-ENTRY (__memset_chk)
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+ENTRY_CHK (__memset_chk)
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 	cmpq	%rdx, %rcx
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 	jb	HIDDEN_JUMPTARGET (__chk_fail)
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-END (__memset_chk)
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+END_CHK (__memset_chk)
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 #endif
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 ENTRY (memset)
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 L(memset_entry):
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@@ -591,157 +591,15 @@ L(A6Q1):    mov    %dx,-0xe(%rdi)
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 L(A7Q0):    mov    %dl,-0x7(%rdi)
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 L(A6Q0):    mov    %dx,-0x6(%rdi)
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 	mov    %edx,-0x4(%rdi)
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-	jmp    L(aligned_now)
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-
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-	.balign     16
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-L(aligned_now):
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-
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-	 cmpl   $0x1,__x86_64_preferred_memory_instruction(%rip)
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-	 jg     L(SSE_pre)
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-
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-L(8byte_move_try):
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-	cmpq	__STOS_LOWER_BOUNDARY,%r8
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-	jae	L(8byte_stos_try)
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-
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-	.balign     16
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-L(8byte_move):
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-	movq	%r8,%rcx
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-	shrq	$7,%rcx
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-	jz	L(8byte_move_skip)
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-
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-	.p2align 4
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-
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-L(8byte_move_loop):
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-	decq	%rcx
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-
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-	movq	%rdx,    (%rdi)
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-	movq	%rdx,  8 (%rdi)
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-	movq	%rdx, 16 (%rdi)
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-	movq	%rdx, 24 (%rdi)
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-	movq	%rdx, 32 (%rdi)
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-	movq	%rdx, 40 (%rdi)
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-	movq	%rdx, 48 (%rdi)
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-	movq	%rdx, 56 (%rdi)
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-	movq	%rdx, 64 (%rdi)
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-	movq	%rdx, 72 (%rdi)
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-	movq	%rdx, 80 (%rdi)
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-	movq	%rdx, 88 (%rdi)
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-	movq	%rdx, 96 (%rdi)
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-	movq	%rdx, 104 (%rdi)
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-	movq	%rdx, 112 (%rdi)
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-	movq	%rdx, 120 (%rdi)
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-
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-	leaq	128 (%rdi),%rdi
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-
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-	jnz     L(8byte_move_loop)
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-
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-L(8byte_move_skip):
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-	andl	$127,%r8d
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-	lea    	(%rdi,%r8,1),%rdi
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-
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-#ifndef PIC
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-	lea    	L(setPxQx)(%rip),%r11
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-	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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-#else
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-	lea    	L(Got0)(%rip),%r11
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-	lea	L(setPxQx)(%rip),%rcx
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-	movswq	(%rcx,%r8,2),%rcx
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-	lea    	(%rcx,%r11,1),%r11
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-	jmpq   	*%r11
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-#endif
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-
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-	.balign     16
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-L(8byte_stos_try):
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-	mov    __x86_64_shared_cache_size(%rip),%r9d // ck largest cache size
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-	cmpq	%r8,%r9		// calculate the lesser of remaining
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-	cmovaq	%r8,%r9		// bytes and largest cache size
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-	jbe	L(8byte_stos)
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-
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-L(8byte_move_reuse_try):
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-	cmp	__STOS_UPPER_BOUNDARY,%r8
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-	jae	L(8byte_move)
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-
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-	.balign     16
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-L(8byte_stos):
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-	movq	%r9,%rcx
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-	andq	$-8,%r9
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-
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-	shrq	$3,%rcx
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-	jz	L(8byte_stos_skip)
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-
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-	xchgq	%rax,%rdx
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-
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-	rep
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-	stosq
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-
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-	xchgq	%rax,%rdx
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-
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-L(8byte_stos_skip):
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-	subq	%r9,%r8
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-	ja	L(8byte_nt_move)
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-
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-	andl	$7,%r8d
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-	lea    	(%rdi,%r8,1),%rdi
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-#ifndef PIC
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-	lea    	L(setPxQx)(%rip),%r11
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-	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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-#else
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-	lea    	L(Got0)(%rip),%r11
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-	lea     L(setPxQx)(%rip),%rcx
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-	movswq	(%rcx,%r8,2),%rcx
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-	lea	(%rcx,%r11,1),%r11
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-	jmpq   	*%r11
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-#endif
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-	.balign     16
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-L(8byte_nt_move):
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-	movq	%r8,%rcx
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-	shrq	$7,%rcx
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-	jz      L(8byte_nt_move_skip)
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-
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-	.balign     16
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-L(8byte_nt_move_loop):
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-	decq	%rcx
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-
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-	movntiq	%rdx,     (%rdi)
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-	movntiq	%rdx,   8 (%rdi)
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-	movntiq	%rdx,  16 (%rdi)
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-	movntiq	%rdx,  24 (%rdi)
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-	movntiq	%rdx,  32 (%rdi)
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-	movntiq	%rdx,  40 (%rdi)
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-	movntiq	%rdx,  48 (%rdi)
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-	movntiq	%rdx,  56 (%rdi)
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-	movntiq	%rdx,  64 (%rdi)
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-	movntiq	%rdx,  72 (%rdi)
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-	movntiq	%rdx,  80 (%rdi)
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-	movntiq	%rdx,  88 (%rdi)
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-	movntiq	%rdx,  96 (%rdi)
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-	movntiq	%rdx, 104 (%rdi)
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-	movntiq	%rdx, 112 (%rdi)
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-	movntiq	%rdx, 120 (%rdi)
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-
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-	leaq	128 (%rdi),%rdi
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-
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-	jnz     L(8byte_nt_move_loop)
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-
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-	sfence
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-
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-L(8byte_nt_move_skip):
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-	andl	$127,%r8d
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+#ifndef USE_MULTIARCH
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+	jmp    L(aligned_now)
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-	lea    	(%rdi,%r8,1),%rdi
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-#ifndef PIC
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-	lea    	L(setPxQx)(%rip),%r11
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-	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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+L(SSE_pre):
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 #else
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-	lea    	L(Got0)(%rip),%r11
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-	lea     L(setPxQx)(%rip),%rcx
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-	movswq	(%rcx,%r8,2),%rcx
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-	lea    	(%rcx,%r11,1),%r11
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-	jmpq   	*%r11
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+L(aligned_now):
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 #endif
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-
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-L(SSE_pre):
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+#if !defined USE_MULTIARCH || defined USE_SSE2
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 	 # fill RegXMM0 with the pattern
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 	 movd   %rdx,%xmm0
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 	 punpcklqdq %xmm0,%xmm0
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@@ -1342,11 +1200,162 @@ L(SSExDx):
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 	.short     L(SSE15QB)-L(SSE0Q0)
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 #endif
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 	.popsection
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+#endif /* !defined USE_MULTIARCH || defined USE_SSE2  */
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+
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+	.balign     16
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+#ifndef USE_MULTIARCH
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+L(aligned_now):
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+
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+	 cmpl   $0x1,__x86_64_preferred_memory_instruction(%rip)
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+	 jg     L(SSE_pre)
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+#endif /* USE_MULTIARCH */
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+
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+L(8byte_move_try):
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+	cmpq	__STOS_LOWER_BOUNDARY,%r8
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+	jae	L(8byte_stos_try)
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+
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+	.balign     16
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+L(8byte_move):
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+	movq	%r8,%rcx
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+	shrq	$7,%rcx
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+	jz	L(8byte_move_skip)
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+
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+	.p2align 4
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+
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+L(8byte_move_loop):
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+	decq	%rcx
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+
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+	movq	%rdx,    (%rdi)
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+	movq	%rdx,  8 (%rdi)
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+	movq	%rdx, 16 (%rdi)
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+	movq	%rdx, 24 (%rdi)
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+	movq	%rdx, 32 (%rdi)
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+	movq	%rdx, 40 (%rdi)
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+	movq	%rdx, 48 (%rdi)
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+	movq	%rdx, 56 (%rdi)
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+	movq	%rdx, 64 (%rdi)
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+	movq	%rdx, 72 (%rdi)
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+	movq	%rdx, 80 (%rdi)
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+	movq	%rdx, 88 (%rdi)
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+	movq	%rdx, 96 (%rdi)
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+	movq	%rdx, 104 (%rdi)
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+	movq	%rdx, 112 (%rdi)
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+	movq	%rdx, 120 (%rdi)
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+
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+	leaq	128 (%rdi),%rdi
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+
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+	jnz     L(8byte_move_loop)
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+
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+L(8byte_move_skip):
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+	andl	$127,%r8d
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+	lea    	(%rdi,%r8,1),%rdi
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+
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+#ifndef PIC
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+	lea    	L(setPxQx)(%rip),%r11
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+	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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+#else
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+	lea    	L(Got0)(%rip),%r11
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+	lea	L(setPxQx)(%rip),%rcx
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+	movswq	(%rcx,%r8,2),%rcx
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+	lea    	(%rcx,%r11,1),%r11
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+	jmpq   	*%r11
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+#endif
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+
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+	.balign     16
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+L(8byte_stos_try):
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+	mov    __x86_64_shared_cache_size(%rip),%r9d // ck largest cache size
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+	cmpq	%r8,%r9		// calculate the lesser of remaining
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+	cmovaq	%r8,%r9		// bytes and largest cache size
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+	jbe	L(8byte_stos)
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+
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+L(8byte_move_reuse_try):
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+	cmp	__STOS_UPPER_BOUNDARY,%r8
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+	jae	L(8byte_move)
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+
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+	.balign     16
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+L(8byte_stos):
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+	movq	%r9,%rcx
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+	andq	$-8,%r9
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+
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+	shrq	$3,%rcx
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+	jz	L(8byte_stos_skip)
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+
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+	xchgq	%rax,%rdx
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+
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+	rep
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+	stosq
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+
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+	xchgq	%rax,%rdx
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+
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+L(8byte_stos_skip):
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+	subq	%r9,%r8
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+	ja	L(8byte_nt_move)
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+
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+	andl	$7,%r8d
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+	lea    	(%rdi,%r8,1),%rdi
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+#ifndef PIC
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+	lea    	L(setPxQx)(%rip),%r11
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+	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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+#else
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+	lea    	L(Got0)(%rip),%r11
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+	lea     L(setPxQx)(%rip),%rcx
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+	movswq	(%rcx,%r8,2),%rcx
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+	lea	(%rcx,%r11,1),%r11
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+	jmpq   	*%r11
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+#endif
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+
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+	.balign     16
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+L(8byte_nt_move):
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+	movq	%r8,%rcx
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+	shrq	$7,%rcx
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+	jz      L(8byte_nt_move_skip)
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+
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+	.balign     16
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+L(8byte_nt_move_loop):
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+	decq	%rcx
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+
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+	movntiq	%rdx,     (%rdi)
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+	movntiq	%rdx,   8 (%rdi)
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+	movntiq	%rdx,  16 (%rdi)
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+	movntiq	%rdx,  24 (%rdi)
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+	movntiq	%rdx,  32 (%rdi)
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+	movntiq	%rdx,  40 (%rdi)
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+	movntiq	%rdx,  48 (%rdi)
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+	movntiq	%rdx,  56 (%rdi)
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+	movntiq	%rdx,  64 (%rdi)
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+	movntiq	%rdx,  72 (%rdi)
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+	movntiq	%rdx,  80 (%rdi)
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+	movntiq	%rdx,  88 (%rdi)
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+	movntiq	%rdx,  96 (%rdi)
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+	movntiq	%rdx, 104 (%rdi)
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+	movntiq	%rdx, 112 (%rdi)
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+	movntiq	%rdx, 120 (%rdi)
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+
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+	leaq	128 (%rdi),%rdi
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+
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+	jnz     L(8byte_nt_move_loop)
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+
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+	sfence
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+
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+L(8byte_nt_move_skip):
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+	andl	$127,%r8d
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+
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+	lea    	(%rdi,%r8,1),%rdi
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+#ifndef PIC
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+	lea    	L(setPxQx)(%rip),%r11
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+	jmpq   	*(%r11,%r8,8) # old scheme remained for nonPIC
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+#else
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+	lea    	L(Got0)(%rip),%r11
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+	lea     L(setPxQx)(%rip),%rcx
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+	movswq	(%rcx,%r8,2),%rcx
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+	lea    	(%rcx,%r11,1),%r11
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+	jmpq   	*%r11
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+#endif
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 END (memset)
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 libc_hidden_builtin_def (memset)
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-#if defined PIC && !defined NOT_IN_libc
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+#if defined PIC && !defined NOT_IN_libc && !defined USE_MULTIARCH
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 strong_alias (__memset_chk, __memset_zero_constant_len_parameter)
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 	.section .gnu.warning.__memset_zero_constant_len_parameter
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 	.string "memset used with constant zero length parameter; this could be due to transposed parameters"
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Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/Makefile
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===================================================================
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--- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/Makefile
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+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/Makefile
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@@ -7,7 +7,8 @@ ifeq ($(subdir),string)
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 sysdep_routines += stpncpy-c strncpy-c strcmp-ssse3 strncmp-ssse3 \
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 		   strend-sse4 memcmp-sse4 \
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 		   strcasestr-nonascii strcasecmp_l-ssse3 \
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-		   strncase_l-ssse3
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+		   strncase_l-ssse3 \
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+		   memset-x86-64
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 ifeq (yes,$(config-cflags-sse4))
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 sysdep_routines += strcspn-c strpbrk-c strspn-c strstr-c strcasestr-c
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 CFLAGS-strcspn-c.c += -msse4
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Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/bzero.S
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===================================================================
b40826
--- /dev/null
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/bzero.S
b40826
@@ -0,0 +1,56 @@
b40826
+/* Multiple versions of bzero
b40826
+   Copyright (C) 2010 Free Software Foundation, Inc.
b40826
+   This file is part of the GNU C Library.
b40826
+
b40826
+   The GNU C Library is free software; you can redistribute it and/or
b40826
+   modify it under the terms of the GNU Lesser General Public
b40826
+   License as published by the Free Software Foundation; either
b40826
+   version 2.1 of the License, or (at your option) any later version.
b40826
+
b40826
+   The GNU C Library is distributed in the hope that it will be useful,
b40826
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
b40826
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
b40826
+   Lesser General Public License for more details.
b40826
+
b40826
+   You should have received a copy of the GNU Lesser General Public
b40826
+   License along with the GNU C Library; if not, write to the Free
b40826
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
b40826
+   02111-1307 USA.  */
b40826
+
b40826
+#include <sysdep.h>
b40826
+#include <init-arch.h>
b40826
+
b40826
+	.text
b40826
+ENTRY(__bzero)
b40826
+	.type	__bzero, @gnu_indirect_function
b40826
+	cmpl	$0, __cpu_features+KIND_OFFSET(%rip)
b40826
+	jne	1f
b40826
+	call	__init_cpu_features
b40826
+1:	leaq	__bzero_x86_64(%rip), %rax
b40826
+	testl	$bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
b40826
+	jz	2f
b40826
+	leaq	__bzero_sse2(%rip), %rax
b40826
+2:	ret
b40826
+END(__bzero)
b40826
+
b40826
+	.type	__bzero_sse2, @function
b40826
+__bzero_sse2:
b40826
+	cfi_startproc
b40826
+	CALL_MCOUNT
b40826
+	mov	%rsi,%rdx	/* Adjust parameter.  */
b40826
+	xorl	%esi,%esi	/* Fill with 0s.  */
b40826
+	jmp	__memset_sse2
b40826
+	cfi_endproc
b40826
+	.size __bzero_sse2, .-__bzero_sse2
b40826
+
b40826
+	.type	__bzero_x86_64, @function
b40826
+__bzero_x86_64:
b40826
+	cfi_startproc
b40826
+	CALL_MCOUNT
b40826
+	mov	%rsi,%rdx	/* Adjust parameter.  */
b40826
+	xorl	%esi,%esi	/* Fill with 0s.  */
b40826
+	jmp	__memset_x86_64
b40826
+	cfi_endproc
b40826
+	.size __bzero_x86_64, .-__bzero_x86_64
b40826
+
b40826
+weak_alias (__bzero, bzero)
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/cacheinfo.c
b40826
===================================================================
b40826
--- /dev/null
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/cacheinfo.c
b40826
@@ -0,0 +1,2 @@
b40826
+#define DISABLE_PREFERRED_MEMORY_INSTRUCTION
b40826
+#include "../cacheinfo.c"
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.c
b40826
===================================================================
b40826
--- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/init-arch.c
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.c
b40826
@@ -59,6 +59,11 @@ __init_cpu_features (void)
b40826
 
b40826
       get_common_indeces (&family, &model);
b40826
 
b40826
+      /* Intel processors prefer SSE instruction for memory/string
b40826
+	 routines if they are avaiable.  */
b40826
+      __cpu_features.feature[index_Prefer_SSE_for_memop]
b40826
+	|= bit_Prefer_SSE_for_memop;
b40826
+
b40826
       unsigned int eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
b40826
       unsigned int extended_family = (eax >> 20) & 0xff;
b40826
       unsigned int extended_model = (eax >> 12) & 0xf0;
b40826
@@ -92,6 +97,14 @@ __init_cpu_features (void)
b40826
       kind = arch_kind_amd;
b40826
 
b40826
       get_common_indeces (&family, &model);
b40826
+
b40826
+      unsigned int ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
b40826
+
b40826
+      /* AMD processors prefer SSE instructions for memory/string routines
b40826
+	 if they are available, otherwise they prefer integer instructions.  */
b40826
+      if ((ecx & 0x200))
b40826
+	__cpu_features.feature[index_Prefer_SSE_for_memop]
b40826
+	  |= bit_Prefer_SSE_for_memop;
b40826
     }
b40826
   else
b40826
     kind = arch_kind_other;
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.h
b40826
===================================================================
b40826
--- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/init-arch.h
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.h
b40826
@@ -16,7 +16,8 @@
b40826
    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
b40826
    02111-1307 USA.  */
b40826
 
b40826
-#define bit_Fast_Rep_String	(1 << 0)
b40826
+#define bit_Fast_Rep_String		(1 << 0)
b40826
+#define bit_Prefer_SSE_for_memop	(1 << 3)
b40826
 
b40826
 #ifdef	__ASSEMBLER__
b40826
 
b40826
@@ -33,6 +34,7 @@
b40826
 # define index_SSE4_2	COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
b40826
 
b40826
 #define index_Fast_Rep_String	FEATURE_INDEX_1*FEATURE_SIZE
b40826
+# define index_Prefer_SSE_for_memop	FEATURE_INDEX_1*FEATURE_SIZE
b40826
 
b40826
 #else	/* __ASSEMBLER__ */
b40826
 
b40826
@@ -103,5 +105,12 @@ extern const struct cpu_features *__get_
b40826
 # define HAS_FMA	HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, 12)
b40826
 
b40826
 # define index_Fast_Rep_String	FEATURE_INDEX_1
b40826
+# define index_Prefer_SSE_for_memop	FEATURE_INDEX_1
b40826
+
b40826
+#define HAS_ARCH_FEATURE(idx, bit) \
b40826
+  ((__get_cpu_features ()->feature[idx] & (bit)) != 0)
b40826
+
b40826
+#define HAS_PREFER_SSE_FOR_MEMOP \
b40826
+  HAS_ARCH_FEATURE (index_Prefer_SSE_for_memop, bit_Prefer_SSE_for_memop)
b40826
 
b40826
 #endif	/* __ASSEMBLER__ */
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset-x86-64.S
b40826
===================================================================
b40826
--- /dev/null
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset-x86-64.S
b40826
@@ -0,0 +1,18 @@
b40826
+#include <sysdep.h>
b40826
+
b40826
+#ifndef NOT_IN_libc
b40826
+# undef ENTRY_CHK
b40826
+# define ENTRY_CHK(name) \
b40826
+	.type __memset_chk_x86_64, @function; \
b40826
+	.globl __memset_chk_x86_64; \
b40826
+	.p2align 4; \
b40826
+	__memset_chk_x86_64: cfi_startproc; \
b40826
+	CALL_MCOUNT
b40826
+# undef END_CHK
b40826
+# define END_CHK(name) \
b40826
+	cfi_endproc; .size __memset_chk_x86_64, .-__memset_chk_x86_64
b40826
+
b40826
+# define libc_hidden_builtin_def(name)
b40826
+# define memset __memset_x86_64
b40826
+# include "../memset.S"
b40826
+#endif
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset.S
b40826
===================================================================
b40826
--- /dev/null
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset.S
b40826
@@ -0,0 +1,74 @@
b40826
+/* Multiple versions of memset
b40826
+   Copyright (C) 2010 Free Software Foundation, Inc.
b40826
+   This file is part of the GNU C Library.
b40826
+
b40826
+   The GNU C Library is free software; you can redistribute it and/or
b40826
+   modify it under the terms of the GNU Lesser General Public
b40826
+   License as published by the Free Software Foundation; either
b40826
+   version 2.1 of the License, or (at your option) any later version.
b40826
+
b40826
+   The GNU C Library is distributed in the hope that it will be useful,
b40826
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
b40826
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
b40826
+   Lesser General Public License for more details.
b40826
+
b40826
+   You should have received a copy of the GNU Lesser General Public
b40826
+   License along with the GNU C Library; if not, write to the Free
b40826
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
b40826
+   02111-1307 USA.  */
b40826
+
b40826
+#include <sysdep.h>
b40826
+#include <init-arch.h>
b40826
+
b40826
+/* Define multiple versions only for the definition in lib.  */
b40826
+#ifndef NOT_IN_libc
b40826
+ENTRY(memset)
b40826
+	.type	memset, @gnu_indirect_function
b40826
+	cmpl	$0, __cpu_features+KIND_OFFSET(%rip)
b40826
+	jne	1f
b40826
+	call	__init_cpu_features
b40826
+1:	leaq	__memset_x86_64(%rip), %rax
b40826
+	testl	$bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
b40826
+	jz	2f
b40826
+	leaq	__memset_sse2(%rip), %rax
b40826
+2:	ret
b40826
+END(memset)
b40826
+
b40826
+# define USE_SSE2 1
b40826
+
b40826
+# undef ENTRY
b40826
+# define ENTRY(name) \
b40826
+	.type __memset_sse2, @function; \
b40826
+	.globl __memset_sse2; \
b40826
+	.p2align 4; \
b40826
+	__memset_sse2: cfi_startproc; \
b40826
+	CALL_MCOUNT
b40826
+# undef END
b40826
+# define END(name) \
b40826
+	cfi_endproc; .size __memset_sse2, .-__memset_sse2
b40826
+
b40826
+# undef ENTRY_CHK
b40826
+# define ENTRY_CHK(name) \
b40826
+	.type __memset_chk_sse2, @function; \
b40826
+	.globl __memset_chk_sse2; \
b40826
+	.p2align 4; \
b40826
+	__memset_chk_sse2: cfi_startproc; \
b40826
+	CALL_MCOUNT
b40826
+# undef END_CHK
b40826
+# define END_CHK(name) \
b40826
+	cfi_endproc; .size __memset_chk_sse2, .-__memset_chk_sse2
b40826
+
b40826
+# ifdef SHARED
b40826
+#  undef libc_hidden_builtin_def
b40826
+/* It doesn't make sense to send libc-internal memset calls through a PLT.
b40826
+   The speedup we get from using GPR instruction is likely eaten away
b40826
+   by the indirect call in the PLT.  */
b40826
+#  define libc_hidden_builtin_def(name) \
b40826
+	.globl __GI_memset; __GI_memset = __memset_sse2
b40826
+# endif
b40826
+
b40826
+# undef strong_alias
b40826
+# define strong_alias(original, alias)
b40826
+#endif
b40826
+
b40826
+#include "../memset.S"
b40826
Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset_chk.S
b40826
===================================================================
b40826
--- /dev/null
b40826
+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset_chk.S
b40826
@@ -0,0 +1,44 @@
b40826
+/* Multiple versions of __memset_chk
b40826
+   Copyright (C) 2010 Free Software Foundation, Inc.
b40826
+   This file is part of the GNU C Library.
b40826
+
b40826
+   The GNU C Library is free software; you can redistribute it and/or
b40826
+   modify it under the terms of the GNU Lesser General Public
b40826
+   License as published by the Free Software Foundation; either
b40826
+   version 2.1 of the License, or (at your option) any later version.
b40826
+
b40826
+   The GNU C Library is distributed in the hope that it will be useful,
b40826
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
b40826
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
b40826
+   Lesser General Public License for more details.
b40826
+
b40826
+   You should have received a copy of the GNU Lesser General Public
b40826
+   License along with the GNU C Library; if not, write to the Free
b40826
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
b40826
+   02111-1307 USA.  */
b40826
+
b40826
+#include <sysdep.h>
b40826
+#include <init-arch.h>
b40826
+
b40826
+/* Define multiple versions only for the definition in lib.  */
b40826
+#ifndef NOT_IN_libc
b40826
+# ifdef SHARED
b40826
+ENTRY(__memset_chk)
b40826
+	.type	__memset_chk, @gnu_indirect_function
b40826
+	cmpl	$0, __cpu_features+KIND_OFFSET(%rip)
b40826
+	jne	1f
b40826
+	call	__init_cpu_features
b40826
+1:	leaq	__memset_chk_x86_64(%rip), %rax
b40826
+	testl	$bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
b40826
+	jz	2f
b40826
+	leaq	__memset_chk_sse2(%rip), %rax
b40826
+2:	ret
b40826
+END(__memset_chk)
b40826
+
b40826
+strong_alias (__memset_chk, __memset_zero_constant_len_parameter)
b40826
+	.section .gnu.warning.__memset_zero_constant_len_parameter
b40826
+	.string "memset used with constant zero length parameter; this could be due to transposed parameters"
b40826
+# else
b40826
+#  include "../memset_chk.S"
b40826
+# endif
b40826
+#endif