diff --git a/SOURCES/binutils-2.25.1-power9.2.patch b/SOURCES/binutils-2.25.1-power9.2.patch
new file mode 100644
index 0000000..dfc9d17
--- /dev/null
+++ b/SOURCES/binutils-2.25.1-power9.2.patch
@@ -0,0 +1,93 @@
+diff -rup binutils.orig/gas/testsuite/gas/ppc/power9.d binutils-2.25.1/gas/testsuite/gas/ppc/power9.d
+--- binutils.orig/gas/testsuite/gas/ppc/power9.d 2017-09-13 09:58:05.090339261 +0100
++++ binutils-2.25.1/gas/testsuite/gas/ppc/power9.d 2017-09-13 09:59:54.284098233 +0100
+@@ -320,8 +320,9 @@ Disassembly of section \.text:
+ .*: (f1 31 9d 6f|6f 9d 31 f1) xscvdphp vs41,vs51
+ .*: (f1 58 a7 6f|6f a7 58 f1) xvcvhpsp vs42,vs52
+ .*: (f1 79 af 6f|6f af 79 f1) xvcvsphp vs43,vs53
+-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0
+-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0
++.*: (4c 60 00 04|04 00 60 4c) lnia r3
++.*: (4c 60 00 04|04 00 60 4c) lnia r3
++.*: (4c 60 00 04|04 00 60 4c) lnia r3
+ .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1
+ .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1
+ .*: (4c bf ff c4|c4 ff bf 4c) addpcis r5,-2
+@@ -418,4 +419,7 @@ Disassembly of section \.text:
+ .*: (11 6a 60 34|34 60 6a 11) rldixor r10,r11,0,r12
+ .*: (11 6a 66 f4|f4 66 6a 11) rldixor r10,r11,27,r12
+ .*: (11 6a 67 f5|f5 67 6a 11) rldixor r10,r11,63,r12
++.*: (01 00 00 44|44 00 00 01) scv 0
++.*: (e1 0f 00 44|44 00 0f e1) scv 127
++.*: (a4 00 00 4c|4c 00 00 a4) rfscv
+ #pass
+Only in binutils-2.25.1/gas/testsuite/gas/ppc: power9.d.orig
+Only in binutils-2.25.1/gas/testsuite/gas/ppc: power9.d.rej
+diff -rup binutils.orig/gas/testsuite/gas/ppc/power9.s binutils-2.25.1/gas/testsuite/gas/ppc/power9.s
+--- binutils.orig/gas/testsuite/gas/ppc/power9.s 2017-09-13 09:58:05.090339261 +0100
++++ binutils-2.25.1/gas/testsuite/gas/ppc/power9.s 2017-09-13 10:00:14.077873268 +0100
+@@ -311,6 +311,7 @@ power9:
+ xscvdphp 41,51
+ xvcvhpsp 42,52
+ xvcvsphp 43,53
++ lnia 3
+ addpcis 3,0
+ subpcis 3,0
+ addpcis 4,1
+@@ -409,3 +410,6 @@ power9:
+ rldixor 10,11,0,12
+ rldixor 10,11,27,12
+ rldixor 10,11,63,12
++ scv 0
++ scv 127
++ rfscv
+Only in binutils-2.25.1/gas/testsuite/gas/ppc: power9.s.orig
+Only in binutils-2.25.1/gas/testsuite/gas/ppc: power9.s.rej
+diff -rup binutils.orig/opcodes/ppc-opc.c binutils-2.25.1/opcodes/ppc-opc.c
+--- binutils.orig/opcodes/ppc-opc.c 2017-09-13 09:58:05.356336238 +0100
++++ binutils-2.25.1/opcodes/ppc-opc.c 2017-09-13 10:01:15.410176204 +0100
+@@ -440,7 +440,7 @@ const struct powerpc_operand powerpc_ope
+ #define L1 L0 + 1
+ { 0x1, 21, insert_l1, extract_l1, 0 },
+
+- /* The LEV field in a POWER SVC form instruction. */
++ /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
+ #define SVC_LEV L1 + 1
+ { 0x7f, 5, NULL, NULL, 0 },
+
+@@ -2480,6 +2480,9 @@ extract_vleil (unsigned long insn,
+ #define DX(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1))
+ #define DX_MASK DX (0x3f, 0x1f)
+
++/* An DX form instruction with the D bits specified. */
++#define NODX_MASK (DX_MASK | 0x1fffc1)
++
+ /* An EVSEL form instruction. */
+ #define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3)
+ #define EVSEL_MASK EVSEL(0x3f, 0xff)
+@@ -4181,6 +4184,7 @@ const struct powerpc_opcode powerpc_opco
+ {"bcla", B(16,1,1), B_MASK, COM, PPCNONE, {BO, BI, BDA}},
+
+ {"svc", SC(17,0,0), SC_MASK, POWER, PPCNONE, {SVC_LEV, FL1, FL2}},
++{"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}},
+ {"svcl", SC(17,0,1), SC_MASK, POWER, PPCNONE, {SVC_LEV, FL1, FL2}},
+ {"sc", SC(17,1,0), SC_MASK, PPC, PPCNONE, {LEV}},
+ {"svca", SC(17,1,0), SC_MASK, PWRCOM, PPCNONE, {SV}},
+@@ -4193,6 +4197,7 @@ const struct powerpc_opcode powerpc_opco
+
+ {"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCNONE, {BF, BFA}},
+
++{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE, {RT}},
+ {"addpcis", DX(19,2), DX_MASK, POWER9, PPCNONE, {RT, DXD}},
+ {"subpcis", DX(19,2), DX_MASK, POWER9, PPCNONE, {RT, NDXD}},
+
+@@ -4430,6 +4435,7 @@ const struct powerpc_opcode powerpc_opco
+ {"rfi", XL(19,50), 0xffffffff, COM, PPCNONE, {0}},
+ {"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCNONE, {0}},
+
++{"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}},
+ {"rfsvc", XL(19,82), 0xffffffff, POWER, PPCNONE, {0}},
+
+ {"rfgi", XL(19,102), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
+Only in binutils-2.25.1/opcodes: ppc-opc.c.orig
+Only in binutils-2.25.1/opcodes: ppc-opc.c.rej
diff --git a/SOURCES/binutils-2.25.1-ppc64-discarded-plt-sections.patch b/SOURCES/binutils-2.25.1-ppc64-discarded-plt-sections.patch
new file mode 100644
index 0000000..7cbf11a
--- /dev/null
+++ b/SOURCES/binutils-2.25.1-ppc64-discarded-plt-sections.patch
@@ -0,0 +1,79 @@
+diff -rup binutils.orig/bfd/elf64-ppc.c binutils-2.25.1/bfd/elf64-ppc.c
+--- binutils.orig/bfd/elf64-ppc.c 2017-11-20 17:20:06.467683718 +0000
++++ binutils-2.25.1/bfd/elf64-ppc.c 2017-11-20 17:25:21.952792673 +0000
+@@ -10006,6 +10006,10 @@ ppc64_elf_size_dynamic_sections (bfd *ou
+ continue;
+ }
+
++ if (bfd_is_abs_section (s->output_section))
++ _bfd_error_handler (_("warning: discarding dynamic section %s"),
++ s->name);
++
+ if ((s->flags & SEC_HAS_CONTENTS) == 0)
+ continue;
+
+@@ -10771,7 +10775,7 @@ ppc_build_one_stub (struct bfd_hash_entr
+ + htab->brlt->output_section->vma);
+
+ off = (dest
+- - elf_gp (htab->brlt->output_section->owner)
++ - elf_gp (info->output_bfd)
+ - htab->stub_group[stub_entry->id_sec->id].toc_off);
+
+ if (off + 0x80008000 > 0xffffffff || (off & 7) != 0)
+@@ -10925,7 +10929,7 @@ ppc_build_one_stub (struct bfd_hash_entr
+ }
+
+ off = (dest
+- - elf_gp (plt->output_section->owner)
++ - elf_gp (info->output_bfd)
+ - htab->stub_group[stub_entry->id_sec->id].toc_off);
+
+ if (off + 0x80008000 > 0xffffffff || (off & 7) != 0)
+@@ -11056,7 +11060,7 @@ ppc_size_one_stub (struct bfd_hash_entry
+ plt = htab->elf.iplt;
+ off += (plt->output_offset
+ + plt->output_section->vma
+- - elf_gp (plt->output_section->owner)
++ - elf_gp (info->output_bfd)
+ - htab->stub_group[stub_entry->id_sec->id].toc_off);
+
+ size = plt_stub_size (htab, stub_entry, off);
+@@ -11147,7 +11151,7 @@ ppc_size_one_stub (struct bfd_hash_entry
+ off = (br_entry->offset
+ + htab->brlt->output_offset
+ + htab->brlt->output_section->vma
+- - elf_gp (htab->brlt->output_section->owner)
++ - elf_gp (info->output_bfd)
+ - htab->stub_group[stub_entry->id_sec->id].toc_off);
+
+ if (info->emitrelocations)
+@@ -11301,7 +11305,7 @@ ppc64_elf_next_toc_section (struct bfd_l
+ output toc base plus 0x8000. Making the input elf_gp an
+ offset allows us to move the toc as a whole without
+ recalculating input elf_gp. */
+- off = htab->toc_curr - elf_gp (isec->output_section->owner);
++ off = htab->toc_curr - elf_gp (info->output_bfd);
+ off += TOC_BASE_OFF;
+
+ /* Die if someone uses a linker script that doesn't keep input
+@@ -11330,7 +11334,7 @@ ppc64_elf_next_toc_section (struct bfd_l
+ }
+ addr = (htab->toc_first_sec->output_offset
+ + htab->toc_first_sec->output_section->vma);
+- off = addr - elf_gp (isec->output_section->owner) + TOC_BASE_OFF;
++ off = addr - elf_gp (info->output_bfd) + TOC_BASE_OFF;
+ elf_gp (isec->owner) = off;
+
+ return TRUE;
+diff -rup binutils.orig/ld/testsuite/ld-elf/note-3.t binutils-2.25.1/ld/testsuite/ld-elf/note-3.t
+--- binutils.orig/ld/testsuite/ld-elf/note-3.t 2017-11-20 17:20:06.976677257 +0000
++++ binutils-2.25.1/ld/testsuite/ld-elf/note-3.t 2017-11-20 17:25:52.161430854 +0000
+@@ -17,6 +17,7 @@ SECTIONS
+
+ .dynstr : { *(.dynstr) }
+ .dynsym : { *(.dynsym) }
++ .got : { *(.got .toc) *(.igot) }
+ .got.plt : { *(.got.plt) *(.igot.plt) }
+ /DISCARD/ : { *(*) }
+ }
diff --git a/SPECS/binutils.spec b/SPECS/binutils.spec
index fb90790..37a64c1 100644
--- a/SPECS/binutils.spec
+++ b/SPECS/binutils.spec
@@ -22,7 +22,7 @@ Version: 2.25.1
# Note: The Release string *must* be different from that used by any of the
# devtoolset binutils associated with this release. That is why ".base"
# has been appended here. See BZ 1337617 for more details.
-Release: 32.base%{?dist}.1
+Release: 32.base%{?dist}.2
License: GPLv3+
Group: Development/Tools
URL: http://sources.redhat.com/binutils
@@ -84,6 +84,14 @@ Patch30: binutils-2.25.1-ppc-stub-counting.patch
Patch31: binutils-2.25.1-s390-plt.patch
# Revert parts of patch29 that were preventing proper function name lookup.
Patch32: binutils-2.25.1-remove-dwarf2-minmax.patch
+# Add SCV, RFSCV and LNIA instructions for Power9.
+Patch33: binutils-2.25.1-power9.2.patch
+# Purpose: Fix a seg-fault in the PowerPC linker when discarding .plt
+# sections when -pie is used and undefined weak symbols are
+# present. See PR 22431.
+# Lifetime: Fixed in 2.30.
+Patch34: binutils-2.25.1-ppc64-discarded-plt-sections.patch
+
# A *temporary* patch to disable checking for valid PowerPC64 TLBIE
# instructions. This allows the PPC kernel to be built. See:
@@ -242,6 +250,8 @@ touch */configure
%patch30 -p1
%patch31 -p1
%patch32 -p1
+%patch33 -p1
+%patch34 -p1
# TEMPORARY patch - do not propogate to RHEL 8.
%patch999 -p1
@@ -523,6 +533,12 @@ exit 0
%endif # %{isnative}
%changelog
+* Mon Nov 20 2017 Nick Clifton <nickc@redhat.com> 2.25.1-32.base.2
+- Fix a seg-fault in the PowerPC linker when discarding .plt sections when -pie is used and undefined weak symbols are present.
+ (#1515347)
+- Add SCV, RFSCV amd LNIA instructions to Power9 port of gas.
+ (#1449585)
+
* Wed Aug 09 2017 Nick Clifton <nickc@redhat.com> 2.25.1-32.base.1
- Revert part of the objdump speed up patch which was preventing proper function name lookup.
(#1479773)