Blame SOURCES/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch

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diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi gas/doc/c-arc.texi
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*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi	2013-03-04 08:25:32.051931944 +0000
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--- gas/doc/c-arc.texi	2013-03-04 08:26:19.234930452 +0000
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*************** The extension instructions are not macro
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*** 220,226 ****
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  encodings for use of these instructions according to the specification
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  by the user.  The parameters are:
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! @table @bullet
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  @item @var{name}
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  Name of the extension instruction
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--- 220,226 ----
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  encodings for use of these instructions according to the specification
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  by the user.  The parameters are:
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! @table @code
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  @item @var{name}
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  Name of the extension instruction
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diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi gas/doc/c-arm.texi
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*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi	2013-03-04 08:25:32.039931945 +0000
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--- gas/doc/c-arm.texi	2013-03-04 08:27:37.462927978 +0000
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*************** ARM and THUMB instructions had their own
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*** 390,418 ****
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  @code{unified} syntax, which can be selected via the @code{.syntax}
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  directive, and has the following main features:
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! @table @bullet
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! @item
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  Immediate operands do not require a @code{#} prefix.
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! @item
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  The @code{IT} instruction may appear, and if it does it is validated
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  against subsequent conditional affixes.  In ARM mode it does not
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  generate machine code, in THUMB mode it does.
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! @item
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  For ARM instructions the conditional affixes always appear at the end
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  of the instruction.  For THUMB instructions conditional affixes can be
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  used, but only inside the scope of an @code{IT} instruction.
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! @item
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  All of the instructions new to the V6T2 architecture (and later) are
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  available.  (Only a few such instructions can be written in the
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  @code{divided} syntax).
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! @item
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  The @code{.N} and @code{.W} suffixes are recognized and honored.
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! @item
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  All instructions set the flags if and only if they have an @code{s}
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  affix.
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  @end table
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--- 390,418 ----
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  @code{unified} syntax, which can be selected via the @code{.syntax}
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  directive, and has the following main features:
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! @table @code
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! @item 1
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  Immediate operands do not require a @code{#} prefix.
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! @item 2
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  The @code{IT} instruction may appear, and if it does it is validated
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  against subsequent conditional affixes.  In ARM mode it does not
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  generate machine code, in THUMB mode it does.
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! @item 3
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  For ARM instructions the conditional affixes always appear at the end
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  of the instruction.  For THUMB instructions conditional affixes can be
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  used, but only inside the scope of an @code{IT} instruction.
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! @item 4
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  All of the instructions new to the V6T2 architecture (and later) are
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  available.  (Only a few such instructions can be written in the
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  @code{divided} syntax).
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! @item 5
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  The @code{.N} and @code{.W} suffixes are recognized and honored.
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! @item 6
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  All instructions set the flags if and only if they have an @code{s}
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  affix.
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  @end table
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*************** Either @samp{#} or @samp{$} can be used
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*** 451,478 ****
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  @cindex register names, ARM
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  *TODO* Explain about ARM register naming, and the predefined names.
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- @node ARM-Neon-Alignment
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- @subsection NEON Alignment Specifiers
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- 
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- @cindex alignment for NEON instructions
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- Some NEON load/store instructions allow an optional address
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- alignment qualifier.
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- The ARM documentation specifies that this is indicated by
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- @samp{@@ @var{align}}. However GAS already interprets
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- the @samp{@@} character as a "line comment" start,
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- so @samp{: @var{align}} is used instead.  For example:
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- 
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- @smallexample
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-         vld1.8 @{q0@}, [r0, :128]
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- @end smallexample
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- 
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- @node ARM Floating Point
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- @section Floating Point
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- 
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- @cindex floating point, ARM (@sc{ieee})
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- @cindex ARM floating point (@sc{ieee})
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- The ARM family uses @sc{ieee} floating-point numbers.
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- 
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  @node ARM-Relocations
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  @subsection ARM relocation generation
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--- 451,456 ----
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*************** respectively.  For example to load the 3
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*** 519,524 ****
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--- 497,524 ----
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          MOVT r0, #:upper16:foo
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  @end smallexample
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+ @node ARM-Neon-Alignment
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+ @subsection NEON Alignment Specifiers
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+ 
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+ @cindex alignment for NEON instructions
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+ Some NEON load/store instructions allow an optional address
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+ alignment qualifier.
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+ The ARM documentation specifies that this is indicated by
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+ @samp{@@ @var{align}}. However GAS already interprets
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+ the @samp{@@} character as a "line comment" start,
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+ so @samp{: @var{align}} is used instead.  For example:
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+ 
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+ @smallexample
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+         vld1.8 @{q0@}, [r0, :128]
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+ @end smallexample
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+ 
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+ @node ARM Floating Point
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+ @section Floating Point
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+ 
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+ @cindex floating point, ARM (@sc{ieee})
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+ @cindex ARM floating point (@sc{ieee})
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+ The ARM family uses @sc{ieee} floating-point numbers.
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+ 
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  @node ARM Directives
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  @section ARM Machine Directives
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diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi gas/doc/c-cr16.texi
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*** ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi	2013-03-04 08:25:32.086931943 +0000
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--- gas/doc/c-cr16.texi	2013-03-04 08:28:09.304926971 +0000
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*************** Operand expression type qualifier is an
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*** 44,69 ****
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  CR16 target operand qualifiers and its size (in bits):
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  @table @samp
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! @item Immediate Operand
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! - s ---- 4 bits
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! @item
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! - m ---- 16 bits, for movb and movw instructions.
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! @item
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! - m ---- 20 bits, movd instructions.
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! @item
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! - l ---- 32 bits
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! 
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! @item Absolute Operand
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! - s ---- Illegal specifier for this operand.
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! @item
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! - m ---- 20 bits, movd instructions.
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! 
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! @item Displacement Operand
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! - s ---- 8 bits
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! @item
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! - m ---- 16 bits
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! @item
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! - l ---- 24 bits
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  @end table
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  For example:
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--- 44,76 ----
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  CR16 target operand qualifiers and its size (in bits):
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  @table @samp
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! @item Immediate Operand: s
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! 4 bits.
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! 
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! @item Immediate Operand: m
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! 16 bits, for movb and movw instructions.
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! 
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! @item Immediate Operand: m
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! 20 bits, movd instructions.
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! 
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! @item Immediate Operand: l
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! 32 bits.
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! 
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! @item Absolute Operand: s
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! Illegal specifier for this operand.
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! 
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! @item Absolute Operand: m
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! 20 bits, movd instructions.
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! 
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! @item Displacement Operand: s
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! 8 bits.
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! 
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! @item Displacement Operand: m
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! 16 bits.
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! 
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! @item Displacement Operand: l
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! 24 bits.
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! 
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  @end table
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  For example:
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diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi gas/doc/c-tic54x.texi
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*** ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi	2013-03-04 08:25:32.035931945 +0000
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--- gas/doc/c-tic54x.texi	2013-03-04 08:28:38.186926057 +0000
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*************** In this example, x is replaced with SYM2
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*** 109,115 ****
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  is replaced with x.  At this point, x has already been encountered
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  and the substitution stops.
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! @smallexample @code
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   .asg   "x",SYM1
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   .asg   "SYM1",SYM2
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   .asg   "SYM2",x
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--- 109,115 ----
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  is replaced with x.  At this point, x has already been encountered
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  and the substitution stops.
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! @smallexample
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   .asg   "x",SYM1
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   .asg   "SYM1",SYM2
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   .asg   "SYM2",x
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*************** Substitution may be forced in situations
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*** 126,139 ****
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  ambiguous by placing colons on either side of the subsym.  The following
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  code:
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! @smallexample @code
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   .eval  "10",x
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  LAB:X:  add     #x, a
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  @end smallexample
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  When assembled becomes:
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! @smallexample @code
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  LAB10  add     #10, a
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  @end smallexample
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--- 126,139 ----
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  ambiguous by placing colons on either side of the subsym.  The following
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  code:
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! @smallexample
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   .eval  "10",x
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  LAB:X:  add     #x, a
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  @end smallexample
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  When assembled becomes:
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! @smallexample
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  LAB10  add     #10, a
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  @end smallexample
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*************** The @code{LDX} pseudo-op is provided for
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*** 309,315 ****
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  of a label or address.  For example, if an address @code{_label} resides
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  in extended program memory, the value of @code{_label} may be loaded as
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  follows:
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! @smallexample @code
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   ldx     #_label,16,a    ; loads extended bits of _label
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   or      #_label,a       ; loads lower 16 bits of _label
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   bacc    a               ; full address is in accumulator A
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--- 309,315 ----
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  of a label or address.  For example, if an address @code{_label} resides
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  in extended program memory, the value of @code{_label} may be loaded as
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  follows:
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! @smallexample
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   ldx     #_label,16,a    ; loads extended bits of _label
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   or      #_label,a       ; loads lower 16 bits of _label
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   bacc    a               ; full address is in accumulator A