Blame SOURCES/bind97-rh478718.patch

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diff --git a/configure.in b/configure.in
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index 896e81c1ce..73b1c8ccbb 100644
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--- a/configure.in
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+++ b/configure.in
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@@ -4275,6 +4275,10 @@ if test "yes" = "$use_atomic"; then
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 	AC_MSG_RESULT($arch)
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 fi
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+if test ! "$arch" = "x86_64" -a "$have_xaddq" = "yes"; then
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+	AC_MSG_ERROR([XADDQ present but disabled by Fedora patch!])
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+fi
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+
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 if test "yes" = "$have_atomic"; then
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 	AC_MSG_CHECKING([compiler support for inline assembly code])
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diff --git a/lib/isc/include/isc/platform.h.in b/lib/isc/include/isc/platform.h.in
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index 2ff522342f..58df86adb3 100644
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--- a/lib/isc/include/isc/platform.h.in
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+++ b/lib/isc/include/isc/platform.h.in
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@@ -289,19 +289,25 @@
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  * If the "xaddq" operation (64bit xadd) is available on this architecture,
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  * ISC_PLATFORM_HAVEXADDQ will be defined.
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  */
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-@ISC_PLATFORM_HAVEXADDQ@
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 /*
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- * If the 32-bit "atomic swap" operation is available on this
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- * architecture, ISC_PLATFORM_HAVEATOMICSTORE" will be defined.
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+ * If the 64-bit "atomic swap" operation is available on this
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+ * architecture, ISC_PLATFORM_HAVEATOMICSTOREQ" will be defined.
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  */
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-@ISC_PLATFORM_HAVEATOMICSTORE@
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+
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+#ifdef __x86_64__
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+#define ISC_PLATFORM_HAVEXADDQ 1
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+#define ISC_PLATFORM_HAVEATOMICSTOREQ 1
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+#else
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+#undef ISC_PLATFORM_HAVEXADDQ
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+#undef ISC_PLATFORM_HAVEATOMICSTOREQ
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+#endif
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 /*
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- * If the 64-bit "atomic swap" operation is available on this
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+ * If the 32-bit "atomic swap" operation is available on this
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  * architecture, ISC_PLATFORM_HAVEATOMICSTORE" will be defined.
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  */
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-@ISC_PLATFORM_HAVEATOMICSTOREQ@
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+@ISC_PLATFORM_HAVEATOMICSTORE@
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 /*
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  * If the "compare-and-exchange" operation is available on this architecture,