zhang / rpms / kernel

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From 9e2ef73d9d72ab312bef34ba318fdcb77facb1f0 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 27 Aug 2018 09:47:42 +0200
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Subject: [PATCH 1/7] pwm: lpss: Add ACPI HID for second PWM controller on
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 Cherry Trail devices
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The second PWM controller on Cherry Trail devices uses a separate ACPI
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HID: "80862289", add this so that the driver will properly bind to the
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second PWM controller.
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The second PWM controller is usually not used, the main thing gained by
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this is properly putting the PWM controller in D3 on suspend.
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Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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 drivers/pwm/pwm-lpss-platform.c | 1 +
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 1 file changed, 1 insertion(+)
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diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c
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index 5561b9e190f8..7304f36ee715 100644
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--- a/drivers/pwm/pwm-lpss-platform.c
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+++ b/drivers/pwm/pwm-lpss-platform.c
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@@ -81,6 +81,7 @@ static SIMPLE_DEV_PM_OPS(pwm_lpss_platform_pm_ops,
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 static const struct acpi_device_id pwm_lpss_acpi_match[] = {
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 	{ "80860F09", (unsigned long)&pwm_lpss_byt_info },
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 	{ "80862288", (unsigned long)&pwm_lpss_bsw_info },
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+	{ "80862289", (unsigned long)&pwm_lpss_bsw_info },
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 	{ "80865AC8", (unsigned long)&pwm_lpss_bxt_info },
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 	{ },
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 };
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-- 
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2.19.1
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From f215ee5bd62ab40ee34c318df1af61991dead98d Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Tue, 11 Sep 2018 16:07:41 +0200
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Subject: [PATCH 2/7] pwm: lpss: Move struct pwm_lpss_chip definition to the
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 header file
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Move struct pwm_lpss_chip definition from pwm-lpss.c to pwm-lpss.h,
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so that the pci/platform drivers can access the info member
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(struct pwm_lpss_boardinfo *).
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This is a preparation patch for adding platform specific quirks, which
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the drivers need access to, to pwm_lpss_boardinfo.
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Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v4:
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-No changes in v4 of this patch-set
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Changes in v3:
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-There was no v3, but I accidentally put v3 in the Subject of the v2
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 patches, so lets skip v3
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Changes in v2:
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-No changes in v2 of this patch-set
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---
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 drivers/pwm/pwm-lpss.c | 9 ---------
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 drivers/pwm/pwm-lpss.h | 9 ++++++++-
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 2 files changed, 8 insertions(+), 10 deletions(-)
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diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
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index 4721a264bac2..e602835fd6de 100644
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--- a/drivers/pwm/pwm-lpss.c
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+++ b/drivers/pwm/pwm-lpss.c
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@@ -32,15 +32,6 @@
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 /* Size of each PWM register space if multiple */
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 #define PWM_SIZE			0x400
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-#define MAX_PWMS			4
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-
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-struct pwm_lpss_chip {
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-	struct pwm_chip chip;
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-	void __iomem *regs;
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-	const struct pwm_lpss_boardinfo *info;
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-	u32 saved_ctrl[MAX_PWMS];
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-};
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-
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 static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
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 {
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 	return container_of(chip, struct pwm_lpss_chip, chip);
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diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h
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index 7a4238ad1fcb..8f029ed263af 100644
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--- a/drivers/pwm/pwm-lpss.h
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+++ b/drivers/pwm/pwm-lpss.h
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@@ -16,7 +16,14 @@
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 #include <linux/device.h>
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 #include <linux/pwm.h>
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-struct pwm_lpss_chip;
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+#define MAX_PWMS			4
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+
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+struct pwm_lpss_chip {
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+	struct pwm_chip chip;
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+	void __iomem *regs;
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+	const struct pwm_lpss_boardinfo *info;
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+	u32 saved_ctrl[MAX_PWMS];
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+};
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 struct pwm_lpss_boardinfo {
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 	unsigned long clk_rate;
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-- 
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2.19.1
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From eb73756876f92ad0da4259400bce50881cb332b7 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 10 Sep 2018 15:30:58 +0200
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Subject: [PATCH 3/7] pwm: lpss: Check PWM powerstate after resume on Cherry
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 Trail devices
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The _PS0 method for the integrated graphics on some Cherry Trail devices
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(observed on a HP Pavilion X2 10-p0XX) turns on the PWM chip (puts it in
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D0), causing an inconsistency between the state the pm-core thinks it is
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in (left runtime suspended as it was before the suspend/resume) and the
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state it actually is in.
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Interestingly enough this is done on a device where the pwm controller is
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not used for the backlight at all, since it uses an eDP panel. On devices
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where the PWM is used this is not a problem since we will resume it
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ourselves anyways.
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This inconsistency causes us to never suspend the pwm controller again,
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which causes the device to not be able to reach S0ix states when suspended.
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This commit adds a resume-complete handler, which when we think the device
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is still run-time suspended checks the actual power-state and if necessary
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updates the rpm-core's internal state.
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This fixes the Pavilion X2 10-p0XX not reaching S0ix states when suspended.
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Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v4:
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-Use acpi_device_get_power() instead of manually calling _PSC
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Changes in v3:
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-There was no v3, but I accidentally put v3 in the Subject of the v2
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 patches, so lets skip v3
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Changes in v2:
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-Do the pm_runtime_en/disable before/after checking the power-state
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---
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 drivers/pwm/pwm-lpss-platform.c | 25 ++++++++++++++++++++++---
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 drivers/pwm/pwm-lpss.h          |  2 ++
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 2 files changed, 24 insertions(+), 3 deletions(-)
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diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c
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index 7304f36ee715..b6edf8af26cc 100644
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--- a/drivers/pwm/pwm-lpss-platform.c
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+++ b/drivers/pwm/pwm-lpss-platform.c
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@@ -30,6 +30,7 @@ static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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 	.clk_rate = 19200000,
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 	.npwm = 1,
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 	.base_unit_bits = 16,
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+	.check_power_on_resume = true,
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 };
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 /* Broxton */
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@@ -74,9 +75,27 @@ static int pwm_lpss_remove_platform(struct platform_device *pdev)
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 	return pwm_lpss_remove(lpwm);
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 }
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-static SIMPLE_DEV_PM_OPS(pwm_lpss_platform_pm_ops,
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-			 pwm_lpss_suspend,
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-			 pwm_lpss_resume);
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+static void pwm_lpss_complete(struct device *dev)
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+{
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+	struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
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+	int ret, state;
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+
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+	/* The PWM may be turned on by AML code, update our state to match */
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+	if (pm_runtime_suspended(dev) && lpwm->info->check_power_on_resume) {
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+		pm_runtime_disable(dev);
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+
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+		ret = acpi_device_get_power(ACPI_COMPANION(dev), &state);
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+		if (ret == 0 && state == ACPI_STATE_D0)
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+			pm_runtime_set_active(dev);
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+
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+		pm_runtime_enable(dev);
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+	}
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+}
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+
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+static const struct dev_pm_ops pwm_lpss_platform_pm_ops = {
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+	.complete = pwm_lpss_complete,
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+	SET_SYSTEM_SLEEP_PM_OPS(pwm_lpss_suspend, pwm_lpss_resume)
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+};
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 static const struct acpi_device_id pwm_lpss_acpi_match[] = {
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 	{ "80860F09", (unsigned long)&pwm_lpss_byt_info },
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diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h
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index 8f029ed263af..1a2575d25bea 100644
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--- a/drivers/pwm/pwm-lpss.h
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+++ b/drivers/pwm/pwm-lpss.h
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@@ -30,6 +30,8 @@ struct pwm_lpss_boardinfo {
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 	unsigned int npwm;
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 	unsigned long base_unit_bits;
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 	bool bypass;
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+	/* Some devices have AML code messing with the state underneath us */
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+	bool check_power_on_resume;
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 };
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 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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-- 
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2.19.1
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From 0a2e85765305e9fc376d0153aa9747b5d58cc804 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 24 Sep 2018 20:57:43 +0200
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Subject: [PATCH 4/7] pwm: lpss: Release runtime-pm reference from the driver's
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 remove callback
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For each pwm output which gets enabled through pwm_lpss_apply(), we do a
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pm_runtime_get_sync().
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This commit adds pm_runtime_put() calls to pwm_lpss_remove() to balance
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these when the driver gets removed with some of the outputs still enabled.
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Fixes: f080be27d7d9 ("pwm: lpss: Add support for runtime PM")
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Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v2:
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-New patch in v2 of this patch-set replacing "pwm: lpss: Add
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 pwm_lpss_get_put_runtime_pm helper function"
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---
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 drivers/pwm/pwm-lpss.c | 6 ++++++
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 1 file changed, 6 insertions(+)
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diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
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index e602835fd6de..723ca9de8325 100644
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--- a/drivers/pwm/pwm-lpss.c
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+++ b/drivers/pwm/pwm-lpss.c
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@@ -205,6 +205,12 @@ EXPORT_SYMBOL_GPL(pwm_lpss_probe);
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 int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
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 {
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+	int i;
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+
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+	for (i = 0; i < lpwm->info->npwm; i++) {
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+		if (pwm_is_enabled(&lpwm->chip.pwms[i]))
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+			pm_runtime_put(lpwm->chip.dev);
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+	}
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 	return pwmchip_remove(&lpwm->chip);
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 }
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 EXPORT_SYMBOL_GPL(pwm_lpss_remove);
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-- 
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2.19.1
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From c3ffc28eeb4f9974380c4a85abfbb387d6d1cd8d Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Fri, 25 Nov 2016 09:45:19 +0100
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Subject: [PATCH 5/7] pwm: lpss: Add get_state callback
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Add a get_state callback so that the initial state correctly reflects
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the actual hardware state.
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Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Acked-by: Jani Nikula <jani.nikula@intel.com>
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Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v2:
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-Stop using the dropped pwm_lpss_get_put_runtime_pm() helper
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---
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 drivers/pwm/pwm-lpss.c | 34 ++++++++++++++++++++++++++++++++++
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 1 file changed, 34 insertions(+)
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diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
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index 723ca9de8325..ea93ef9f3672 100644
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--- a/drivers/pwm/pwm-lpss.c
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+++ b/drivers/pwm/pwm-lpss.c
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@@ -159,8 +159,42 @@ static int pwm_lpss_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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 	return 0;
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 }
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+/* This function gets called once from pwmchip_add to get the initial state */
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+static void pwm_lpss_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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+			       struct pwm_state *state)
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+{
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+	struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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+	unsigned long base_unit_range;
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+	unsigned long long base_unit, freq, on_time_div;
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+	u32 ctrl;
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+
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+	base_unit_range = BIT(lpwm->info->base_unit_bits);
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+
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+	ctrl = pwm_lpss_read(pwm);
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+	on_time_div = 255 - (ctrl & PWM_ON_TIME_DIV_MASK);
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+	base_unit = (ctrl >> PWM_BASE_UNIT_SHIFT) & (base_unit_range - 1);
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+
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+	freq = base_unit * lpwm->info->clk_rate;
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+	do_div(freq, base_unit_range);
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+	if (freq == 0)
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+		state->period = NSEC_PER_SEC;
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+	else
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+		state->period = NSEC_PER_SEC / (unsigned long)freq;
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+
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+	on_time_div *= state->period;
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+	do_div(on_time_div, 255);
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+	state->duty_cycle = on_time_div;
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+
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+	state->polarity = PWM_POLARITY_NORMAL;
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+	state->enabled = !!(ctrl & PWM_ENABLE);
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+
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+	if (state->enabled)
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+		pm_runtime_get(chip->dev);
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+}
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+
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 static const struct pwm_ops pwm_lpss_ops = {
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 	.apply = pwm_lpss_apply,
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+	.get_state = pwm_lpss_get_state,
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 	.owner = THIS_MODULE,
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 };
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-- 
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2.19.1
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From e96509f196d1229cf66b19ad9f3d7cd43a86bc9d Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Sat, 13 Oct 2018 00:04:12 +0200
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Subject: [PATCH 6/7] pwm: lpss: Force runtime-resume on suspend on Cherry
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 Trail
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On Cherry Trail devices under Windows the PWM controller used for the
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backlight is considered part of the GPU even though it is part of the LPSS
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block and thus is an entirely different independent hardware unit.
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Because of this on Cherry Trail the GPU's (GFX0 ACPI node) _PS3 and _PS0
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methods save and restore the PWM controller registers.
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If userspace blanks the screen before suspending, such as e.g. GNOME
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does, then the PWM controller will be runtime-suspended when the suspend
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starts. This causes the GFX0 _PS? methods to save a value of 0xffffffff
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for the PWM control register and to restore this value on resume.
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0xffffffff is not a valid value for the register and writing this causes
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problems such as e.g. a flickering backlight.
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This commit adds a prepare method to the dev_pm_ops and makes it return 0
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on Cherry Trail devices forcing a runtime-resume before other device's
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suspend methods run. This fixes the reading and writing back of 0xffffffff.
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Since we now always runtime-resume the device on suspend, it will be
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resumed on resume too and we no longer need to check for the GFX0 _PS0
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method having resumed it underneath us, so this commit removes the now no
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longer necessary complete dev_pm_op.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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 drivers/pwm/pwm-lpss-platform.c | 24 +++++++++++-------------
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 drivers/pwm/pwm-lpss.h          |  7 +++++--
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 2 files changed, 16 insertions(+), 15 deletions(-)
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diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c
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index b6edf8af26cc..757230e1f575 100644
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--- a/drivers/pwm/pwm-lpss-platform.c
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+++ b/drivers/pwm/pwm-lpss-platform.c
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@@ -30,7 +30,7 @@ static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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 	.clk_rate = 19200000,
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 	.npwm = 1,
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 	.base_unit_bits = 16,
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-	.check_power_on_resume = true,
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+	.other_devices_aml_touches_pwm_regs = true,
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 };
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 /* Broxton */
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@@ -61,6 +61,7 @@ static int pwm_lpss_probe_platform(struct platform_device *pdev)
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 	platform_set_drvdata(pdev, lpwm);
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+	dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
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 	pm_runtime_set_active(&pdev->dev);
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 	pm_runtime_enable(&pdev->dev);
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@@ -75,25 +76,22 @@ static int pwm_lpss_remove_platform(struct platform_device *pdev)
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 	return pwm_lpss_remove(lpwm);
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 }
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-static void pwm_lpss_complete(struct device *dev)
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+static int pwm_lpss_prepare(struct device *dev)
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 {
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 	struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
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-	int ret, state;
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-	/* The PWM may be turned on by AML code, update our state to match */
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-	if (pm_runtime_suspended(dev) && lpwm->info->check_power_on_resume) {
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-		pm_runtime_disable(dev);
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+	/*
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+	 * If other device's AML code touches the PWM regs on suspend/resume
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+	 * force runtime-resume the PWM controller to allow this.
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+	 */
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+	if (lpwm->info->other_devices_aml_touches_pwm_regs)
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+		return 0; /* Force runtime-resume */
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-		ret = acpi_device_get_power(ACPI_COMPANION(dev), &state);
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-		if (ret == 0 && state == ACPI_STATE_D0)
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-			pm_runtime_set_active(dev);
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-
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-		pm_runtime_enable(dev);
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-	}
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+	return 1; /* If runtime-suspended leave as is */
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 }
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 static const struct dev_pm_ops pwm_lpss_platform_pm_ops = {
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-	.complete = pwm_lpss_complete,
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+	.prepare = pwm_lpss_prepare,
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 	SET_SYSTEM_SLEEP_PM_OPS(pwm_lpss_suspend, pwm_lpss_resume)
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 };
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diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h
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index 1a2575d25bea..3236be835bd9 100644
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--- a/drivers/pwm/pwm-lpss.h
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+++ b/drivers/pwm/pwm-lpss.h
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@@ -30,8 +30,11 @@ struct pwm_lpss_boardinfo {
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 	unsigned int npwm;
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 	unsigned long base_unit_bits;
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 	bool bypass;
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-	/* Some devices have AML code messing with the state underneath us */
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-	bool check_power_on_resume;
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+	/*
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+	 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
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+	 * messes with the PWM0 controllers state,
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+	 */
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+	bool other_devices_aml_touches_pwm_regs;
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 };
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 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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-- 
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2.19.1
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From f249418a3a4f123a37c389378f289a7baea95332 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Fri, 12 Oct 2018 21:39:53 +0200
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Subject: [PATCH 7/7] pwm: lpss: Only set update bit if we are actually
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 changing the settings
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According to the datasheet the update bit must be set if the on-time-div
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or the base-unit changes.
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Now that we properly order device resume on Cherry Trail so that the GFX0
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_PS0 method no longer exits with an error, we end up with a sequence of
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events where we are writing the same values twice in a row.
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First the _PS0 method restores the duty cycle of 0% the GPU driver set
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on suspend and then the GPU driver first updates just the enabled bit in
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the pwm_state from 0 to 1, causing us to write the same values again,
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before restoring the pre-suspend duty-cycle in a separate pwm_apply call.
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When writing the update bit the second time, without changing any of
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the values the update bit clears immediately / instantly, instead of
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staying 1 for a while as usual. After this the next setting of the update
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bit seems to be ignored, causing the restoring of the pre-suspend
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duty-cycle to not get applied. This makes the backlight come up with
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a 0% dutycycle after suspend/resume.
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Any further brightness changes after this do work.
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This commit moves the setting of the update bit into pwm_lpss_prepare()
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and only sets the bit if we have actually changed any of the values.
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This avoids the setting of the update bit the second time we configure
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the PWM to 0% dutycycle, this fixes the backlight coming up with 0%
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duty-cycle after a suspend/resume.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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 drivers/pwm/pwm-lpss.c | 12 +++++++-----
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 1 file changed, 7 insertions(+), 5 deletions(-)
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diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
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index ea93ef9f3672..2ac3a2aa9e53 100644
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--- a/drivers/pwm/pwm-lpss.c
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+++ b/drivers/pwm/pwm-lpss.c
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@@ -88,7 +88,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
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 	unsigned long long on_time_div;
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 	unsigned long c = lpwm->info->clk_rate, base_unit_range;
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 	unsigned long long base_unit, freq = NSEC_PER_SEC;
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-	u32 ctrl;
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+	u32 orig_ctrl, ctrl;
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 	do_div(freq, period_ns);
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@@ -105,13 +105,17 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
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 	do_div(on_time_div, period_ns);
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 	on_time_div = 255ULL - on_time_div;
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-	ctrl = pwm_lpss_read(pwm);
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+	orig_ctrl = ctrl = pwm_lpss_read(pwm);
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 	ctrl &= ~PWM_ON_TIME_DIV_MASK;
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 	ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
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 	base_unit &= base_unit_range;
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 	ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
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 	ctrl |= on_time_div;
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-	pwm_lpss_write(pwm, ctrl);
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+
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+	if (orig_ctrl != ctrl) {
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+		pwm_lpss_write(pwm, ctrl);
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+		pwm_lpss_write(pwm, ctrl | PWM_SW_UPDATE);
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+	}
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 }
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 static inline void pwm_lpss_cond_enable(struct pwm_device *pwm, bool cond)
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@@ -135,7 +139,6 @@ static int pwm_lpss_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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 				return ret;
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 			}
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 			pwm_lpss_prepare(lpwm, pwm, state->duty_cycle, state->period);
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-			pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_SW_UPDATE);
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 			pwm_lpss_cond_enable(pwm, lpwm->info->bypass == false);
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 			ret = pwm_lpss_wait_for_update(pwm);
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 			if (ret) {
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@@ -148,7 +151,6 @@ static int pwm_lpss_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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 			if (ret)
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 				return ret;
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 			pwm_lpss_prepare(lpwm, pwm, state->duty_cycle, state->period);
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-			pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_SW_UPDATE);
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 			return pwm_lpss_wait_for_update(pwm);
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 		}
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 	} else if (pwm_is_enabled(pwm)) {
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-- 
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2.19.1
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