yeahuh / rpms / qemu-kvm

Forked from rpms/qemu-kvm 2 years ago
Clone
c461a1
From e2f14f95ccb04db5f470d3593e2a2f2dc69187d8 Mon Sep 17 00:00:00 2001
c461a1
From: "plai@redhat.com" <plai@redhat.com>
c461a1
Date: Mon, 23 Sep 2019 20:40:23 +0200
c461a1
Subject: [PATCH 07/12] x86: Data structure changes to support MSR based
2ec96d
 features
2ec96d
c461a1
RH-Author: plai@redhat.com
c461a1
Message-id: <1569271227-28026-7-git-send-email-plai@redhat.com>
c461a1
Patchwork-id: 90863
c461a1
O-Subject: [RHEL7.8 qemu-kvm PATCH v6 06/10] x86: Data structure changes to support MSR based features
c461a1
Bugzilla: 1709971
c461a1
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
2ec96d
RH-Acked-by: Bandan Das <bsd@redhat.com>
c461a1
RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
2ec96d
2ec96d
From: Robert Hoo <robert.hu@linux.intel.com>
2ec96d
2ec96d
Add FeatureWordType indicator in struct FeatureWordInfo.
2ec96d
Change feature_word_info[] accordingly.
2ec96d
Change existing functions that refer to feature_word_info[] accordingly.
2ec96d
2ec96d
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
2ec96d
Message-Id: <1539578845-37944-3-git-send-email-robert.hu@linux.intel.com>
2ec96d
[ehabkost: fixed hvf_enabled() case]
2ec96d
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
c461a1
2ec96d
(cherry picked from commit 07585923485952bf4cb7da563c9f91fecc85d09c)
2ec96d
Signed-off-by: Paul Lai <plai@redhat.com>
c461a1
c461a1
Resolved Conflicts:
c461a1
	target/i386/cpu.c changes to target-i386/cpu.c
c461a1
c461a1
	x86_cpu_get_supported_feature_word() updated @ 07585923485
c461a1
	   dropped hvf_enabled(), tcg_enabled(), and migratable_only checks
2ec96d
2ec96d
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
2ec96d
---
c461a1
 target-i386/cpu.c | 163 +++++++++++++++++++++++++++++++++++++++---------------
c461a1
 1 file changed, 119 insertions(+), 44 deletions(-)
2ec96d
2ec96d
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
c461a1
index 838c616..488634c 100644
2ec96d
--- a/target-i386/cpu.c
2ec96d
+++ b/target-i386/cpu.c
c461a1
@@ -272,89 +272,125 @@ static const char *cpuid_apm_edx_feature_name[] = {
c461a1
 #define TCG_APM_FEATURES 0
2ec96d
 
2ec96d
 
2ec96d
+typedef enum FeatureWordType {
2ec96d
+    CPUID_FEATURE_WORD,
2ec96d
+    MSR_FEATURE_WORD,
2ec96d
+} FeatureWordType;
2ec96d
+
2ec96d
 typedef struct FeatureWordInfo {
2ec96d
+    FeatureWordType type;
2ec96d
     const char **feat_names;
2ec96d
-    uint32_t cpuid_eax;   /* Input EAX for CPUID */
2ec96d
-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
2ec96d
-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */
2ec96d
-    int cpuid_reg;        /* output register (R_* constant) */
2ec96d
+    union {
2ec96d
+        /* If type==CPUID_FEATURE_WORD */
2ec96d
+        struct {
2ec96d
+            uint32_t eax;   /* Input EAX for CPUID */
2ec96d
+            bool needs_ecx; /* CPUID instruction uses ECX as input */
2ec96d
+            uint32_t ecx;   /* Input ECX value for CPUID */
2ec96d
+            int reg;        /* output register (R_* constant) */
2ec96d
+        } cpuid;
2ec96d
+        /* If type==MSR_FEATURE_WORD */
2ec96d
+        struct {
2ec96d
+            uint32_t index;
2ec96d
+            struct {   /*CPUID that enumerate this MSR*/
2ec96d
+                FeatureWord cpuid_class;
2ec96d
+                uint32_t    cpuid_flag;
2ec96d
+            } cpuid_dep;
2ec96d
+        } msr;
2ec96d
+    };
2ec96d
     uint32_t tcg_features; /* Feature flags supported by TCG */
2ec96d
 } FeatureWordInfo;
2ec96d
 
2ec96d
 static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
2ec96d
     [FEAT_1_EDX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = feature_name,
2ec96d
-        .cpuid_eax = 1, .cpuid_reg = R_EDX,
2ec96d
+        .cpuid = {.eax = 1, .reg = R_EDX, },
2ec96d
         .tcg_features = TCG_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_1_ECX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = ext_feature_name,
2ec96d
-        .cpuid_eax = 1, .cpuid_reg = R_ECX,
2ec96d
+        .cpuid = { .eax = 1, .reg = R_ECX, },
2ec96d
         .tcg_features = TCG_EXT_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_8000_0001_EDX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = ext2_feature_name,
2ec96d
-        .cpuid_eax = 0x80000001, .cpuid_reg = R_EDX,
2ec96d
+        .cpuid = { .eax = 0x80000001, .reg = R_EDX, },
2ec96d
         .tcg_features = TCG_EXT2_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_8000_0001_ECX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = ext3_feature_name,
2ec96d
-        .cpuid_eax = 0x80000001, .cpuid_reg = R_ECX,
2ec96d
+        .cpuid = { .eax = 0x80000001, .reg = R_ECX, },
2ec96d
         .tcg_features = TCG_EXT3_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_C000_0001_EDX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = ext4_feature_name,
2ec96d
-        .cpuid_eax = 0xC0000001, .cpuid_reg = R_EDX,
2ec96d
+        .cpuid = { .eax = 0x80000001, .reg = R_EDX, },
2ec96d
         .tcg_features = TCG_EXT4_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_KVM] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = kvm_feature_name,
2ec96d
-        .cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EAX,
2ec96d
+        .cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EAX, },
2ec96d
         .tcg_features = TCG_KVM_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_SVM] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = svm_feature_name,
2ec96d
-        .cpuid_eax = 0x8000000A, .cpuid_reg = R_EDX,
2ec96d
+        .cpuid = { .eax = 0x8000000A, .reg = R_EDX, },
2ec96d
         .tcg_features = TCG_SVM_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_7_0_EBX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = cpuid_7_0_ebx_feature_name,
2ec96d
-        .cpuid_eax = 7,
2ec96d
-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
2ec96d
-        .cpuid_reg = R_EBX,
2ec96d
+        .cpuid = {
2ec96d
+            .eax = 7,
2ec96d
+            .needs_ecx = true, .ecx = 0,
2ec96d
+            .reg = R_EBX,
2ec96d
+        },
2ec96d
         .tcg_features = TCG_7_0_EBX_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_7_0_ECX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = cpuid_7_0_ecx_feature_name,
2ec96d
-        .cpuid_eax = 7,
2ec96d
-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
2ec96d
-        .cpuid_reg = R_ECX,
2ec96d
+        .cpuid = {
2ec96d
+            .eax = 7,
2ec96d
+            .needs_ecx = true, .ecx = 0,
2ec96d
+            .reg = R_ECX,
2ec96d
+        },
2ec96d
         .tcg_features = TCG_7_0_ECX_FEATURES,
2ec96d
     },
2ec96d
     [FEAT_7_0_EDX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = cpuid_7_0_edx_feature_name,
2ec96d
-        .cpuid_eax = 7,
2ec96d
-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
2ec96d
-        .cpuid_reg = R_EDX,
2ec96d
+        .cpuid = {
2ec96d
+            .eax = 7,
2ec96d
+            .needs_ecx = true, .ecx = 0,
2ec96d
+            .reg = R_EDX,
2ec96d
+        },
2ec96d
         .tcg_features = TCG_7_0_EDX_FEATURES,
2ec96d
     },
c461a1
     [FEAT_8000_0007_EDX] = {
c461a1
         .feat_names = cpuid_apm_edx_feature_name,
c461a1
-        .cpuid_eax = 0x80000007,
c461a1
-        .cpuid_reg = R_EDX,
c461a1
+        .cpuid = { .eax = 0x80000007, .reg = R_EDX, },
c461a1
         .tcg_features = TCG_APM_FEATURES,
c461a1
     },
2ec96d
     [FEAT_8000_0008_EBX] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = cpuid_80000008_ebx_feature_name,
2ec96d
-        .cpuid_eax = 0x80000008,
2ec96d
-        .cpuid_needs_ecx = false, .cpuid_ecx = 0,
2ec96d
-        .cpuid_reg = R_EBX,
2ec96d
+        .cpuid = { .eax = 0x80000008, .reg = R_EBX, },
2ec96d
     },
2ec96d
     [FEAT_XSAVE] = {
2ec96d
+        .type = CPUID_FEATURE_WORD,
2ec96d
         .feat_names = cpuid_xsave_feature_name,
2ec96d
-        .cpuid_eax = 0xd,
2ec96d
-        .cpuid_needs_ecx = true, .cpuid_ecx = 1,
2ec96d
-        .cpuid_reg = R_EAX,
2ec96d
+        .cpuid = {
2ec96d
+            .eax = 0xd,
2ec96d
+            .needs_ecx = true, .ecx = 1,
2ec96d
+            .reg = R_EAX,
2ec96d
+        },
2ec96d
     },
2ec96d
 };
2ec96d
 
c461a1
@@ -384,6 +420,8 @@ typedef struct ExtSaveArea {
2ec96d
     uint32_t offset, size;
2ec96d
 } ExtSaveArea;
2ec96d
 
2ec96d
+static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w);
2ec96d
+
2ec96d
 static const ExtSaveArea ext_save_areas[] = {
2ec96d
     [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
2ec96d
             .offset = 0x240, .size = 0x100 },
c461a1
@@ -1755,10 +1793,7 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
2ec96d
 
2ec96d
     FeatureWord w;
2ec96d
     for (w = 0; w < FEATURE_WORDS; w++) {
2ec96d
-        FeatureWordInfo *wi = &feature_word_info[w];
2ec96d
-        x86_cpu_def->features[w] =
2ec96d
-            kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx,
2ec96d
-                                         wi->cpuid_reg);
2ec96d
+        x86_cpu_def->features[w] = x86_cpu_get_supported_feature_word(w);
2ec96d
     }
2ec96d
 
2ec96d
     /*
c461a1
@@ -1774,19 +1809,40 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
2ec96d
 #endif /* CONFIG_KVM */
2ec96d
 }
2ec96d
 
2ec96d
+static char *feature_word_description(FeatureWordInfo *f, uint32_t bit)
2ec96d
+{
2ec96d
+    assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD);
2ec96d
+
2ec96d
+    switch (f->type) {
2ec96d
+    case CPUID_FEATURE_WORD:
2ec96d
+        {
2ec96d
+            const char *reg = get_register_name_32(f->cpuid.reg);
2ec96d
+            assert(reg);
2ec96d
+            return g_strdup_printf("CPUID.%02XH:%s",
2ec96d
+                                   f->cpuid.eax, reg);
2ec96d
+        }
2ec96d
+    case MSR_FEATURE_WORD:
2ec96d
+        return g_strdup_printf("MSR(%02XH)",
2ec96d
+                               f->msr.index);
2ec96d
+    }
2ec96d
+
2ec96d
+    return NULL;
2ec96d
+}
2ec96d
+
2ec96d
 static void report_unavailable_features(FeatureWordInfo *f, uint32_t mask)
2ec96d
 {
2ec96d
     int i;
2ec96d
+    char *feat_word_str;
2ec96d
 
2ec96d
     for (i = 0; i < 32; ++i) {
2ec96d
         if (1 << i & mask) {
2ec96d
-            const char *reg = get_register_name_32(f->cpuid_reg);
2ec96d
-            assert(reg);
2ec96d
+            feat_word_str = feature_word_description(f, i);
2ec96d
             fprintf(stderr, "warning: host doesn't support requested feature: "
2ec96d
-                "CPUID.%02XH:%s%s%s [bit %d]\n",
2ec96d
-                f->cpuid_eax, reg,
2ec96d
+                "%s%s%s [bit %d]\n",
2ec96d
+                feat_word_str,
2ec96d
                 f->feat_names[i] ? "." : "",
2ec96d
                 f->feat_names[i] ? f->feat_names[i] : "", i);
2ec96d
+            g_free(feat_word_str);
2ec96d
         }
2ec96d
     }
2ec96d
 }
c461a1
@@ -2095,11 +2151,18 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v, void *opaque,
2ec96d
 
2ec96d
     for (w = 0; w < FEATURE_WORDS; w++) {
2ec96d
         FeatureWordInfo *wi = &feature_word_info[w];
2ec96d
+        /*
2ec96d
+                * We didn't have MSR features when "feature-words" was
2ec96d
+                *  introduced. Therefore skipped other type entries.
2ec96d
+                */
2ec96d
+        if (wi->type != CPUID_FEATURE_WORD) {
2ec96d
+            continue;
2ec96d
+        }
2ec96d
         X86CPUFeatureWordInfo *qwi = &word_infos[w];
2ec96d
-        qwi->cpuid_input_eax = wi->cpuid_eax;
2ec96d
-        qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
2ec96d
-        qwi->cpuid_input_ecx = wi->cpuid_ecx;
2ec96d
-        qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
2ec96d
+        qwi->cpuid_input_eax = wi->cpuid.eax;
2ec96d
+        qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
2ec96d
+        qwi->cpuid_input_ecx = wi->cpuid.ecx;
2ec96d
+        qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;
2ec96d
         qwi->features = array[w];
2ec96d
 
2ec96d
         /* List will be in reverse order, but order shouldn't matter */
c461a1
@@ -2390,11 +2453,23 @@ CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)
2ec96d
 static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w)
2ec96d
 {
2ec96d
     FeatureWordInfo *wi = &feature_word_info[w];
2ec96d
+    uint32_t r = 0;
2ec96d
 
2ec96d
-    assert(kvm_enabled());
2ec96d
-    return kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,
2ec96d
-                                                   wi->cpuid_ecx,
2ec96d
-                                                   wi->cpuid_reg);
2ec96d
+    if (kvm_enabled()) {
2ec96d
+        switch (wi->type) {
2ec96d
+        case CPUID_FEATURE_WORD:
2ec96d
+            r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid.eax,
2ec96d
+                                                        wi->cpuid.ecx,
2ec96d
+                                                        wi->cpuid.reg);
2ec96d
+            break;
2ec96d
+        case MSR_FEATURE_WORD:
2ec96d
+            r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);
2ec96d
+            break;
2ec96d
+        }
2ec96d
+    } else {
2ec96d
+        return ~0;
2ec96d
+    }
2ec96d
+    return r;
2ec96d
 }
2ec96d
 
2ec96d
 /*
2ec96d
-- 
2ec96d
1.8.3.1
2ec96d