yeahuh / rpms / qemu-kvm

Forked from rpms/qemu-kvm 2 years ago
Clone
0a122b
From a4bbc54648f6865edee446d1d066c84a43e83695 Mon Sep 17 00:00:00 2001
0a122b
Message-Id: <a4bbc54648f6865edee446d1d066c84a43e83695.1387276076.git.minovotn@redhat.com>
0a122b
In-Reply-To: <e610718166120379517e80d1a7aa12d60294209b.1387276076.git.minovotn@redhat.com>
0a122b
References: <e610718166120379517e80d1a7aa12d60294209b.1387276076.git.minovotn@redhat.com>
0a122b
From: Markus Armbruster <armbru@redhat.com>
0a122b
Date: Tue, 10 Dec 2013 15:12:54 +0100
0a122b
Subject: [PATCH 13/16] trace-events: Fix up source file comments
0a122b
0a122b
RH-Author: Markus Armbruster <armbru@redhat.com>
0a122b
Message-id: <1386688376-29521-6-git-send-email-armbru@redhat.com>
0a122b
Patchwork-id: 56118
0a122b
O-Subject: [PATCH 7.0 qemu-kvm 5/7] trace-events: Fix up source file comments
0a122b
Bugzilla: 997832
0a122b
RH-Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
0a122b
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
0a122b
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
0a122b
0a122b
From: Markus Armbruster <armbru@redhat.com>
0a122b
0a122b
They're all wrong since (at least) Paolo's big source tree
0a122b
reorganization.  Need to shuffle some event declarations around to
0a122b
keep them under the correct source file comment.
0a122b
0a122b
Signed-off-by: Markus Armbruster <armbru@redhat.com>
0a122b
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
0a122b
(cherry picked from commit 3ba00637d024b9d43b26106060a23a85411d0757)
0a122b
0a122b
Conflicts:
0a122b
	trace-events
0a122b
0a122b
Trivially conflicts because we still have qemu_put_ram_ptr(), removed
0a122b
upstream in commit 4f39178.
0a122b
---
0a122b
 trace-events | 162 ++++++++++++++++++++++++++++++++---------------------------
0a122b
 1 file changed, 87 insertions(+), 75 deletions(-)
0a122b
0a122b
Signed-off-by: Michal Novotny <minovotn@redhat.com>
0a122b
---
0a122b
 trace-events | 162 ++++++++++++++++++++++++++++++++---------------------------
0a122b
 1 file changed, 87 insertions(+), 75 deletions(-)
0a122b
0a122b
diff --git a/trace-events b/trace-events
0a122b
index ef8b5e1..2a034cb 100644
0a122b
--- a/trace-events
0a122b
+++ b/trace-events
0a122b
@@ -25,18 +25,14 @@
0a122b
 #
0a122b
 # The <format-string> should be a sprintf()-compatible format string.
0a122b
 
0a122b
-# qemu-malloc.c
0a122b
-g_malloc(size_t size, void *ptr) "size %zu ptr %p"
0a122b
-g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
0a122b
-g_free(void *ptr) "ptr %p"
0a122b
-
0a122b
-# osdep.c
0a122b
+# util/oslib-win32.c
0a122b
+# util/oslib-posix.c
0a122b
 qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
0a122b
 qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p"
0a122b
 qemu_vfree(void *ptr) "ptr %p"
0a122b
 qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu"
0a122b
 
0a122b
-# hw/virtio.c
0a122b
+# hw/virtio/virtio.c
0a122b
 virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
0a122b
 virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
0a122b
 virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
0a122b
@@ -45,13 +41,13 @@ virtio_irq(void *vq) "vq %p"
0a122b
 virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
0a122b
 virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
0a122b
 
0a122b
-# hw/virtio-serial-bus.c
0a122b
+# hw/char/virtio-serial-bus.c
0a122b
 virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
0a122b
 virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
0a122b
 virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
0a122b
 virtio_serial_handle_control_message_port(unsigned int port) "port %u"
0a122b
 
0a122b
-# hw/virtio-console.c
0a122b
+# hw/char/virtio-console.c
0a122b
 virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
0a122b
 virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
0a122b
 virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
0a122b
@@ -75,6 +71,8 @@ bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t c
0a122b
 # block/stream.c
0a122b
 stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
0a122b
 stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
0a122b
+
0a122b
+# block/commit.c
0a122b
 commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
0a122b
 commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
0a122b
 
0a122b
@@ -99,19 +97,19 @@ qmp_block_job_complete(void *job) "job %p"
0a122b
 block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
0a122b
 qmp_block_stream(void *bs, void *job) "bs %p job %p"
0a122b
 
0a122b
-# hw/virtio-blk.c
0a122b
+# hw/block/virtio-blk.c
0a122b
 virtio_blk_req_complete(void *req, int status) "req %p status %d"
0a122b
 virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
0a122b
 virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
0a122b
 virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
0a122b
 
0a122b
-# hw/dataplane/virtio-blk.c
0a122b
+# hw/block/dataplane/virtio-blk.c
0a122b
 virtio_blk_data_plane_start(void *s) "dataplane %p"
0a122b
 virtio_blk_data_plane_stop(void *s) "dataplane %p"
0a122b
 virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
0a122b
 virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d"
0a122b
 
0a122b
-# hw/dataplane/vring.c
0a122b
+# hw/virtio/dataplane/vring.c
0a122b
 vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p"
0a122b
 
0a122b
 # thread-pool.c
0a122b
@@ -119,7 +117,8 @@ thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %
0a122b
 thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
0a122b
 thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
0a122b
 
0a122b
-# posix-aio-compat.c
0a122b
+# block/raw-win32.c
0a122b
+# block/raw-posix.c
0a122b
 paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
0a122b
 
0a122b
 # ioport.c
0a122b
@@ -130,29 +129,31 @@ cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
0a122b
 # Since requests are raised via monitor, not many tracepoints are needed.
0a122b
 balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
0a122b
 
0a122b
-# hw/apic.c
0a122b
-apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
0a122b
-apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
0a122b
+# hw/intc/apic_common.c
0a122b
 cpu_set_apic_base(uint64_t val) "%016"PRIx64
0a122b
 cpu_get_apic_base(uint64_t val) "%016"PRIx64
0a122b
-apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
0a122b
-apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
0a122b
 # coalescing
0a122b
 apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
0a122b
 apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
0a122b
 apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
0a122b
 
0a122b
-# hw/cs4231.c
0a122b
+# hw/intc/apic.c
0a122b
+apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
0a122b
+apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
0a122b
+apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
0a122b
+apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
0a122b
+
0a122b
+# hw/audio/cs4231.c
0a122b
 cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
0a122b
 cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
0a122b
 cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
0a122b
 cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
0a122b
 
0a122b
-# hw/ds1225y.c
0a122b
+# hw/nvram/ds1225y.c
0a122b
 nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
0a122b
 nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
0a122b
 
0a122b
-# hw/eccmemctl.c
0a122b
+# hw/misc/eccmemctl.c
0a122b
 ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
0a122b
 ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
0a122b
 ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
0a122b
@@ -172,26 +173,26 @@ ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
0a122b
 ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
0a122b
 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
0a122b
 
0a122b
-# hw/fw_cfg.c
0a122b
+# hw/nvram/fw_cfg.c
0a122b
 fw_cfg_write(void *s, uint8_t value) "%p %d"
0a122b
 fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
0a122b
 fw_cfg_read(void *s, uint8_t ret) "%p = %d"
0a122b
 fw_cfg_add_file_dupe(void *s, char *name) "%p %s"
0a122b
 fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
0a122b
 
0a122b
-# hw/hd-geometry.c
0a122b
+# hw/block/hd-geometry.c
0a122b
 hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d"
0a122b
 hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d"
0a122b
 
0a122b
-# hw/jazz-led.c
0a122b
+# hw/display/jazz_led.c
0a122b
 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
0a122b
 jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
0a122b
 
0a122b
-# hw/lance.c
0a122b
+# hw/net/lance.c
0a122b
 lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
0a122b
 lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
0a122b
 
0a122b
-# hw/slavio_intctl.c
0a122b
+# hw/intc/slavio_intctl.c
0a122b
 slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
0a122b
 slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
0a122b
 slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
0a122b
@@ -205,7 +206,7 @@ slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x
0a122b
 slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
0a122b
 slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
0a122b
 
0a122b
-# hw/slavio_misc.c
0a122b
+# hw/misc/slavio_misc.c
0a122b
 slavio_misc_update_irq_raise(void) "Raise IRQ"
0a122b
 slavio_misc_update_irq_lower(void) "Lower IRQ"
0a122b
 slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
0a122b
@@ -226,7 +227,7 @@ slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
0a122b
 slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
0a122b
 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
0a122b
 
0a122b
-# hw/slavio_timer.c
0a122b
+# hw/timer/slavio_timer.c
0a122b
 slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
0a122b
 slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
0a122b
 slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
0a122b
@@ -241,7 +242,7 @@ slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d cha
0a122b
 slavio_timer_mem_writel_mode_invalid(void) "not system timer"
0a122b
 slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
0a122b
 
0a122b
-# hw/sparc32_dma.c
0a122b
+# hw/dma/sparc32_dma.c
0a122b
 ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
0a122b
 ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
0a122b
 sparc32_dma_set_irq_raise(void) "Raise IRQ"
0a122b
@@ -253,13 +254,13 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg
0a122b
 sparc32_dma_enable_raise(void) "Raise DMA enable"
0a122b
 sparc32_dma_enable_lower(void) "Lower DMA enable"
0a122b
 
0a122b
-# hw/sun4m.c
0a122b
+# hw/sparc/sun4m.c
0a122b
 sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
0a122b
 sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
0a122b
 sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
0a122b
 sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
0a122b
 
0a122b
-# hw/sun4m_iommu.c
0a122b
+# hw/dma/sun4m_iommu.c
0a122b
 sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
0a122b
 sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
0a122b
 sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
0a122b
@@ -417,6 +418,7 @@ usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%
0a122b
 usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
0a122b
 
0a122b
 # hw/usb/host-linux.c
0a122b
+# hw/usb/host-libusb.c
0a122b
 usb_host_open_started(int bus, int addr) "dev %d:%d"
0a122b
 usb_host_open_success(int bus, int addr) "dev %d:%d"
0a122b
 usb_host_open_failure(int bus, int addr) "dev %d:%d"
0a122b
@@ -456,7 +458,7 @@ usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *
0a122b
 usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d"
0a122b
 usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
0a122b
 
0a122b
-# hw/scsi-bus.c
0a122b
+# hw/scsi/scsi-bus.c
0a122b
 scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
0a122b
 scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
0a122b
 scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
0a122b
@@ -478,6 +480,9 @@ scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
0a122b
 vm_state_notify(int running, int reason) "running %d reason %d"
0a122b
 load_file(const char *name, const char *path) "name %s location %s"
0a122b
 runstate_set(int new_state) "new state %d"
0a122b
+g_malloc(size_t size, void *ptr) "size %zu ptr %p"
0a122b
+g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
0a122b
+g_free(void *ptr) "ptr %p"
0a122b
 
0a122b
 # block/qcow2.c
0a122b
 qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d"
0a122b
@@ -486,6 +491,7 @@ qcow2_writev_start_part(void *co) "co %p"
0a122b
 qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d"
0a122b
 qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
0a122b
 
0a122b
+# block/qcow2-cluster.c
0a122b
 qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d"
0a122b
 qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
0a122b
 qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
0a122b
@@ -499,6 +505,7 @@ qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
0a122b
 qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
0a122b
 qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
0a122b
 
0a122b
+# block/qcow2-cache.c
0a122b
 qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
0a122b
 qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
0a122b
 qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
0a122b
@@ -530,11 +537,11 @@ qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t o
0a122b
 qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
0a122b
 qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
0a122b
 
0a122b
-# hw/g364fb.c
0a122b
+# hw/display/g364fb.c
0a122b
 g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
0a122b
 g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
0a122b
 
0a122b
-# hw/grlib_gptimer.c
0a122b
+# hw/timer/grlib_gptimer.c
0a122b
 grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
0a122b
 grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
0a122b
 grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
0a122b
@@ -543,19 +550,19 @@ grlib_gptimer_hit(int id) "timer:%d HIT"
0a122b
 grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
0a122b
 grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
0a122b
 
0a122b
-# hw/grlib_irqmp.c
0a122b
+# hw/intc/grlib_irqmp.c
0a122b
 grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
0a122b
 grlib_irqmp_ack(int intno) "interrupt:%d"
0a122b
 grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
0a122b
 grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
0a122b
 grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
0a122b
 
0a122b
-# hw/grlib_apbuart.c
0a122b
+# hw/char/grlib_apbuart.c
0a122b
 grlib_apbuart_event(int event) "event:%d"
0a122b
 grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
0a122b
 grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
0a122b
 
0a122b
-# hw/leon3.c
0a122b
+# hw/sparc/leon3.c
0a122b
 leon3_set_irq(int intno) "Set CPU IRQ %d"
0a122b
 leon3_reset_irq(int intno) "Reset CPU IRQ %d"
0a122b
 
0a122b
@@ -566,7 +573,7 @@ spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
0a122b
 spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
0a122b
 spice_vmc_event(int event) "spice vmc event %d"
0a122b
 
0a122b
-# hw/lm32_pic.c
0a122b
+# hw/intc/lm32_pic.c
0a122b
 lm32_pic_raise_irq(void) "Raise CPU interrupt"
0a122b
 lm32_pic_lower_irq(void) "Lower CPU interrupt"
0a122b
 lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
0a122b
@@ -575,27 +582,27 @@ lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
0a122b
 lm32_pic_get_im(uint32_t im) "im 0x%08x"
0a122b
 lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
0a122b
 
0a122b
-# hw/lm32_juart.c
0a122b
+# hw/char/lm32_juart.c
0a122b
 lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
0a122b
 lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
0a122b
 lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
0a122b
 lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
0a122b
 
0a122b
-# hw/lm32_timer.c
0a122b
+# hw/timer/lm32_timer.c
0a122b
 lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
0a122b
 lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
0a122b
 lm32_timer_hit(void) "timer hit"
0a122b
 lm32_timer_irq_state(int level) "irq state %d"
0a122b
 
0a122b
-# hw/lm32_uart.c
0a122b
+# hw/char/lm32_uart.c
0a122b
 lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
0a122b
 lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
0a122b
 lm32_uart_irq_state(int level) "irq state %d"
0a122b
 
0a122b
-# hw/lm32_sys.c
0a122b
+# hw/misc/lm32_sys.c
0a122b
 lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
0a122b
 
0a122b
-# hw/megasas.c
0a122b
+# hw/scsi/megasas.c
0a122b
 megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
0a122b
 megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
0a122b
 megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
0a122b
@@ -669,7 +676,7 @@ megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
0a122b
 megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
0a122b
 megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
0a122b
 
0a122b
-# hw/milkymist-ac97.c
0a122b
+# hw/audio/milkymist-ac97.c
0a122b
 milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
0a122b
@@ -681,15 +688,15 @@ milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
0a122b
 milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
0a122b
 milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
0a122b
 
0a122b
-# hw/milkymist-hpdmc.c
0a122b
+# hw/misc/milkymist-hpdmc.c
0a122b
 milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
0a122b
 milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
0a122b
 
0a122b
-# hw/milkymist-memcard.c
0a122b
+# hw/sd/milkymist-memcard.c
0a122b
 milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 
0a122b
-# hw/milkymist-minimac2.c
0a122b
+# hw/net/milkymist-minimac2.c
0a122b
 milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
0a122b
@@ -702,20 +709,20 @@ milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
0a122b
 milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
0a122b
 milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
0a122b
 
0a122b
-# hw/milkymist-pfpu.c
0a122b
+# hw/misc/milkymist-pfpu.c
0a122b
 milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
0a122b
 milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
0a122b
 
0a122b
-# hw/milkymist-softusb.c
0a122b
+# hw/input/milkymist-softusb.c
0a122b
 milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_softusb_mevt(uint8_t m) "m %d"
0a122b
 milkymist_softusb_kevt(uint8_t m) "m %d"
0a122b
 milkymist_softusb_pulse_irq(void) "Pulse IRQ"
0a122b
 
0a122b
-# hw/milkymist-sysctl.c
0a122b
+# hw/timer/milkymist-sysctl.c
0a122b
 milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_sysctl_icap_write(uint32_t value) "value %08x"
0a122b
@@ -726,30 +733,30 @@ milkymist_sysctl_stop_timer1(void) "Stop timer1"
0a122b
 milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
0a122b
 milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
0a122b
 
0a122b
-# hw/milkymist-tmu2.c
0a122b
+# hw/display/milkymist-tmu2.c
0a122b
 milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_tmu2_start(void) "Start TMU"
0a122b
 milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
0a122b
 
0a122b
-# hw/milkymist-uart.c
0a122b
+# hw/char/milkymist-uart.c
0a122b
 milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_uart_raise_irq(void) "Raise IRQ"
0a122b
 milkymist_uart_lower_irq(void) "Lower IRQ"
0a122b
 
0a122b
-# hw/milkymist-vgafb.c
0a122b
+# hw/display/milkymist-vgafb.c
0a122b
 milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
0a122b
 
0a122b
-# hw/mipsnet.c
0a122b
+# hw/net/mipsnet.c
0a122b
 mipsnet_send(uint32_t size) "sending len=%u"
0a122b
 mipsnet_receive(uint32_t size) "receiving len=%u"
0a122b
 mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
0a122b
 mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
0a122b
 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
0a122b
 
0a122b
-# hw/pc87312.c
0a122b
+# hw/isa/pc87312.c
0a122b
 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
0a122b
 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
0a122b
 pc87312_info_floppy(uint32_t base) "base 0x%x"
0a122b
@@ -804,7 +811,7 @@ xen_map_cache_return(void* ptr) "%p"
0a122b
 # exec.c
0a122b
 qemu_put_ram_ptr(void* addr) "%p"
0a122b
 
0a122b
-# hw/xen_platform.c
0a122b
+# hw/xen/xen_platform.c
0a122b
 xen_platform_log(char *s) "xen platform: %s"
0a122b
 
0a122b
 # qemu-coroutine.c
0a122b
@@ -820,7 +827,7 @@ qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
0a122b
 qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
0a122b
 qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
0a122b
 
0a122b
-# hw/escc.c
0a122b
+# hw/char/escc.c
0a122b
 escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
0a122b
 escc_get_queue(char channel, int val) "channel %c get 0x%02x"
0a122b
 escc_update_irq(int irq) "IRQ = %d"
0a122b
@@ -841,7 +848,7 @@ iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque,
0a122b
 iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
0a122b
 iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
0a122b
 
0a122b
-# hw/esp.c
0a122b
+# hw/scsi/esp.c
0a122b
 esp_error_fifo_overrun(void) "FIFO overrun"
0a122b
 esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
0a122b
 esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
0a122b
@@ -876,6 +883,8 @@ esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
0a122b
 esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
0a122b
 esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
0a122b
 esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
0a122b
+
0a122b
+# hw/scsi/esp-pci.c
0a122b
 esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
0a122b
 esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
0a122b
 esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
0a122b
@@ -898,7 +907,7 @@ monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
0a122b
 monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64
0a122b
 monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
0a122b
 
0a122b
-# hw/opencores_eth.c
0a122b
+# hw/net/opencores_eth.c
0a122b
 open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
0a122b
 open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
0a122b
 open_eth_update_irq(uint32_t v) "IRQ <- %x"
0a122b
@@ -968,10 +977,12 @@ mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, u
0a122b
 mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
0a122b
 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
0a122b
 
0a122b
-# target-sparc/int_helper.c
0a122b
+# target-sparc/int64_helper.c
0a122b
 int_helper_set_softint(uint32_t softint) "new %08x"
0a122b
 int_helper_clear_softint(uint32_t softint) "new %08x"
0a122b
 int_helper_write_softint(uint32_t softint) "new %08x"
0a122b
+
0a122b
+# target-sparc/int32_helper.c
0a122b
 int_helper_icache_freeze(void) "Instruction cache: freeze"
0a122b
 int_helper_dcache_freeze(void) "Data cache: freeze"
0a122b
 
0a122b
@@ -990,7 +1001,7 @@ dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
0a122b
 dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d"
0a122b
 dma_map_wait(void *dbs) "dbs=%p"
0a122b
 
0a122b
-# console.h
0a122b
+# ui/console.c
0a122b
 console_gfx_new(void) ""
0a122b
 console_txt_new(int w, int h) "%dx%d"
0a122b
 console_select(int nr) "%d"
0a122b
@@ -1000,9 +1011,9 @@ displaysurface_create_from(void *display_surface, int w, int h, int bpp, int swa
0a122b
 displaysurface_free(void *display_surface) "surface=%p"
0a122b
 displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
0a122b
 displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
0a122b
-
0a122b
-# vga.c
0a122b
 ppm_save(const char *filename, void *display_surface) "%s surface=%p"
0a122b
+
0a122b
+# hw/display/vmware_vga.c
0a122b
 vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
0a122b
 vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
0a122b
 vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
0a122b
@@ -1012,7 +1023,6 @@ vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
0a122b
 vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
0a122b
 
0a122b
 # savevm.c
0a122b
-
0a122b
 savevm_section_start(void) ""
0a122b
 savevm_section_end(unsigned int section_id) "section_id %u"
0a122b
 
0a122b
@@ -1021,7 +1031,7 @@ migration_bitmap_sync_start(void) ""
0a122b
 migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64""
0a122b
 migration_throttle(void) ""
0a122b
 
0a122b
-# hw/qxl.c
0a122b
+# hw/display/qxl.c
0a122b
 disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
0a122b
 disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
0a122b
 qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
0a122b
@@ -1059,12 +1069,6 @@ qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t
0a122b
 qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
0a122b
 qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
0a122b
 qxl_soft_reset(int qid) "%d"
0a122b
-qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
0a122b
-qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
0a122b
-qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
0a122b
-qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
0a122b
-qemu_spice_wakeup(uint32_t qid) "%d"
0a122b
-qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d,  tb -> %d -> %d"
0a122b
 qxl_spice_destroy_surfaces_complete(int qid) "%d"
0a122b
 qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
0a122b
 qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
0a122b
@@ -1089,13 +1093,21 @@ qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
0a122b
 qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
0a122b
 qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
0a122b
 
0a122b
-# hw/qxl-render.c
0a122b
+# ui/spice-display.c
0a122b
+qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
0a122b
+qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
0a122b
+qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
0a122b
+qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
0a122b
+qemu_spice_wakeup(uint32_t qid) "%d"
0a122b
+qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d,  tb -> %d -> %d"
0a122b
+
0a122b
+# hw/display/qxl-render.c
0a122b
 qxl_render_blit_guest_primary_initialized(void) ""
0a122b
 qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
0a122b
 qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
0a122b
 qxl_render_update_area_done(void *cookie) "%p"
0a122b
 
0a122b
-# hw/spapr_pci.c
0a122b
+# hw/ppc/spapr_pci.c
0a122b
 spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)"
0a122b
 spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
0a122b
 spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u"
0a122b
@@ -1103,7 +1115,7 @@ spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "q
0a122b
 spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
0a122b
 spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
0a122b
 
0a122b
-# hw/xics.c
0a122b
+# hw/ppc/xics.c
0a122b
 xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
0a122b
 xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
0a122b
 xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
0a122b
@@ -1116,7 +1128,7 @@ xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_
0a122b
 xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
0a122b
 xics_ics_eoi(int nr) "ics_eoi: irq %#x"
0a122b
 
0a122b
-# hbitmap.c
0a122b
+# util/hbitmap.c
0a122b
 hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx"
0a122b
 hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
0a122b
 hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
0a122b
-- 
0a122b
1.7.11.7
0a122b