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Blame SOURCES/kvm-target-i386-add-fast-short-REP-MOV-support.patch

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From f33880c5f7a4e2cad25c22112da073273c6e2cfb Mon Sep 17 00:00:00 2001
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From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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Date: Wed, 24 Feb 2021 11:30:35 -0500
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Subject: [PATCH 2/4] target/i386: add fast short REP MOV support
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RH-Author: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Message-id: <20210224113037.15599-3-dgilbert@redhat.com>
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Patchwork-id: 101201
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O-Subject: [RHEL-8.4.0 qemu-kvm PATCH 2/4] target/i386: add fast short REP MOV support
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Bugzilla: 1790620
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RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
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RH-Acked-by: Sergio Lopez Pascual <slp@redhat.com>
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RH-Acked-by: Peter Xu <peterx@redhat.com>
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From: Chenyi Qiang <chenyi.qiang@intel.com>
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For CPUs support fast short REP MOV[CPUID.(EAX=7,ECX=0):EDX(bit4)], e.g
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Icelake and Tigerlake, expose it to the guest VM.
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Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
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Message-Id: <20200714084148.26690-2-chenyi.qiang@intel.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 5cb287d2bd578dfe4897458793b4fce35bc4f744)
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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 target/i386/cpu.c | 2 +-
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 target/i386/cpu.h | 2 ++
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 2 files changed, 3 insertions(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 67dab94aa5..f6a9ed84b3 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1077,7 +1077,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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         .type = CPUID_FEATURE_WORD,
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         .feat_names = {
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             NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
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-            NULL, NULL, NULL, NULL,
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+            "fsrm", NULL, NULL, NULL,
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             "avx512-vp2intersect", NULL, "md-clear", NULL,
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             NULL, NULL, NULL, NULL,
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             NULL, NULL, NULL /* pconfig */, NULL,
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 8e2e52ed31..f5a4efcec6 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -770,6 +770,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
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 #define CPUID_7_0_EDX_AVX512_4VNNIW     (1U << 2)
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 /* AVX512 Multiply Accumulation Single Precision */
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 #define CPUID_7_0_EDX_AVX512_4FMAPS     (1U << 3)
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+/* Fast Short Rep Mov */
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+#define CPUID_7_0_EDX_FSRM              (1U << 4)
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 /* AVX512 Vector Pair Intersection to a Pair of Mask Registers */
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 #define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8)
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 /* Speculation Control */
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-- 
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2.27.0
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