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From eb121ffa97c1c25d7853d51b4c8209c0bb521deb Mon Sep 17 00:00:00 2001
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From: David Gibson <dgibson@redhat.com>
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Date: Fri, 7 Feb 2020 00:57:04 +0000
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Subject: [PATCH 1/7] spapr: Enable DD2.3 accelerated count cache flush in
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pseries-5.0 machine
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RH-Author: David Gibson <dgibson@redhat.com>
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Message-id: <20200207005704.194428-1-dgibson@redhat.com>
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Patchwork-id: 93737
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O-Subject: [RHEL-AV-8.2 qemu-kvm PATCHv2] spapr: Enable DD2.3 accelerated count cache flush in pseries-5.0 machine
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Bugzilla: 1796240
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RH-Acked-by: Danilo de Paula <ddepaula@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Thomas Huth <thuth@redhat.com>
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From: David Gibson <david@gibson.dropbear.id.au>
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For POWER9 DD2.2 cpus, the best current Spectre v2 indirect branch
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mitigation is "count cache disabled", which is configured with:
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-machine cap-ibs=fixed-ccd
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However, this option isn't available on DD2.3 CPUs with KVM, because they
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don't have the count cache disabled.
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For POWER9 DD2.3 cpus, it is "count cache flush with assist", configured
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with:
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-machine cap-ibs=workaround,cap-ccf-assist=on
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However this option isn't available on DD2.2 CPUs with KVM, because they
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don't have the special CCF assist instruction this relies on.
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On current machine types, we default to "count cache flush w/o assist",
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that is:
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-machine cap-ibs=workaround,cap-ccf-assist=off
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This runs, with mitigation on both DD2.2 and DD2.3 host cpus, but has a
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fairly significant performance impact.
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It turns out we can do better. The special instruction that CCF assist
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uses to trigger a count cache flush is a no-op on earlier CPUs, rather than
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trapping or causing other badness. It doesn't, of itself, implement the
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mitigation, but *if* we have count-cache-disabled, then the count cache
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flush is unnecessary, and so using the count cache flush mitigation is
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harmless.
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Therefore for the new pseries-5.0 machine type, enable cap-ccf-assist by
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default. Along with that, suppress throwing an error if cap-ccf-assist
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is selected but KVM doesn't support it, as long as KVM *is* giving us
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count-cache-disabled. To allow TCG to work out of the box, even though it
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doesn't implement the ccf flush assist, downgrade the error in that case to
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a warning. This matches several Spectre mitigations where we allow TCG
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to operate for debugging, since we don't really make guarantees about TCG
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security properties anyway.
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While we're there, make the TCG warning for this case match that for other
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mitigations.
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Tested-by: Michael Ellerman <mpe@ellerman.id.au>
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(cherry picked from commit 37965dfe4dffa3ac49438337417608e7f346b58a)
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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Conflicts:
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hw/ppc/spapr.c
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Adjusted machine version compatibility code to the RHEL machine types
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rather than the upstream machine types.
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1796240
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Brew: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=26285002
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Branch: rhel-av-8.2.0
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Upstream: Merged for qemu-5.0
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Signed-off-by: David Gibson <dgibson@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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hw/ppc/spapr.c | 4 +++-
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hw/ppc/spapr_caps.c | 21 +++++++++++++++++----
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2 files changed, 20 insertions(+), 5 deletions(-)
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diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
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index c12862d..a330f03 100644
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--- a/hw/ppc/spapr.c
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+++ b/hw/ppc/spapr.c
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@@ -4440,7 +4440,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
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smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 16; /* 64kiB */
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smc->default_caps.caps[SPAPR_CAP_NESTED_KVM_HV] = SPAPR_CAP_OFF;
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smc->default_caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_ON;
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- smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_OFF;
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+ smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_ON;
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spapr_caps_add_properties(smc, &error_abort);
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smc->irq = &spapr_irq_dual;
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smc->dr_phb_enabled = true;
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@@ -4904,6 +4904,8 @@ static void spapr_machine_rhel810_class_options(MachineClass *mc)
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hw_compat_rhel_8_1_len);
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compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
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+ /* from pseries-4.2 */
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+ smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_OFF;
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}
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DEFINE_SPAPR_MACHINE(rhel810, "rhel8.1.0", false);
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diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
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index 805f385..6e6fb28 100644
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--- a/hw/ppc/spapr_caps.c
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+++ b/hw/ppc/spapr_caps.c
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@@ -492,11 +492,24 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
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uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
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if (tcg_enabled() && val) {
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- /* TODO - for now only allow broken for TCG */
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- error_setg(errp,
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-"Requested count cache flush assist capability level not supported by tcg,"
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- " try appending -machine cap-ccf-assist=off");
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+ /* TCG doesn't implement anything here, but allow with a warning */
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+ warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
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} else if (kvm_enabled() && (val > kvm_val)) {
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+ uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch();
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+
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+ if (kvm_ibs == SPAPR_CAP_FIXED_CCD) {
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+ /*
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+ * If we don't have CCF assist on the host, the assist
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+ * instruction is a harmless no-op. It won't correctly
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+ * implement the cache count flush *but* if we have
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+ * count-cache-disabled in the host, that flush is
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+ * unnnecessary. So, specifically allow this case. This
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+ * allows us to have better performance on POWER9 DD2.3,
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+ * while still working on POWER9 DD2.2 and POWER8 host
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+ * cpus.
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+ */
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+ return;
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+ }
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error_setg(errp,
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"Requested count cache flush assist capability level not supported by kvm,"
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" try appending -machine cap-ccf-assist=off");
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--
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1.8.3.1
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