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From 35510628e459d51b1ef6048bb307462a75ecf2d2 Mon Sep 17 00:00:00 2001
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Message-Id: <35510628e459d51b1ef6048bb307462a75ecf2d2.1387298827.git.minovotn@redhat.com>
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In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
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References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
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From: "Michael S. Tsirkin" <mst@redhat.com>
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Date: Tue, 17 Dec 2013 15:18:04 +0100
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Subject: [PATCH 29/56] pcie_host: expose address format
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RH-Author: Michael S. Tsirkin <mst@redhat.com>
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Message-id: <1387293161-4085-30-git-send-email-mst@redhat.com>
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Patchwork-id: 56335
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O-Subject: [PATCH qemu-kvm RHEL7.0 v2 29/57] pcie_host: expose address format
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Bugzilla: 1034876
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Marcel Apfelbaum <marcel.a@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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Callers pass in the address so it's helpful for
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them to be able to decode it.
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Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
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Tested-by: Gerd Hoffmann <kraxel@redhat.com>
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Reviewed-by: Igor Mammedov <imammedo@redhat.com>
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Tested-by: Igor Mammedov <imammedo@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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(cherry picked from commit 6f6d282330a3c85ecbeb54dec5b57282bd177b44)
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---
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 include/hw/pci/pcie_host.h | 21 +++++++++++++++++++++
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 hw/pci/pcie_host.c         | 21 ---------------------
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 2 files changed, 21 insertions(+), 21 deletions(-)
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Signed-off-by: Michal Novotny <minovotn@redhat.com>
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---
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 hw/pci/pcie_host.c         | 21 ---------------------
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 include/hw/pci/pcie_host.h | 21 +++++++++++++++++++++
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 2 files changed, 21 insertions(+), 21 deletions(-)
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diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
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index 0a78a8f..a6db258 100644
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--- a/hw/pci/pcie_host.c
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+++ b/hw/pci/pcie_host.c
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@@ -24,27 +24,6 @@
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 #include "hw/pci/pcie_host.h"
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 #include "exec/address-spaces.h"
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-/*
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- * PCI express mmcfig address
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- * bit 20 - 28: bus number
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- * bit 15 - 19: device number
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- * bit 12 - 14: function number
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- * bit  0 - 11: offset in configuration space of a given device
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- */
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-#define PCIE_MMCFG_SIZE_MAX             (1ULL << 28)
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-#define PCIE_MMCFG_SIZE_MIN             (1ULL << 20)
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-#define PCIE_MMCFG_BUS_BIT              20
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-#define PCIE_MMCFG_BUS_MASK             0x1ff
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-#define PCIE_MMCFG_DEVFN_BIT            12
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-#define PCIE_MMCFG_DEVFN_MASK           0xff
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-#define PCIE_MMCFG_CONFOFFSET_MASK      0xfff
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-#define PCIE_MMCFG_BUS(addr)            (((addr) >> PCIE_MMCFG_BUS_BIT) & \
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-                                         PCIE_MMCFG_BUS_MASK)
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-#define PCIE_MMCFG_DEVFN(addr)          (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \
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-                                         PCIE_MMCFG_DEVFN_MASK)
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-#define PCIE_MMCFG_CONFOFFSET(addr)     ((addr) & PCIE_MMCFG_CONFOFFSET_MASK)
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-
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-
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 /* a helper function to get a PCIDevice for a given mmconfig address */
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 static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s,
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                                                      uint32_t mmcfg_addr)
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diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h
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index bac3c67..da0f275 100644
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--- a/include/hw/pci/pcie_host.h
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+++ b/include/hw/pci/pcie_host.h
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@@ -54,4 +54,25 @@ void pcie_host_mmcfg_update(PCIExpressHost *e,
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                             hwaddr addr,
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                             uint32_t size);
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+/*
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+ * PCI express ECAM (Enhanced Configuration Address Mapping) format.
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+ * AKA mmcfg address
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+ * bit 20 - 28: bus number
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+ * bit 15 - 19: device number
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+ * bit 12 - 14: function number
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+ * bit  0 - 11: offset in configuration space of a given device
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+ */
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+#define PCIE_MMCFG_SIZE_MAX             (1ULL << 28)
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+#define PCIE_MMCFG_SIZE_MIN             (1ULL << 20)
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+#define PCIE_MMCFG_BUS_BIT              20
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+#define PCIE_MMCFG_BUS_MASK             0x1ff
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+#define PCIE_MMCFG_DEVFN_BIT            12
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+#define PCIE_MMCFG_DEVFN_MASK           0xff
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+#define PCIE_MMCFG_CONFOFFSET_MASK      0xfff
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+#define PCIE_MMCFG_BUS(addr)            (((addr) >> PCIE_MMCFG_BUS_BIT) & \
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+                                         PCIE_MMCFG_BUS_MASK)
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+#define PCIE_MMCFG_DEVFN(addr)          (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \
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+                                         PCIE_MMCFG_DEVFN_MASK)
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+#define PCIE_MMCFG_CONFOFFSET(addr)     ((addr) & PCIE_MMCFG_CONFOFFSET_MASK)
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+
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 #endif /* PCIE_HOST_H */
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-- 
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1.7.11.7
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