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From 2ef29c217183a2e16bbc8d209d94a2bb5a009204 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Mon, 23 Sep 2019 20:40:20 +0200
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Subject: [PATCH 04/12] i386: Add new MSR indices for IA32_PRED_CMD and
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IA32_ARCH_CAPABILITIES
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RH-Author: plai@redhat.com
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Message-id: <1569271227-28026-4-git-send-email-plai@redhat.com>
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Patchwork-id: 90862
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O-Subject: [RHEL7.8 qemu-kvm PATCH v6 03/10] i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
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Bugzilla: 1709971
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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From: Robert Hoo <robert.hu@linux.intel.com>
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IA32_PRED_CMD MSR gives software a way to issue commands that affect the state
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of indirect branch predictors. Enumerated by CPUID.(EAX=7H,ECX=0):EDX[26].
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IA32_ARCH_CAPABILITIES MSR enumerates architectural features of RDCL_NO and
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IBRS_ALL. Enumerated by CPUID.(EAX=07H, ECX=0):EDX[29].
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https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf
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Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
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Message-Id: <1530781798-183214-2-git-send-email-robert.hu@linux.intel.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 8c80c99fcceabd0708a5a83f08577e778c9419f5)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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target-i386/cpu.h | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index cbbc34f..0ce479a 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -306,6 +306,8 @@
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#define MSR_TSC_ADJUST 0x0000003b
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#define MSR_IA32_SPEC_CTRL 0x48
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#define MSR_VIRT_SSBD 0xc001011f
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+#define MSR_IA32_PRED_CMD 0x49
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+#define MSR_IA32_ARCH_CAPABILITIES 0x10a
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#define MSR_IA32_TSCDEADLINE 0x6e0
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#define MSR_P6_PERFCTR0 0xc1
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--
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1.8.3.1
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