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Blame SOURCES/kvm-hw-block-pflash_cfi01-Add-missing-DeviceReset-handle.patch

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From 707a777c2992e840d2c3dd4e1fbed5b0d6c682ec Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>
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Date: Tue, 23 Jul 2019 11:51:05 +0100
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Subject: [PATCH 01/14] hw/block/pflash_cfi01: Add missing DeviceReset()
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 handler
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Philippe Mathieu-Daudé <philmd@redhat.com>
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Message-id: <20190723115105.31305-2-philmd@redhat.com>
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Patchwork-id: 89645
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O-Subject: [RHEL-8.1.0 qemu-kvm PATCH 1/1] hw/block/pflash_cfi01: Add missing DeviceReset() handler
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Bugzilla: 1707192
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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RH-Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
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RH-Acked-by: John Snow <jsnow@redhat.com>
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To avoid incoherent states when the machine resets (see bug report
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below), add the device reset callback.
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A "system reset" sets the device state machine in READ_ARRAY mode
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and, after some delay, set the SR.7 READY bit.
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Since we do not model timings, we set the SR.7 bit directly.
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Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1678713
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Reported-by: Laszlo Ersek <lersek@redhat.com>
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Reviewed-by: John Snow <jsnow@redhat.com>
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Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
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Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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Tested-by: Laszlo Ersek <lersek@redhat.com>
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[Laszlo Ersek: Regression tested EDK2 OVMF IA32X64, ArmVirtQemu Aarch64
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 https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg04373.html]
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Message-Id: <20190718104837.13905-2-philmd@redhat.com>
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Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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(cherry picked from commit 3a283507c03474d285196620fca506bd1a89b198)
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[PMD: upstream commit e7b6274197c changed PFLASH_CFI01 <- CFI_PFLASH01,
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  and upstream commit 1643406520f changed PFlashCFI01 <- pflash_t]
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Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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 hw/block/pflash_cfi01.c | 19 +++++++++++++++++++
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 1 file changed, 19 insertions(+)
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diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
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index 2e82840..1be351e 100644
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--- a/hw/block/pflash_cfi01.c
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+++ b/hw/block/pflash_cfi01.c
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@@ -876,6 +876,24 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
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     pfl->cfi_table[0x3f] = 0x01; /* Number of protection fields */
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 }
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+static void pflash_cfi01_system_reset(DeviceState *dev)
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+{
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+    pflash_t *pfl = CFI_PFLASH01(dev);
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+
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+    /*
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+     * The command 0x00 is not assigned by the CFI open standard,
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+     * but QEMU historically uses it for the READ_ARRAY command (0xff).
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+     */
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+    pfl->cmd = 0x00;
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+    pfl->wcycle = 0;
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+    memory_region_rom_device_set_romd(&pfl->mem, true);
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+    /*
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+     * The WSM ready timer occurs at most 150ns after system reset.
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+     * This model deliberately ignores this delay.
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+     */
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+    pfl->status = 0x80;
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+}
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+
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 static Property pflash_cfi01_properties[] = {
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     DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
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     /* num-blocks is the number of blocks actually visible to the guest,
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@@ -920,6 +938,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
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 {
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     DeviceClass *dc = DEVICE_CLASS(klass);
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+    dc->reset = pflash_cfi01_system_reset;
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     dc->realize = pflash_cfi01_realize;
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     dc->props = pflash_cfi01_properties;
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     dc->vmsd = &vmstate_pflash;
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-- 
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1.8.3.1
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