yeahuh / rpms / qemu-kvm

Forked from rpms/qemu-kvm 2 years ago
Clone
8fced6
From fbfa584e58a560f27081043ad8e90ee9022421c0 Mon Sep 17 00:00:00 2001
8fced6
From: eperezma <eperezma@redhat.com>
8fced6
Date: Tue, 12 Jan 2021 14:36:27 -0500
8fced6
Subject: [PATCH 03/17] hw/arm/smmu-common: Add IOTLB helpers
8fced6
MIME-Version: 1.0
8fced6
Content-Type: text/plain; charset=UTF-8
8fced6
Content-Transfer-Encoding: 8bit
8fced6
8fced6
RH-Author: eperezma <eperezma@redhat.com>
8fced6
Message-id: <20210112143638.374060-3-eperezma@redhat.com>
8fced6
Patchwork-id: 100595
8fced6
O-Subject: [RHEL-8.4.0 qemu-kvm PATCH v2 02/13] hw/arm/smmu-common: Add IOTLB helpers
8fced6
Bugzilla: 1843852
8fced6
RH-Acked-by: Xiao Wang <jasowang@redhat.com>
8fced6
RH-Acked-by: Peter Xu <peterx@redhat.com>
8fced6
RH-Acked-by: Auger Eric <eric.auger@redhat.com>
8fced6
8fced6
From: Eric Auger <eric.auger@redhat.com>
8fced6
8fced6
Add two helpers: one to lookup for a given IOTLB entry and
8fced6
one to insert a new entry. We also move the tracing there.
8fced6
8fced6
Signed-off-by: Eric Auger <eric.auger@redhat.com>
8fced6
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8fced6
Message-id: 20200728150815.11446-3-eric.auger@redhat.com
8fced6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8fced6
(cherry picked from commit 6808bca939b8722d98165319ba42366ca80de907)
8fced6
Signed-off-by: Eugenio PĂ©rez <eperezma@redhat.com>
8fced6
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
8fced6
---
8fced6
 hw/arm/smmu-common.c         | 36 ++++++++++++++++++++++++++++++++++++
8fced6
 hw/arm/smmuv3.c              | 26 ++------------------------
8fced6
 hw/arm/trace-events          |  5 +++--
8fced6
 include/hw/arm/smmu-common.h |  2 ++
8fced6
 4 files changed, 43 insertions(+), 26 deletions(-)
8fced6
8fced6
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
8fced6
index d2ba8b224ba..8e01505dbee 100644
8fced6
--- a/hw/arm/smmu-common.c
8fced6
+++ b/hw/arm/smmu-common.c
8fced6
@@ -32,6 +32,42 @@
8fced6
 
8fced6
 /* IOTLB Management */
8fced6
 
8fced6
+IOMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg,
8fced6
+                                 hwaddr iova)
8fced6
+{
8fced6
+    SMMUIOTLBKey key = {.asid = cfg->asid, .iova = iova};
8fced6
+    IOMMUTLBEntry *entry = g_hash_table_lookup(bs->iotlb, &key);
8fced6
+
8fced6
+    if (entry) {
8fced6
+        cfg->iotlb_hits++;
8fced6
+        trace_smmu_iotlb_lookup_hit(cfg->asid, iova,
8fced6
+                                    cfg->iotlb_hits, cfg->iotlb_misses,
8fced6
+                                    100 * cfg->iotlb_hits /
8fced6
+                                    (cfg->iotlb_hits + cfg->iotlb_misses));
8fced6
+    } else {
8fced6
+        cfg->iotlb_misses++;
8fced6
+        trace_smmu_iotlb_lookup_miss(cfg->asid, iova,
8fced6
+                                     cfg->iotlb_hits, cfg->iotlb_misses,
8fced6
+                                     100 * cfg->iotlb_hits /
8fced6
+                                     (cfg->iotlb_hits + cfg->iotlb_misses));
8fced6
+    }
8fced6
+    return entry;
8fced6
+}
8fced6
+
8fced6
+void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, IOMMUTLBEntry *entry)
8fced6
+{
8fced6
+    SMMUIOTLBKey *key = g_new0(SMMUIOTLBKey, 1);
8fced6
+
8fced6
+    if (g_hash_table_size(bs->iotlb) >= SMMU_IOTLB_MAX_SIZE) {
8fced6
+        smmu_iotlb_inv_all(bs);
8fced6
+    }
8fced6
+
8fced6
+    key->asid = cfg->asid;
8fced6
+    key->iova = entry->iova;
8fced6
+    trace_smmu_iotlb_insert(cfg->asid, entry->iova);
8fced6
+    g_hash_table_insert(bs->iotlb, key, entry);
8fced6
+}
8fced6
+
8fced6
 inline void smmu_iotlb_inv_all(SMMUState *s)
8fced6
 {
8fced6
     trace_smmu_iotlb_inv_all();
8fced6
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
8fced6
index e2fbb8357ea..34dea4df4da 100644
8fced6
--- a/hw/arm/smmuv3.c
8fced6
+++ b/hw/arm/smmuv3.c
8fced6
@@ -624,7 +624,6 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
8fced6
         .addr_mask = ~(hwaddr)0,
8fced6
         .perm = IOMMU_NONE,
8fced6
     };
8fced6
-    SMMUIOTLBKey key, *new_key;
8fced6
 
8fced6
     qemu_mutex_lock(&s->mutex);
8fced6
 
8fced6
@@ -663,16 +662,8 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
8fced6
     page_mask = (1ULL << (tt->granule_sz)) - 1;
8fced6
     aligned_addr = addr & ~page_mask;
8fced6
 
8fced6
-    key.asid = cfg->asid;
8fced6
-    key.iova = aligned_addr;
8fced6
-
8fced6
-    cached_entry = g_hash_table_lookup(bs->iotlb, &key);
8fced6
+    cached_entry = smmu_iotlb_lookup(bs, cfg, aligned_addr);
8fced6
     if (cached_entry) {
8fced6
-        cfg->iotlb_hits++;
8fced6
-        trace_smmu_iotlb_cache_hit(cfg->asid, aligned_addr,
8fced6
-                                   cfg->iotlb_hits, cfg->iotlb_misses,
8fced6
-                                   100 * cfg->iotlb_hits /
8fced6
-                                   (cfg->iotlb_hits + cfg->iotlb_misses));
8fced6
         if ((flag & IOMMU_WO) && !(cached_entry->perm & IOMMU_WO)) {
8fced6
             status = SMMU_TRANS_ERROR;
8fced6
             if (event.record_trans_faults) {
8fced6
@@ -686,16 +677,6 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
8fced6
         goto epilogue;
8fced6
     }
8fced6
 
8fced6
-    cfg->iotlb_misses++;
8fced6
-    trace_smmu_iotlb_cache_miss(cfg->asid, addr & ~page_mask,
8fced6
-                                cfg->iotlb_hits, cfg->iotlb_misses,
8fced6
-                                100 * cfg->iotlb_hits /
8fced6
-                                (cfg->iotlb_hits + cfg->iotlb_misses));
8fced6
-
8fced6
-    if (g_hash_table_size(bs->iotlb) >= SMMU_IOTLB_MAX_SIZE) {
8fced6
-        smmu_iotlb_inv_all(bs);
8fced6
-    }
8fced6
-
8fced6
     cached_entry = g_new0(IOMMUTLBEntry, 1);
8fced6
 
8fced6
     if (smmu_ptw(cfg, aligned_addr, flag, cached_entry, &ptw_info)) {
8fced6
@@ -741,10 +722,7 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
8fced6
         }
8fced6
         status = SMMU_TRANS_ERROR;
8fced6
     } else {
8fced6
-        new_key = g_new0(SMMUIOTLBKey, 1);
8fced6
-        new_key->asid = cfg->asid;
8fced6
-        new_key->iova = aligned_addr;
8fced6
-        g_hash_table_insert(bs->iotlb, new_key, cached_entry);
8fced6
+        smmu_iotlb_insert(bs, cfg, cached_entry);
8fced6
         status = SMMU_TRANS_SUCCESS;
8fced6
     }
8fced6
 
8fced6
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
8fced6
index 0acedcedc6f..b808a1bfc19 100644
8fced6
--- a/hw/arm/trace-events
8fced6
+++ b/hw/arm/trace-events
8fced6
@@ -14,6 +14,9 @@ smmu_iotlb_inv_all(void) "IOTLB invalidate all"
8fced6
 smmu_iotlb_inv_asid(uint16_t asid) "IOTLB invalidate asid=%d"
8fced6
 smmu_iotlb_inv_iova(uint16_t asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64
8fced6
 smmu_inv_notifiers_mr(const char *name) "iommu mr=%s"
8fced6
+smmu_iotlb_lookup_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
8fced6
+smmu_iotlb_lookup_miss(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
8fced6
+smmu_iotlb_insert(uint16_t asid, uint64_t addr) "IOTLB ++ asid=%d addr=0x%"PRIx64
8fced6
 
8fced6
 # smmuv3.c
8fced6
 smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)"
8fced6
@@ -46,8 +49,6 @@ smmuv3_cmdq_tlbi_nh_va(int vmid, int asid, uint64_t addr, bool leaf) "vmid =%d a
8fced6
 smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr) "vmid =%d addr=0x%"PRIx64
8fced6
 smmuv3_cmdq_tlbi_nh(void) ""
8fced6
 smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d"
8fced6
-smmu_iotlb_cache_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
8fced6
-smmu_iotlb_cache_miss(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
8fced6
 smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid %d"
8fced6
 smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
8fced6
 smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
8fced6
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
8fced6
index 1f37844e5c9..a28650c9350 100644
8fced6
--- a/include/hw/arm/smmu-common.h
8fced6
+++ b/include/hw/arm/smmu-common.h
8fced6
@@ -153,6 +153,8 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid);
8fced6
 
8fced6
 #define SMMU_IOTLB_MAX_SIZE 256
8fced6
 
8fced6
+IOMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg, hwaddr iova);
8fced6
+void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, IOMMUTLBEntry *entry);
8fced6
 void smmu_iotlb_inv_all(SMMUState *s);
8fced6
 void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid);
8fced6
 void smmu_iotlb_inv_iova(SMMUState *s, uint16_t asid, dma_addr_t iova);
8fced6
-- 
8fced6
2.27.0
8fced6