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Blame SOURCES/kvm-apic-set-APIC-base-as-part-of-kvm_apic_put.patch

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From 4142f7546da561898f15169f6e8085167601e878 Mon Sep 17 00:00:00 2001
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From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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Date: Tue, 15 May 2018 11:56:34 +0200
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Subject: [PATCH 08/10] kvm: apic: set APIC base as part of kvm_apic_put
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RH-Author: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Message-id: <20180515115634.24469-6-dgilbert@redhat.com>
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Patchwork-id: 80271
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O-Subject: [RHEL-7.6 qemu-kvm PATCH v2 5/5] kvm: apic: set APIC base as part of kvm_apic_put
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Bugzilla: 1577680
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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The parsing of KVM_SET_LAPIC's input depends on the current value of the
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APIC base MSR---which indeed is stored in APICCommonState---but for historical
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reasons APIC base is set through KVM_SET_SREGS together with cr8 (which is
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really just the APIC TPR) and the actual "special CPU registers".
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APIC base must now be set before the actual LAPIC registers, so do that
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in kvm_apic_put.  It will be set again to the same value with KVM_SET_SREGS,
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but that's not a big issue.
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This only happens since Linux 4.8, which checks for x2apic mode in
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KVM_SET_LAPIC.  However it's really a QEMU bug; until the recent
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commit 78d6a05 ("x86/lapic: Load LAPIC state at post_load", 2016-09-13)
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QEMU was indeed setting APIC base (via KVM_SET_SREGS) before the other
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LAPIC registers.
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Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit f8d9ccf8d5f9f4b7d364100871c4c7303b546de5)
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 hw/i386/kvm/apic.c     | 2 ++
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 target-i386/kvm.c      | 8 ++++++++
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 target-i386/kvm_i386.h | 2 ++
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 3 files changed, 12 insertions(+)
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diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
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index d47d8da..77d2999 100644
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--- a/hw/i386/kvm/apic.c
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+++ b/hw/i386/kvm/apic.c
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@@ -12,6 +12,7 @@
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 #include "hw/i386/apic_internal.h"
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 #include "hw/pci/msi.h"
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 #include "sysemu/kvm.h"
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+#include "target-i386/kvm_i386.h"
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 static inline void kvm_apic_set_reg(struct kvm_lapic_state *kapic,
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                                     int reg_id, uint32_t val)
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@@ -127,6 +128,7 @@ static void kvm_apic_put(void *data)
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     struct kvm_lapic_state kapic;
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     int ret;
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+    kvm_put_apicbase(s->cpu, s->apicbase);
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     kvm_put_apic_state(s, &kapic);
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     ret = kvm_vcpu_ioctl(CPU(s->cpu), KVM_SET_LAPIC, &kapic);
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diff --git a/target-i386/kvm.c b/target-i386/kvm.c
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index 71f1573..a1a49d8 100644
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--- a/target-i386/kvm.c
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+++ b/target-i386/kvm.c
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@@ -1152,6 +1152,14 @@ static int kvm_put_one_msr(X86CPU *cpu, int index, uint64_t value)
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     return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, &msr_data);
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 }
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+void kvm_put_apicbase(X86CPU *cpu, uint64_t value)
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+{
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+    int ret;
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+
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+    ret = kvm_put_one_msr(cpu, MSR_IA32_APICBASE, value);
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+    assert(ret == 1);
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+}
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+
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 static int kvm_put_tscdeadline_msr(X86CPU *cpu)
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 {
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     CPUX86State *env = &cpu->env;
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diff --git a/target-i386/kvm_i386.h b/target-i386/kvm_i386.h
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index 4392ab4..b260b31 100644
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--- a/target-i386/kvm_i386.h
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+++ b/target-i386/kvm_i386.h
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@@ -35,4 +35,6 @@ int kvm_device_msix_set_vector(KVMState *s, uint32_t dev_id, uint32_t vector,
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 int kvm_device_msix_assign(KVMState *s, uint32_t dev_id);
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 int kvm_device_msix_deassign(KVMState *s, uint32_t dev_id);
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+void kvm_put_apicbase(X86CPU *cpu, uint64_t value);
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+
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 #endif
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-- 
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1.8.3.1
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