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From b6a062c64f9639558a88f46edc3dd76b54b26bb5 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Thu, 13 Dec 2018 15:51:59 +0000
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Subject: [PATCH 1/5] x86: host-phys-bits-limit option
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20181213155200.20300-2-ehabkost@redhat.com>
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Patchwork-id: 83479
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O-Subject: [RHEL8/rhel qemu-kvm PATCH 1/2] x86: host-phys-bits-limit option
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Bugzilla: 1598284
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RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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RH-Acked-by: Pankaj Gupta <pagupta@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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Some downstream distributions of QEMU set host-phys-bits=on by
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default. This worked very well for most use cases, because
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phys-bits really didn't have huge consequences. The only
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difference was on the CPUID data seen by guests, and on the
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handling of reserved bits.
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This changed in KVM commit 855feb673640 ("KVM: MMU: Add 5 level
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EPT & Shadow page table support"). Now choosing a large
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phys-bits value for a VM has bigger impact: it will make KVM use
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5-level EPT even when it's not really necessary. This means
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using the host phys-bits value may not be the best choice.
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Management software could address this problem by manually
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configuring phys-bits depending on the size of the VM and the
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amount of MMIO address space required for hotplug. But this is
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not trivial to implement.
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However, there's another workaround that would work for most
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cases: keep using the host phys-bits value, but only if it's
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smaller than 48. This patch makes this possible by introducing a
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new "-cpu" option: "host-phys-bits-limit". Management software
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or users can make sure they will always use 4-level EPT using:
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"host-phys-bits=on,host-phys-bits-limit=48".
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This behavior is still not enabled by default because QEMU
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doesn't enable host-phys-bits=on by default. But users,
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management software, or downstream distributions may choose to
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change their defaults using the new option.
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Message-Id: <20181211192527.13254-1-ehabkost@redhat.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/cpu.c | 5 +++++
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target/i386/cpu.h | 3 +++
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2 files changed, 8 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index a44912c..c37cd1e 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -4826,6 +4826,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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if (cpu->host_phys_bits) {
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/* The user asked for us to use the host physical bits */
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cpu->phys_bits = host_phys_bits;
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+ if (cpu->host_phys_bits_limit &&
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+ cpu->phys_bits > cpu->host_phys_bits_limit) {
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+ cpu->phys_bits = cpu->host_phys_bits_limit;
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+ }
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}
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/* Print a warning if the user set it to a value that's not the
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@@ -5377,6 +5381,7 @@ static Property x86_cpu_properties[] = {
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DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
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DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0),
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DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false),
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+ DEFINE_PROP_UINT8("host-phys-bits-limit", X86CPU, host_phys_bits_limit, 0),
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DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true),
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DEFINE_PROP_UINT32("level", X86CPU, env.cpuid_level, UINT32_MAX),
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DEFINE_PROP_UINT32("xlevel", X86CPU, env.cpuid_xlevel, UINT32_MAX),
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 4a3ef4b..58d5430 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -1418,6 +1418,9 @@ struct X86CPU {
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/* if true override the phys_bits value with a value read from the host */
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bool host_phys_bits;
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+ /* if set, limit maximum value for phys_bits when host_phys_bits is true */
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+ uint8_t host_phys_bits_limit;
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+
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/* Stop SMI delivery for migration compatibility with old machines */
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bool kvm_no_smi_migration;
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--
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1.8.3.1
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