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From 7fa8107debfd4c659b77a8ba12b96144dfbdc113 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Mon, 4 Feb 2019 17:29:44 +0100
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Subject: [PATCH 1/3] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature
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RH-Author: plai@redhat.com
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Message-id: <1549301384-19698-1-git-send-email-plai@redhat.com>
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Patchwork-id: 84205
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O-Subject: [RHEL7.7 qemu-kvm PATCH BZ 1537773 RESEND] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature
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Bugzilla: 1537773
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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From: Jingqi Liu <jingqi.liu@intel.com>
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The CLDEMOTE instruction hints to hardware that the cache line that
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contains the linear address should be moved("demoted") from
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the cache(s) closest to the processor core to a level more distant
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from the processor core. This may accelerate subsequent accesses
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to the line by other cores in the same coherence domain,
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especially if the line was written by the core that demotes the line.
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Intel Snow Ridge has added new cpu feature, CLDEMOTE.
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The new cpu feature needs to be exposed to guest VM.
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The bit definition:
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CPUID.(EAX=7,ECX=0):ECX[bit 25] CLDEMOTE
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The release document ref below link:
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https://software.intel.com/sites/default/files/managed/c5/15/\
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architecture-instruction-set-extensions-programming-reference.pdf
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Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
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Message-Id: <1525406253-54846-1-git-send-email-jingqi.liu@intel.com>
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Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 0da0fb062841d0dcd8ba47e4a989d2e952cdf0ff)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Resolved Conflicts:
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target/i386/cpu.c [doesn't exist]
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changes made to target-i386/cpu.c
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target/i386/cpu.h [doesn't exist]
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changes made to target-i386/cpu.h
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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target-i386/cpu.c | 2 +-
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target-i386/cpu.h | 1 +
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2 files changed, 2 insertions(+), 1 deletion(-)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index a36483e..c9603df 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -162,7 +162,7 @@ static const char *cpuid_7_0_ecx_feature_name[] = {
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"avx512bitalg", NULL, "avx512-vpopcntdq", NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, "rdpid", NULL,
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- NULL, NULL, NULL, NULL,
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+ NULL, "cldemote", NULL, NULL,
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NULL, NULL, NULL, NULL,
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};
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index 73437f1..5d47ab8 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -593,6 +593,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_ECX_AVX512BITALG (1U << 12)
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#define CPUID_7_0_ECX_AVX512_VPOPCNTDQ (1U << 14) /* POPCNT for vectors of DW/QW */
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#define CPUID_7_0_ECX_RDPID (1U << 22)
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+#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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--
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1.8.3.1
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