thebeanogamer / rpms / qemu-kvm

Forked from rpms/qemu-kvm 5 months ago
Clone

Blame SOURCES/kvm-x86-add-support-for-KVM_CAP_XSAVE2-and-AMX-state-mig.patch

0727d3
From 28cf1b55f346a9f56e84fa57921f5a28a99cd59b Mon Sep 17 00:00:00 2001
0727d3
From: Jing Liu <jing2.liu@intel.com>
0727d3
Date: Wed, 16 Feb 2022 22:04:32 -0800
0727d3
Subject: [PATCH 10/24] x86: add support for KVM_CAP_XSAVE2 and AMX state
0727d3
 migration
0727d3
0727d3
RH-Author: Paul Lai <plai@redhat.com>
0727d3
RH-MergeRequest: 176: Enable KVM AMX support
0727d3
RH-Commit: [10/13] d584f455ba1ecd8a4a87f3470e6aac24ba9a1f5a
0727d3
RH-Bugzilla: 1916415
0727d3
RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
0727d3
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
0727d3
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
0727d3
0727d3
When dynamic xfeatures (e.g. AMX) are used by the guest, the xsave
0727d3
area would be larger than 4KB. KVM_GET_XSAVE2 and KVM_SET_XSAVE
0727d3
under KVM_CAP_XSAVE2 works with a xsave buffer larger than 4KB.
0727d3
Always use the new ioctls under KVM_CAP_XSAVE2 when KVM supports it.
0727d3
0727d3
Signed-off-by: Jing Liu <jing2.liu@intel.com>
0727d3
Signed-off-by: Zeng Guang <guang.zeng@intel.com>
0727d3
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
0727d3
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
0727d3
Message-Id: <20220217060434.52460-7-yang.zhong@intel.com>
0727d3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
0727d3
(cherry picked from commit e56dd3c70abb31893c61ac834109fa7a38841330)
0727d3
Signed-off-by: Paul Lai <plai@redhat.com>
0727d3
---
0727d3
 target/i386/cpu.h          |  4 ++++
0727d3
 target/i386/kvm/kvm.c      | 42 ++++++++++++++++++++++++--------------
0727d3
 target/i386/xsave_helper.c | 28 +++++++++++++++++++++++++
0727d3
 3 files changed, 59 insertions(+), 15 deletions(-)
0727d3
0727d3
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
0727d3
index f2bdef9c26..14a3501b87 100644
0727d3
--- a/target/i386/cpu.h
0727d3
+++ b/target/i386/cpu.h
0727d3
@@ -1522,6 +1522,10 @@ typedef struct CPUX86State {
0727d3
     uint64_t opmask_regs[NB_OPMASK_REGS];
0727d3
     YMMReg zmmh_regs[CPU_NB_REGS];
0727d3
     ZMMReg hi16_zmm_regs[CPU_NB_REGS];
0727d3
+#ifdef TARGET_X86_64
0727d3
+    uint8_t xtilecfg[64];
0727d3
+    uint8_t xtiledata[8192];
0727d3
+#endif
0727d3
 
0727d3
     /* sysenter registers */
0727d3
     uint32_t sysenter_cs;
0727d3
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
0727d3
index a64a79d870..d3d476df27 100644
0727d3
--- a/target/i386/kvm/kvm.c
0727d3
+++ b/target/i386/kvm/kvm.c
0727d3
@@ -123,6 +123,7 @@ static uint32_t num_architectural_pmu_gp_counters;
0727d3
 static uint32_t num_architectural_pmu_fixed_counters;
0727d3
 
0727d3
 static int has_xsave;
0727d3
+static int has_xsave2;
0727d3
 static int has_xcrs;
0727d3
 static int has_pit_state2;
0727d3
 static int has_exception_payload;
0727d3
@@ -1585,6 +1586,26 @@ static Error *invtsc_mig_blocker;
0727d3
 
0727d3
 #define KVM_MAX_CPUID_ENTRIES  100
0727d3
 
0727d3
+static void kvm_init_xsave(CPUX86State *env)
0727d3
+{
0727d3
+    if (has_xsave2) {
0727d3
+        env->xsave_buf_len = QEMU_ALIGN_UP(has_xsave2, 4096);
0727d3
+    } else if (has_xsave) {
0727d3
+        env->xsave_buf_len = sizeof(struct kvm_xsave);
0727d3
+    } else {
0727d3
+        return;
0727d3
+    }
0727d3
+
0727d3
+    env->xsave_buf = qemu_memalign(4096, env->xsave_buf_len);
0727d3
+    memset(env->xsave_buf, 0, env->xsave_buf_len);
0727d3
+    /*
0727d3
+     * The allocated storage must be large enough for all of the
0727d3
+     * possible XSAVE state components.
0727d3
+     */
0727d3
+    assert(kvm_arch_get_supported_cpuid(kvm_state, 0xd, 0, R_ECX) <=
0727d3
+           env->xsave_buf_len);
0727d3
+}
0727d3
+
0727d3
 int kvm_arch_init_vcpu(CPUState *cs)
0727d3
 {
0727d3
     struct {
0727d3
@@ -1614,6 +1635,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
0727d3
 
0727d3
     cpuid_i = 0;
0727d3
 
0727d3
+    has_xsave2 = kvm_check_extension(cs->kvm_state, KVM_CAP_XSAVE2);
0727d3
+
0727d3
     r = kvm_arch_set_tsc_khz(cs);
0727d3
     if (r < 0) {
0727d3
         return r;
0727d3
@@ -2003,19 +2026,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
0727d3
     if (r) {
0727d3
         goto fail;
0727d3
     }
0727d3
-
0727d3
-    if (has_xsave) {
0727d3
-        env->xsave_buf_len = sizeof(struct kvm_xsave);
0727d3
-        env->xsave_buf = qemu_memalign(4096, env->xsave_buf_len);
0727d3
-        memset(env->xsave_buf, 0, env->xsave_buf_len);
0727d3
-
0727d3
-        /*
0727d3
-         * The allocated storage must be large enough for all of the
0727d3
-         * possible XSAVE state components.
0727d3
-         */
0727d3
-        assert(kvm_arch_get_supported_cpuid(kvm_state, 0xd, 0, R_ECX)
0727d3
-               <= env->xsave_buf_len);
0727d3
-    }
0727d3
+    kvm_init_xsave(env);
0727d3
 
0727d3
     max_nested_state_len = kvm_max_nested_state_length();
0727d3
     if (max_nested_state_len > 0) {
0727d3
@@ -3263,13 +3274,14 @@ static int kvm_get_xsave(X86CPU *cpu)
0727d3
 {
0727d3
     CPUX86State *env = &cpu->env;
0727d3
     void *xsave = env->xsave_buf;
0727d3
-    int ret;
0727d3
+    int type, ret;
0727d3
 
0727d3
     if (!has_xsave) {
0727d3
         return kvm_get_fpu(cpu);
0727d3
     }
0727d3
 
0727d3
-    ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XSAVE, xsave);
0727d3
+    type = has_xsave2 ? KVM_GET_XSAVE2 : KVM_GET_XSAVE;
0727d3
+    ret = kvm_vcpu_ioctl(CPU(cpu), type, xsave);
0727d3
     if (ret < 0) {
0727d3
         return ret;
0727d3
     }
0727d3
diff --git a/target/i386/xsave_helper.c b/target/i386/xsave_helper.c
0727d3
index ac61a96344..996e9f3bfe 100644
0727d3
--- a/target/i386/xsave_helper.c
0727d3
+++ b/target/i386/xsave_helper.c
0727d3
@@ -126,6 +126,20 @@ void x86_cpu_xsave_all_areas(X86CPU *cpu, void *buf, uint32_t buflen)
0727d3
 
0727d3
         memcpy(pkru, &env->pkru, sizeof(env->pkru));
0727d3
     }
0727d3
+
0727d3
+    e = &x86_ext_save_areas[XSTATE_XTILE_CFG_BIT];
0727d3
+    if (e->size && e->offset) {
0727d3
+        XSaveXTILECFG *tilecfg = buf + e->offset;
0727d3
+
0727d3
+        memcpy(tilecfg, &env->xtilecfg, sizeof(env->xtilecfg));
0727d3
+    }
0727d3
+
0727d3
+    e = &x86_ext_save_areas[XSTATE_XTILE_DATA_BIT];
0727d3
+    if (e->size && e->offset && buflen >= e->size + e->offset) {
0727d3
+        XSaveXTILEDATA *tiledata = buf + e->offset;
0727d3
+
0727d3
+        memcpy(tiledata, &env->xtiledata, sizeof(env->xtiledata));
0727d3
+    }
0727d3
 #endif
0727d3
 }
0727d3
 
0727d3
@@ -247,5 +261,19 @@ void x86_cpu_xrstor_all_areas(X86CPU *cpu, const void *buf, uint32_t buflen)
0727d3
         pkru = buf + e->offset;
0727d3
         memcpy(&env->pkru, pkru, sizeof(env->pkru));
0727d3
     }
0727d3
+
0727d3
+    e = &x86_ext_save_areas[XSTATE_XTILE_CFG_BIT];
0727d3
+    if (e->size && e->offset) {
0727d3
+        const XSaveXTILECFG *tilecfg = buf + e->offset;
0727d3
+
0727d3
+        memcpy(&env->xtilecfg, tilecfg, sizeof(env->xtilecfg));
0727d3
+    }
0727d3
+
0727d3
+    e = &x86_ext_save_areas[XSTATE_XTILE_DATA_BIT];
0727d3
+    if (e->size && e->offset && buflen >= e->size + e->offset) {
0727d3
+        const XSaveXTILEDATA *tiledata = buf + e->offset;
0727d3
+
0727d3
+        memcpy(&env->xtiledata, tiledata, sizeof(env->xtiledata));
0727d3
+    }
0727d3
 #endif
0727d3
 }
0727d3
-- 
0727d3
2.35.3
0727d3