From 7b43b5139f8e919203d3ed20fbba6cb143fde6d7 Mon Sep 17 00:00:00 2001

From: Eduardo Habkost <ehabkost@redhat.com>

Date: Thu, 23 Feb 2017 14:29:32 +0100

Subject: [PATCH 02/17] x86: add AVX512_4VNNIW and AVX512_4FMAPS features

RH-Author: Eduardo Habkost <ehabkost@redhat.com>

Message-id: <20170223142945.17790-2-ehabkost@redhat.com>

Patchwork-id: 74033

O-Subject: [RHEL-7.4 qemu-kvm PATCH v2 01/14] x86: add AVX512_4VNNIW and AVX512_4FMAPS features

Bugzilla: 1382122

RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>

RH-Acked-by: Igor Mammedov <imammedo@redhat.com>

RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>

From: Luwei Kang <luwei.kang@intel.com>

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1382122

The spec can be found in Intel Software Developer Manual or in

Instruction Set Extensions Programming Reference.

Backport notes:

Changes v1 -> v2:

* Fixed build error, moved feat_names to a separate static array

  variable

* Fixed backport mistakes (I had forgotten to add

  features[FEAT_7_0_EDX] initialization and filtering code)

Signed-off-by: Piotr Luc <piotr.luc@intel.com>

Signed-off-by: Luwei Kang <luwei.kang@intel.com>

Message-Id: <1477902446-5932-1-git-send-email-he.chen@linux.intel.com>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

(cherry picked from commit 95ea69fb46266aaa46d0c8b7f0ba8c4903dbe4e3)

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>

---

 target-i386/cpu.c | 31 ++++++++++++++++++++++++++++++-

 target-i386/cpu.h |  4 ++++

 2 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c

index c3c8306..789e687 100644

--- a/target-i386/cpu.c

+++ b/target-i386/cpu.c

@@ -165,6 +165,17 @@ static const char *cpuid_7_0_ecx_feature_name[] = {

     NULL, NULL, NULL, NULL,

 };

+static const char *cpuid_7_0_edx_feature_name[] = {

+    NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+    NULL, NULL, NULL, NULL,

+};

+

 static const char *cpuid_xsave_feature_name[] = {

     "xsaveopt", "xsavec", "xgetbv1", NULL,

     NULL, NULL, NULL, NULL,

@@ -225,6 +236,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {

         .cpuid_needs_ecx = true, .cpuid_ecx = 0,

         .cpuid_reg = R_ECX,

     },

+    [FEAT_7_0_EDX] = {

+        .feat_names = cpuid_7_0_edx_feature_name,

+        .cpuid_eax = 7,

+        .cpuid_needs_ecx = true, .cpuid_ecx = 0,

+        .cpuid_reg = R_EDX,

+    },

     [FEAT_XSAVE] = {

         .feat_names = cpuid_xsave_feature_name,

         .cpuid_eax = 0xd,

@@ -484,6 +501,7 @@ typedef struct x86_def_t {

           CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,

           CPUID_7_0_EBX_RDSEED */

 #define TCG_7_0_ECX_FEATURES 0

+#define TCG_7_0_EDX_FEATURES 0

 /* built-in CPU model definitions

  */

@@ -1254,9 +1272,12 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)

                     kvm_arch_get_supported_cpuid(s, 0x7, 0, R_EBX);

         x86_cpu_def->features[FEAT_7_0_ECX] =

                     kvm_arch_get_supported_cpuid(s, 0x7, 0, R_ECX);

+        x86_cpu_def->features[FEAT_7_0_EDX] =

+                    kvm_arch_get_supported_cpuid(s, 0x7, 0, R_EDX);

     } else {

         x86_cpu_def->features[FEAT_7_0_EBX] = 0;

         x86_cpu_def->features[FEAT_7_0_ECX] = 0;

+        x86_cpu_def->features[FEAT_7_0_EDX] = 0;

     }

     x86_cpu_def->features[FEAT_XSAVE] =

                 kvm_arch_get_supported_cpuid(s, 0xd, 1, R_EAX);

@@ -1343,6 +1364,9 @@ static int kvm_check_features_against_host(X86CPU *cpu)

         {&env->features[FEAT_7_0_ECX],

             &host_def.features[FEAT_7_0_ECX],

             FEAT_7_0_ECX },

+        {&env->features[FEAT_7_0_EDX],

+            &host_def.features[FEAT_7_0_EDX],

+            FEAT_7_0_EDX },

         {&env->features[FEAT_XSAVE],

             &host_def.features[FEAT_XSAVE],

             FEAT_XSAVE },

@@ -1885,6 +1909,7 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char *features, Error **errp)

     env->features[FEAT_SVM] |= plus_features[FEAT_SVM];

     env->features[FEAT_7_0_EBX] |= plus_features[FEAT_7_0_EBX];

     env->features[FEAT_7_0_ECX] |= plus_features[FEAT_7_0_ECX];

+    env->features[FEAT_7_0_EDX] |= plus_features[FEAT_7_0_EDX];

     env->features[FEAT_XSAVE] |= plus_features[FEAT_XSAVE];

     env->features[FEAT_1_EDX] &= ~minus_features[FEAT_1_EDX];

     env->features[FEAT_1_ECX] &= ~minus_features[FEAT_1_ECX];

@@ -1895,6 +1920,7 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char *features, Error **errp)

     env->features[FEAT_SVM] &= ~minus_features[FEAT_SVM];

     env->features[FEAT_7_0_EBX] &= ~minus_features[FEAT_7_0_EBX];

     env->features[FEAT_7_0_ECX] &= ~minus_features[FEAT_7_0_ECX];

+    env->features[FEAT_7_0_EDX] &= ~minus_features[FEAT_7_0_EDX];

     env->features[FEAT_XSAVE] &= ~minus_features[FEAT_XSAVE];

 out:

@@ -2032,6 +2058,7 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)

     env->features[FEAT_C000_0001_EDX] = def->features[FEAT_C000_0001_EDX];

     env->features[FEAT_7_0_EBX] = def->features[FEAT_7_0_EBX];

     env->features[FEAT_7_0_ECX] = def->features[FEAT_7_0_ECX];

+    env->features[FEAT_7_0_EDX] = def->features[FEAT_7_0_EDX];

     env->features[FEAT_XSAVE] = def->features[FEAT_XSAVE];

     env->cpuid_xlevel2 = def->xlevel2;

@@ -2270,7 +2297,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,

             *eax = 0; /* Maximum ECX value for sub-leaves */

             *ebx = env->features[FEAT_7_0_EBX]; /* Feature flags */

             *ecx = env->features[FEAT_7_0_ECX]; /* Feature flags */

-            *edx = 0; /* Reserved */

+            *edx = env->features[FEAT_7_0_EDX]; /* Feature flags */

         } else {

             *eax = 0;

             *ebx = 0;

@@ -2680,6 +2707,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

         env->features[FEAT_8000_0001_ECX] &= TCG_EXT3_FEATURES;

         env->features[FEAT_SVM] &= TCG_SVM_FEATURES;

         env->features[FEAT_XSAVE] = 0;

+        env->features[FEAT_7_0_ECX] &= TCG_7_0_ECX_FEATURES;

+        env->features[FEAT_7_0_EDX] &= TCG_7_0_EDX_FEATURES;

     } else {

         if ((cpu->check_cpuid || cpu->enforce_cpuid)

             && kvm_check_features_against_host(cpu) && cpu->enforce_cpuid) {

diff --git a/target-i386/cpu.h b/target-i386/cpu.h

index d541809..eec5c49 100644

--- a/target-i386/cpu.h

+++ b/target-i386/cpu.h

@@ -401,6 +401,7 @@ typedef enum FeatureWord {

     FEAT_1_ECX,         /* CPUID[1].ECX */

     FEAT_7_0_EBX,       /* CPUID[EAX=7,ECX=0].EBX */

     FEAT_7_0_ECX,       /* CPUID[EAX=7,ECX=0].ECX */

+    FEAT_7_0_EDX,       /* CPUID[EAX=7,ECX=0].EDX */

     FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */

     FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */

     FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */

@@ -580,6 +581,9 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];

 #define CPUID_7_0_ECX_OSPKE    (1U << 4)

 #define CPUID_7_0_ECX_RDPID    (1U << 22)

+#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */

+#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */

+

 #define CPUID_XSAVE_XSAVEOPT   (1U << 0)

 #define CPUID_XSAVE_XSAVEC     (1U << 1)

 #define CPUID_XSAVE_XGETBV1    (1U << 2)

-- 

1.8.3.1