|
 |
218e99 |
From bd32da91efdbcccaeb7eb2ad06f3c87946fce903 Mon Sep 17 00:00:00 2001
|
|
|
218e99 |
From: Alex Williamson <alex.williamson@redhat.com>
|
|
|
218e99 |
Date: Tue, 5 Nov 2013 15:37:29 +0100
|
|
|
218e99 |
Subject: [PATCH 13/25] vfio-pci: Test device reset capabilities
|
|
|
218e99 |
|
|
|
218e99 |
RH-Author: Alex Williamson <alex.williamson@redhat.com>
|
|
|
218e99 |
Message-id: <20131105153729.16057.85790.stgit@bling.home>
|
|
|
218e99 |
Patchwork-id: 55422
|
|
|
218e99 |
O-Subject: [RHEL7 qemu-kvm PATCH 1/5] vfio-pci: Test device reset capabilities
|
|
|
218e99 |
Bugzilla: 1026550
|
|
|
218e99 |
RH-Acked-by: Bandan Das <bsd@redhat.com>
|
|
|
218e99 |
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
218e99 |
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
|
|
|
218e99 |
RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
218e99 |
|
|
|
218e99 |
Bugzilla: 1026550
|
|
|
218e99 |
Upstream commit: befe5176ef7a0004ba23517c97c804e292273635
|
|
|
218e99 |
|
|
|
218e99 |
Not all resets are created equal. PM reset is not very reliable,
|
|
|
218e99 |
especially for GPUs, so we might want to opt for a bus reset if a
|
|
|
218e99 |
standard reset will only do a D3hot->D0 transition. We can also
|
|
|
218e99 |
use this to tell if the standard reset will do a bus reset (if
|
|
|
218e99 |
neither has_pm_reset or has_flr is probed, but the device still
|
|
|
218e99 |
supports reset).
|
|
|
218e99 |
|
|
|
218e99 |
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
|
|
|
218e99 |
---
|
|
|
218e99 |
hw/misc/vfio.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
|
|
|
218e99 |
1 file changed, 46 insertions(+)
|
|
|
218e99 |
|
|
|
218e99 |
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
|
|
|
218e99 |
---
|
|
|
218e99 |
hw/misc/vfio.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
|
|
|
218e99 |
1 files changed, 46 insertions(+), 0 deletions(-)
|
|
|
218e99 |
|
|
|
218e99 |
diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
|
|
|
218e99 |
index 286dad1..8e69182 100644
|
|
|
218e99 |
--- a/hw/misc/vfio.c
|
|
|
218e99 |
+++ b/hw/misc/vfio.c
|
|
|
218e99 |
@@ -185,6 +185,8 @@ typedef struct VFIODevice {
|
|
|
218e99 |
bool reset_works;
|
|
|
218e99 |
bool has_vga;
|
|
|
218e99 |
bool pci_aer;
|
|
|
218e99 |
+ bool has_flr;
|
|
|
218e99 |
+ bool has_pm_reset;
|
|
|
218e99 |
} VFIODevice;
|
|
|
218e99 |
|
|
|
218e99 |
typedef struct VFIOGroup {
|
|
|
218e99 |
@@ -2508,6 +2510,42 @@ static int vfio_setup_pcie_cap(VFIODevice *vdev, int pos, uint8_t size)
|
|
|
218e99 |
return pos;
|
|
|
218e99 |
}
|
|
|
218e99 |
|
|
|
218e99 |
+static void vfio_check_pcie_flr(VFIODevice *vdev, uint8_t pos)
|
|
|
218e99 |
+{
|
|
|
218e99 |
+ uint32_t cap = pci_get_long(vdev->pdev.config + pos + PCI_EXP_DEVCAP);
|
|
|
218e99 |
+
|
|
|
218e99 |
+ if (cap & PCI_EXP_DEVCAP_FLR) {
|
|
|
218e99 |
+ DPRINTF("%04x:%02x:%02x.%x Supports FLR via PCIe cap\n",
|
|
|
218e99 |
+ vdev->host.domain, vdev->host.bus, vdev->host.slot,
|
|
|
218e99 |
+ vdev->host.function);
|
|
|
218e99 |
+ vdev->has_flr = true;
|
|
|
218e99 |
+ }
|
|
|
218e99 |
+}
|
|
|
218e99 |
+
|
|
|
218e99 |
+static void vfio_check_pm_reset(VFIODevice *vdev, uint8_t pos)
|
|
|
218e99 |
+{
|
|
|
218e99 |
+ uint16_t csr = pci_get_word(vdev->pdev.config + pos + PCI_PM_CTRL);
|
|
|
218e99 |
+
|
|
|
218e99 |
+ if (!(csr & PCI_PM_CTRL_NO_SOFT_RESET)) {
|
|
|
218e99 |
+ DPRINTF("%04x:%02x:%02x.%x Supports PM reset\n",
|
|
|
218e99 |
+ vdev->host.domain, vdev->host.bus, vdev->host.slot,
|
|
|
218e99 |
+ vdev->host.function);
|
|
|
218e99 |
+ vdev->has_pm_reset = true;
|
|
|
218e99 |
+ }
|
|
|
218e99 |
+}
|
|
|
218e99 |
+
|
|
|
218e99 |
+static void vfio_check_af_flr(VFIODevice *vdev, uint8_t pos)
|
|
|
218e99 |
+{
|
|
|
218e99 |
+ uint8_t cap = pci_get_byte(vdev->pdev.config + pos + PCI_AF_CAP);
|
|
|
218e99 |
+
|
|
|
218e99 |
+ if ((cap & PCI_AF_CAP_TP) && (cap & PCI_AF_CAP_FLR)) {
|
|
|
218e99 |
+ DPRINTF("%04x:%02x:%02x.%x Supports FLR via AF cap\n",
|
|
|
218e99 |
+ vdev->host.domain, vdev->host.bus, vdev->host.slot,
|
|
|
218e99 |
+ vdev->host.function);
|
|
|
218e99 |
+ vdev->has_flr = true;
|
|
|
218e99 |
+ }
|
|
|
218e99 |
+}
|
|
|
218e99 |
+
|
|
|
218e99 |
static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
|
|
|
218e99 |
{
|
|
|
218e99 |
PCIDevice *pdev = &vdev->pdev;
|
|
|
218e99 |
@@ -2552,13 +2590,21 @@ static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
|
|
|
218e99 |
ret = vfio_setup_msi(vdev, pos);
|
|
|
218e99 |
break;
|
|
|
218e99 |
case PCI_CAP_ID_EXP:
|
|
|
218e99 |
+ vfio_check_pcie_flr(vdev, pos);
|
|
|
218e99 |
ret = vfio_setup_pcie_cap(vdev, pos, size);
|
|
|
218e99 |
break;
|
|
|
218e99 |
case PCI_CAP_ID_MSIX:
|
|
|
218e99 |
ret = vfio_setup_msix(vdev, pos);
|
|
|
218e99 |
break;
|
|
|
218e99 |
case PCI_CAP_ID_PM:
|
|
|
218e99 |
+ vfio_check_pm_reset(vdev, pos);
|
|
|
218e99 |
vdev->pm_cap = pos;
|
|
|
218e99 |
+ ret = pci_add_capability(pdev, cap_id, pos, size);
|
|
|
218e99 |
+ break;
|
|
|
218e99 |
+ case PCI_CAP_ID_AF:
|
|
|
218e99 |
+ vfio_check_af_flr(vdev, pos);
|
|
|
218e99 |
+ ret = pci_add_capability(pdev, cap_id, pos, size);
|
|
|
218e99 |
+ break;
|
|
|
218e99 |
default:
|
|
|
218e99 |
ret = pci_add_capability(pdev, cap_id, pos, size);
|
|
|
218e99 |
break;
|
|
|
218e99 |
--
|
|
|
218e99 |
1.7.1
|
|
|
218e99 |
|