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Blame SOURCES/kvm-serial-reset-thri_pending-on-IER-writes-with-THRI-0.patch

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From 09ff2706109ce647d1fe59e99f44f96810d80b7c Mon Sep 17 00:00:00 2001
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From: Fam Zheng <famz@redhat.com>
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Date: Thu, 18 May 2017 09:21:24 +0200
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Subject: [PATCH 11/18] serial: reset thri_pending on IER writes with THRI=0
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RH-Author: Fam Zheng <famz@redhat.com>
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Message-id: <20170518092131.16571-12-famz@redhat.com>
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Patchwork-id: 75302
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O-Subject: [RHEL-7.4 qemu-kvm PATCH v3 11/18] serial: reset thri_pending on IER writes with THRI=0
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Bugzilla: 1451470
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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From: Paolo Bonzini <pbonzini@redhat.com>
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This is responsible for failure of migration from 2.2 to 2.1, because
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thr_ipending is always one in practice.
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serial.c is setting thr_ipending unconditionally.  However, thr_ipending
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is not used at all if THRI=0, and it will be overwritten again the next
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time THRE or THRI changes.  For that reason, we can set thr_ipending to
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zero every time THRI is reset.
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There is disagreement on whether LSR.THRE should be resampled when IER.THRI
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goes from 1 to 1.  This patch does not touch the code, leaving that for
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QEMU 2.3+.
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This has no semantic change and is enough to fix migration in the common
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case where the interrupt is not pending or is reported in IIR.  It does not
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change the migration format, so 2.2.0 -> 2.1 will remain broken but we
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can fix 2.2.1 -> 2.1 without breaking 2.2.1 <-> 2.2.0.
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The case that remains broken (the one in which the subsection is strictly
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necessary) is when THRE=1, the THRI interrupt has *not* been acknowledged
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yet, and a higher-priority interrupt comes.  In this case, you need the
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subsection to tell the source that the lower-priority THRI interrupt is
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pending.  The subsection's breakage of migration, in this case, prevents
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continuing the VM on the destination with an invalid state.
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Cc: qemu-stable@nongnu.org
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Reported-by: Igor Mammedov <imammedo@redhat.com>
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Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 4e02b0fcf5c97579d0d3261c80c65abcf92870fe)
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Signed-off-by: Fam Zheng <famz@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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 hw/char/serial.c | 18 ++++++++++++++++--
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 1 file changed, 16 insertions(+), 2 deletions(-)
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diff --git a/hw/char/serial.c b/hw/char/serial.c
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index 5ef9b95..15c628f 100644
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--- a/hw/char/serial.c
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+++ b/hw/char/serial.c
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@@ -320,10 +320,24 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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                      s->poll_msl = 0;
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                 }
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             }
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-            if (s->lsr & UART_LSR_THRE) {
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+
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+            /* Turning on the THRE interrupt on IER can trigger the interrupt
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+             * if LSR.THRE=1, even if it had been masked before by reading IIR.
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+             * This is not in the datasheet, but Windows relies on it.  It is
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+             * unclear if THRE has to be resampled every time THRI becomes
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+             * 1, or only on the rising edge.  Bochs does the latter, and Windows
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+             * always toggles IER to all zeroes and back to all ones.  But for
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+             * now leave it as it has always been in QEMU.
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+             *
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+             * If IER.THRI is zero, thr_ipending is not used.  Set it to zero
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+             * so that the thr_ipending subsection is not migrated.
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+             */
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+            if ((s->ier & UART_IER_THRI) && (s->lsr & UART_LSR_THRE)) {
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                 s->thr_ipending = 1;
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-                serial_update_irq(s);
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+            } else {
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+                s->thr_ipending = 0;
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             }
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+            serial_update_irq(s);
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         }
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         break;
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     case 2:
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-- 
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1.8.3.1
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