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From 5d7481d76a57e533f521a5d99ba8d35b5d69625c Mon Sep 17 00:00:00 2001
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Message-Id: <5d7481d76a57e533f521a5d99ba8d35b5d69625c.1387382496.git.minovotn@redhat.com>
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In-Reply-To: <c5386144fbf09f628148101bc674e2421cdd16e3.1387382496.git.minovotn@redhat.com>
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References: <c5386144fbf09f628148101bc674e2421cdd16e3.1387382496.git.minovotn@redhat.com>
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From: Nigel Croxon <ncroxon@redhat.com>
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Date: Thu, 14 Nov 2013 22:52:51 +0100
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Subject: [PATCH 15/46] rdma: core logic
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RH-Author: Nigel Croxon <ncroxon@redhat.com>
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Message-id: <1384469598-13137-16-git-send-email-ncroxon@redhat.com>
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Patchwork-id: 55697
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O-Subject: [RHEL7.0 PATCH 15/42] rdma: core logic
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Bugzilla: 1011720
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RH-Acked-by: Orit Wasserman <owasserm@redhat.com>
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RH-Acked-by: Amit Shah <amit.shah@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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Bugzilla: 1011720
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https://bugzilla.redhat.com/show_bug.cgi?id=1011720
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>From commit ID:
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commit 2da776db4846eadcb808598a5d3484d149773c05
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Author: Michael R. Hines <mrhines@us.ibm.com>
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Date: Mon Jul 22 10:01:54 2013 -0400
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rdma: core logic
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Code that does need to be visible is kept
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well contained inside this file and this is the only
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new additional file to the entire patch.
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This file includes the entire protocol and interfaces
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required to perform RDMA migration.
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Also, the configure and Makefile modifications to link
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this file are included.
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Full documentation is in docs/rdma.txt
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Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
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Reviewed-by: Chegu Vinod <chegu_vinod@hp.com>
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Tested-by: Chegu Vinod <chegu_vinod@hp.com>
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Tested-by: Michael R. Hines <mrhines@us.ibm.com>
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Signed-off-by: Michael R. Hines <mrhines@us.ibm.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
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---
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Makefile.objs | 1 +
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configure | 40 +
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include/migration/migration.h | 4 +
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migration-rdma.c | 3249 +++++++++++++++++++++++++++++++++++++++++
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migration.c | 8 +
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5 files changed, 3302 insertions(+), 0 deletions(-)
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create mode 100644 migration-rdma.c
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Signed-off-by: Michal Novotny <minovotn@redhat.com>
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---
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Makefile.objs | 1 +
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configure | 40 +
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include/migration/migration.h | 4 +
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migration-rdma.c | 3249 +++++++++++++++++++++++++++++++++++++++++
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migration.c | 8 +
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5 files changed, 3302 insertions(+)
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create mode 100644 migration-rdma.c
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diff --git a/Makefile.objs b/Makefile.objs
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index 286ce06..67b4a28 100644
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--- a/Makefile.objs
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+++ b/Makefile.objs
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@@ -50,6 +50,7 @@ common-obj-$(CONFIG_POSIX) += os-posix.o
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common-obj-$(CONFIG_LINUX) += fsdev/
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common-obj-y += migration.o migration-tcp.o
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+common-obj-$(CONFIG_RDMA) += migration-rdma.o
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common-obj-y += qemu-char.o #aio.o
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common-obj-y += block-migration.o
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common-obj-y += page_cache.o xbzrle.o
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diff --git a/configure b/configure
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index 0a729ac..33235c4 100755
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--- a/configure
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+++ b/configure
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@@ -181,6 +181,7 @@ xfs=""
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vhost_net="no"
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vhost_scsi="no"
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kvm="no"
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+rdma=""
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gprof="no"
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debug_tcg="no"
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debug="no"
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@@ -925,6 +926,10 @@ for opt do
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;;
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--enable-gtk) gtk="yes"
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;;
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+ --enable-rdma) rdma="yes"
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+ ;;
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+ --disable-rdma) rdma="no"
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+ ;;
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--with-gtkabi=*) gtkabi="$optarg"
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;;
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--enable-tpm) tpm="yes"
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@@ -1151,6 +1156,8 @@ echo " --enable-bluez enable bluez stack connectivity"
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echo " --disable-slirp disable SLIRP userspace network connectivity"
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echo " --disable-kvm disable KVM acceleration support"
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echo " --enable-kvm enable KVM acceleration support"
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+echo " --disable-rdma disable RDMA-based migration support"
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+echo " --enable-rdma enable RDMA-based migration support"
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echo " --enable-tcg-interpreter enable TCG with bytecode interpreter (TCI)"
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echo " --disable-nptl disable usermode NPTL support"
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9ae3a8 |
echo " --enable-nptl enable usermode NPTL support"
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@@ -1846,6 +1853,30 @@ EOF
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fi
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##########################################
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+# RDMA needs OpenFabrics libraries
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+if test "$rdma" != "no" ; then
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+ cat > $TMPC <
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+#include <rdma/rdma_cma.h>
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+int main(void) { return 0; }
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+EOF
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+ rdma_libs="-lrdmacm -libverbs"
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+ if compile_prog "" "$rdma_libs" ; then
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+ rdma="yes"
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+ libs_softmmu="$libs_softmmu $rdma_libs"
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+ else
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9ae3a8 |
+ if test "$rdma" = "yes" ; then
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+ error_exit \
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+ " OpenFabrics librdmacm/libibverbs not present." \
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+ " Your options:" \
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+ " (1) Fast: Install infiniband packages from your distro." \
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+ " (2) Cleanest: Install libraries from www.openfabrics.org" \
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+ " (3) Also: Install softiwarp if you don't have RDMA hardware"
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+ fi
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+ rdma="no"
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+ fi
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+fi
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+
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+##########################################
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9ae3a8 |
# VNC TLS/WS detection
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if test "$vnc" = "yes" -a \( "$vnc_tls" != "no" -o "$vnc_ws" != "no" \) ; then
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cat > $TMPC <
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9ae3a8 |
@@ -3550,6 +3581,7 @@ echo "Linux AIO support $linux_aio"
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echo "ATTR/XATTR support $attr"
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echo "Install blobs $blobs"
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echo "KVM support $kvm"
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+echo "RDMA support $rdma"
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echo "TCG interpreter $tcg_interpreter"
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echo "fdt support $fdt"
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echo "preadv support $preadv"
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9ae3a8 |
@@ -4032,6 +4064,10 @@ if test "$trace_default" = "yes"; then
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echo "CONFIG_TRACE_DEFAULT=y" >> $config_host_mak
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fi
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+if test "$rdma" = "yes" ; then
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+ echo "CONFIG_RDMA=y" >> $config_host_mak
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+fi
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+
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if test "$tcg_interpreter" = "yes"; then
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9ae3a8 |
QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/tci $QEMU_INCLUDES"
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elif test "$ARCH" = "sparc64" ; then
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9ae3a8 |
@@ -4506,6 +4542,10 @@ if [ "$pixman" = "internal" ]; then
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echo "config-host.h: subdir-pixman" >> $config_host_mak
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fi
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9ae3a8 |
+if test "$rdma" = "yes" ; then
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+echo "CONFIG_RDMA=y" >> $config_host_mak
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+fi
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+
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if [ "$dtc_internal" = "yes" ]; then
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echo "config-host.h: subdir-dtc" >> $config_host_mak
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fi
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diff --git a/include/migration/migration.h b/include/migration/migration.h
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index 90b5021..13a9629 100644
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--- a/include/migration/migration.h
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+++ b/include/migration/migration.h
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@@ -77,6 +77,10 @@ void fd_start_incoming_migration(const char *path, Error **errp);
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void fd_start_outgoing_migration(MigrationState *s, const char *fdname, Error **errp);
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+void rdma_start_outgoing_migration(void *opaque, const char *host_port, Error **errp);
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+
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+void rdma_start_incoming_migration(const char *host_port, Error **errp);
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+
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void migrate_fd_error(MigrationState *s);
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void migrate_fd_connect(MigrationState *s);
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diff --git a/migration-rdma.c b/migration-rdma.c
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new file mode 100644
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index 0000000..d044830
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--- /dev/null
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+++ b/migration-rdma.c
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@@ -0,0 +1,3249 @@
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+/*
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+ * RDMA protocol and interfaces
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+ *
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+ * Copyright IBM, Corp. 2010-2013
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+ *
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+ * Authors:
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+ * Michael R. Hines <mrhines@us.ibm.com>
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+ * Jiuxing Liu <jl@us.ibm.com>
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+ *
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+ * This work is licensed under the terms of the GNU GPL, version 2 or
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+ * later. See the COPYING file in the top-level directory.
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+ *
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+ */
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+#include "qemu-common.h"
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+#include "migration/migration.h"
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+#include "migration/qemu-file.h"
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+#include "exec/cpu-common.h"
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+#include "qemu/main-loop.h"
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+#include "qemu/sockets.h"
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+#include "qemu/bitmap.h"
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+#include "block/coroutine.h"
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+#include <stdio.h>
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+#include <sys/types.h>
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+#include <sys/socket.h>
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+#include <netdb.h>
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+#include <arpa/inet.h>
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+#include <string.h>
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+#include <rdma/rdma_cma.h>
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+
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+#define DEBUG_RDMA
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9ae3a8 |
+//#define DEBUG_RDMA_VERBOSE
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+//#define DEBUG_RDMA_REALLY_VERBOSE
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+
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+#ifdef DEBUG_RDMA
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+#define DPRINTF(fmt, ...) \
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+ do { printf("rdma: " fmt, ## __VA_ARGS__); } while (0)
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+#else
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+#define DPRINTF(fmt, ...) \
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+ do { } while (0)
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+#endif
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+
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+#ifdef DEBUG_RDMA_VERBOSE
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+#define DDPRINTF(fmt, ...) \
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+ do { printf("rdma: " fmt, ## __VA_ARGS__); } while (0)
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9ae3a8 |
+#else
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9ae3a8 |
+#define DDPRINTF(fmt, ...) \
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+ do { } while (0)
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9ae3a8 |
+#endif
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+
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9ae3a8 |
+#ifdef DEBUG_RDMA_REALLY_VERBOSE
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+#define DDDPRINTF(fmt, ...) \
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9ae3a8 |
+ do { printf("rdma: " fmt, ## __VA_ARGS__); } while (0)
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9ae3a8 |
+#else
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9ae3a8 |
+#define DDDPRINTF(fmt, ...) \
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+ do { } while (0)
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9ae3a8 |
+#endif
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+
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9ae3a8 |
+/*
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+ * Print and error on both the Monitor and the Log file.
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9ae3a8 |
+ */
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9ae3a8 |
+#define ERROR(errp, fmt, ...) \
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9ae3a8 |
+ do { \
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9ae3a8 |
+ fprintf(stderr, "RDMA ERROR: " fmt, ## __VA_ARGS__); \
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9ae3a8 |
+ if (errp && (*(errp) == NULL)) { \
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9ae3a8 |
+ error_setg(errp, "RDMA ERROR: " fmt, ## __VA_ARGS__); \
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9ae3a8 |
+ } \
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9ae3a8 |
+ } while (0)
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9ae3a8 |
+
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9ae3a8 |
+#define RDMA_RESOLVE_TIMEOUT_MS 10000
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9ae3a8 |
+
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9ae3a8 |
+/* Do not merge data if larger than this. */
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9ae3a8 |
+#define RDMA_MERGE_MAX (2 * 1024 * 1024)
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9ae3a8 |
+#define RDMA_SIGNALED_SEND_MAX (RDMA_MERGE_MAX / 4096)
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9ae3a8 |
+
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9ae3a8 |
+#define RDMA_REG_CHUNK_SHIFT 20 /* 1 MB */
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9ae3a8 |
+
|
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9ae3a8 |
+/*
|
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9ae3a8 |
+ * This is only for non-live state being migrated.
|
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|
9ae3a8 |
+ * Instead of RDMA_WRITE messages, we use RDMA_SEND
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9ae3a8 |
+ * messages for that state, which requires a different
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9ae3a8 |
+ * delivery design than main memory.
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9ae3a8 |
+ */
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|
9ae3a8 |
+#define RDMA_SEND_INCREMENT 32768
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9ae3a8 |
+
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|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Maximum size infiniband SEND message
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+#define RDMA_CONTROL_MAX_BUFFER (512 * 1024)
|
|
|
9ae3a8 |
+#define RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE 4096
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+#define RDMA_CONTROL_VERSION_CURRENT 1
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Capabilities for negotiation.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+#define RDMA_CAPABILITY_PIN_ALL 0x01
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Add the other flags above to this list of known capabilities
|
|
|
9ae3a8 |
+ * as they are introduced.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static uint32_t known_capabilities = RDMA_CAPABILITY_PIN_ALL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+#define CHECK_ERROR_STATE() \
|
|
|
9ae3a8 |
+ do { \
|
|
|
9ae3a8 |
+ if (rdma->error_state) { \
|
|
|
9ae3a8 |
+ if (!rdma->error_reported) { \
|
|
|
9ae3a8 |
+ fprintf(stderr, "RDMA is in an error state waiting migration" \
|
|
|
9ae3a8 |
+ " to abort!\n"); \
|
|
|
9ae3a8 |
+ rdma->error_reported = 1; \
|
|
|
9ae3a8 |
+ } \
|
|
|
9ae3a8 |
+ return rdma->error_state; \
|
|
|
9ae3a8 |
+ } \
|
|
|
9ae3a8 |
+ } while (0);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * A work request ID is 64-bits and we split up these bits
|
|
|
9ae3a8 |
+ * into 3 parts:
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * bits 0-15 : type of control message, 2^16
|
|
|
9ae3a8 |
+ * bits 16-29: ram block index, 2^14
|
|
|
9ae3a8 |
+ * bits 30-63: ram block chunk number, 2^34
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * The last two bit ranges are only used for RDMA writes,
|
|
|
9ae3a8 |
+ * in order to track their completion and potentially
|
|
|
9ae3a8 |
+ * also track unregistration status of the message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+#define RDMA_WRID_TYPE_SHIFT 0UL
|
|
|
9ae3a8 |
+#define RDMA_WRID_BLOCK_SHIFT 16UL
|
|
|
9ae3a8 |
+#define RDMA_WRID_CHUNK_SHIFT 30UL
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+#define RDMA_WRID_TYPE_MASK \
|
|
|
9ae3a8 |
+ ((1UL << RDMA_WRID_BLOCK_SHIFT) - 1UL)
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+#define RDMA_WRID_BLOCK_MASK \
|
|
|
9ae3a8 |
+ (~RDMA_WRID_TYPE_MASK & ((1UL << RDMA_WRID_CHUNK_SHIFT) - 1UL))
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+#define RDMA_WRID_CHUNK_MASK (~RDMA_WRID_BLOCK_MASK & ~RDMA_WRID_TYPE_MASK)
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * RDMA migration protocol:
|
|
|
9ae3a8 |
+ * 1. RDMA Writes (data messages, i.e. RAM)
|
|
|
9ae3a8 |
+ * 2. IB Send/Recv (control channel messages)
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+enum {
|
|
|
9ae3a8 |
+ RDMA_WRID_NONE = 0,
|
|
|
9ae3a8 |
+ RDMA_WRID_RDMA_WRITE = 1,
|
|
|
9ae3a8 |
+ RDMA_WRID_SEND_CONTROL = 2000,
|
|
|
9ae3a8 |
+ RDMA_WRID_RECV_CONTROL = 4000,
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const char *wrid_desc[] = {
|
|
|
9ae3a8 |
+ [RDMA_WRID_NONE] = "NONE",
|
|
|
9ae3a8 |
+ [RDMA_WRID_RDMA_WRITE] = "WRITE RDMA",
|
|
|
9ae3a8 |
+ [RDMA_WRID_SEND_CONTROL] = "CONTROL SEND",
|
|
|
9ae3a8 |
+ [RDMA_WRID_RECV_CONTROL] = "CONTROL RECV",
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Work request IDs for IB SEND messages only (not RDMA writes).
|
|
|
9ae3a8 |
+ * This is used by the migration protocol to transmit
|
|
|
9ae3a8 |
+ * control messages (such as device state and registration commands)
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * We could use more WRs, but we have enough for now.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+enum {
|
|
|
9ae3a8 |
+ RDMA_WRID_READY = 0,
|
|
|
9ae3a8 |
+ RDMA_WRID_DATA,
|
|
|
9ae3a8 |
+ RDMA_WRID_CONTROL,
|
|
|
9ae3a8 |
+ RDMA_WRID_MAX,
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * SEND/RECV IB Control Messages.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+enum {
|
|
|
9ae3a8 |
+ RDMA_CONTROL_NONE = 0,
|
|
|
9ae3a8 |
+ RDMA_CONTROL_ERROR,
|
|
|
9ae3a8 |
+ RDMA_CONTROL_READY, /* ready to receive */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_QEMU_FILE, /* QEMUFile-transmitted bytes */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_RAM_BLOCKS_REQUEST, /* RAMBlock synchronization */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_RAM_BLOCKS_RESULT, /* RAMBlock synchronization */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_COMPRESS, /* page contains repeat values */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_REGISTER_REQUEST, /* dynamic page registration */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_REGISTER_RESULT, /* key to use after registration */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_REGISTER_FINISHED, /* current iteration finished */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_UNREGISTER_REQUEST, /* dynamic UN-registration */
|
|
|
9ae3a8 |
+ RDMA_CONTROL_UNREGISTER_FINISHED, /* unpinning finished */
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const char *control_desc[] = {
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_NONE] = "NONE",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_ERROR] = "ERROR",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_READY] = "READY",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_QEMU_FILE] = "QEMU FILE",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_RAM_BLOCKS_REQUEST] = "RAM BLOCKS REQUEST",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_RAM_BLOCKS_RESULT] = "RAM BLOCKS RESULT",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_COMPRESS] = "COMPRESS",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_REGISTER_REQUEST] = "REGISTER REQUEST",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_REGISTER_RESULT] = "REGISTER RESULT",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_REGISTER_FINISHED] = "REGISTER FINISHED",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_UNREGISTER_REQUEST] = "UNREGISTER REQUEST",
|
|
|
9ae3a8 |
+ [RDMA_CONTROL_UNREGISTER_FINISHED] = "UNREGISTER FINISHED",
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Memory and MR structures used to represent an IB Send/Recv work request.
|
|
|
9ae3a8 |
+ * This is *not* used for RDMA writes, only IB Send/Recv.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct {
|
|
|
9ae3a8 |
+ uint8_t control[RDMA_CONTROL_MAX_BUFFER]; /* actual buffer to register */
|
|
|
9ae3a8 |
+ struct ibv_mr *control_mr; /* registration metadata */
|
|
|
9ae3a8 |
+ size_t control_len; /* length of the message */
|
|
|
9ae3a8 |
+ uint8_t *control_curr; /* start of unconsumed bytes */
|
|
|
9ae3a8 |
+} RDMAWorkRequestData;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Negotiate RDMA capabilities during connection-setup time.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct {
|
|
|
9ae3a8 |
+ uint32_t version;
|
|
|
9ae3a8 |
+ uint32_t flags;
|
|
|
9ae3a8 |
+} RDMACapabilities;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void caps_to_network(RDMACapabilities *cap)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ cap->version = htonl(cap->version);
|
|
|
9ae3a8 |
+ cap->flags = htonl(cap->flags);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_caps(RDMACapabilities *cap)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ cap->version = ntohl(cap->version);
|
|
|
9ae3a8 |
+ cap->flags = ntohl(cap->flags);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Representation of a RAMBlock from an RDMA perspective.
|
|
|
9ae3a8 |
+ * This is not transmitted, only local.
|
|
|
9ae3a8 |
+ * This and subsequent structures cannot be linked lists
|
|
|
9ae3a8 |
+ * because we're using a single IB message to transmit
|
|
|
9ae3a8 |
+ * the information. It's small anyway, so a list is overkill.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct RDMALocalBlock {
|
|
|
9ae3a8 |
+ uint8_t *local_host_addr; /* local virtual address */
|
|
|
9ae3a8 |
+ uint64_t remote_host_addr; /* remote virtual address */
|
|
|
9ae3a8 |
+ uint64_t offset;
|
|
|
9ae3a8 |
+ uint64_t length;
|
|
|
9ae3a8 |
+ struct ibv_mr **pmr; /* MRs for chunk-level registration */
|
|
|
9ae3a8 |
+ struct ibv_mr *mr; /* MR for non-chunk-level registration */
|
|
|
9ae3a8 |
+ uint32_t *remote_keys; /* rkeys for chunk-level registration */
|
|
|
9ae3a8 |
+ uint32_t remote_rkey; /* rkeys for non-chunk-level registration */
|
|
|
9ae3a8 |
+ int index; /* which block are we */
|
|
|
9ae3a8 |
+ bool is_ram_block;
|
|
|
9ae3a8 |
+ int nb_chunks;
|
|
|
9ae3a8 |
+ unsigned long *transit_bitmap;
|
|
|
9ae3a8 |
+ unsigned long *unregister_bitmap;
|
|
|
9ae3a8 |
+} RDMALocalBlock;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Also represents a RAMblock, but only on the dest.
|
|
|
9ae3a8 |
+ * This gets transmitted by the dest during connection-time
|
|
|
9ae3a8 |
+ * to the source VM and then is used to populate the
|
|
|
9ae3a8 |
+ * corresponding RDMALocalBlock with
|
|
|
9ae3a8 |
+ * the information needed to perform the actual RDMA.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct QEMU_PACKED RDMARemoteBlock {
|
|
|
9ae3a8 |
+ uint64_t remote_host_addr;
|
|
|
9ae3a8 |
+ uint64_t offset;
|
|
|
9ae3a8 |
+ uint64_t length;
|
|
|
9ae3a8 |
+ uint32_t remote_rkey;
|
|
|
9ae3a8 |
+ uint32_t padding;
|
|
|
9ae3a8 |
+} RDMARemoteBlock;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static uint64_t htonll(uint64_t v)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ union { uint32_t lv[2]; uint64_t llv; } u;
|
|
|
9ae3a8 |
+ u.lv[0] = htonl(v >> 32);
|
|
|
9ae3a8 |
+ u.lv[1] = htonl(v & 0xFFFFFFFFULL);
|
|
|
9ae3a8 |
+ return u.llv;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static uint64_t ntohll(uint64_t v) {
|
|
|
9ae3a8 |
+ union { uint32_t lv[2]; uint64_t llv; } u;
|
|
|
9ae3a8 |
+ u.llv = v;
|
|
|
9ae3a8 |
+ return ((uint64_t)ntohl(u.lv[0]) << 32) | (uint64_t) ntohl(u.lv[1]);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void remote_block_to_network(RDMARemoteBlock *rb)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ rb->remote_host_addr = htonll(rb->remote_host_addr);
|
|
|
9ae3a8 |
+ rb->offset = htonll(rb->offset);
|
|
|
9ae3a8 |
+ rb->length = htonll(rb->length);
|
|
|
9ae3a8 |
+ rb->remote_rkey = htonl(rb->remote_rkey);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_remote_block(RDMARemoteBlock *rb)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ rb->remote_host_addr = ntohll(rb->remote_host_addr);
|
|
|
9ae3a8 |
+ rb->offset = ntohll(rb->offset);
|
|
|
9ae3a8 |
+ rb->length = ntohll(rb->length);
|
|
|
9ae3a8 |
+ rb->remote_rkey = ntohl(rb->remote_rkey);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Virtual address of the above structures used for transmitting
|
|
|
9ae3a8 |
+ * the RAMBlock descriptions at connection-time.
|
|
|
9ae3a8 |
+ * This structure is *not* transmitted.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct RDMALocalBlocks {
|
|
|
9ae3a8 |
+ int nb_blocks;
|
|
|
9ae3a8 |
+ bool init; /* main memory init complete */
|
|
|
9ae3a8 |
+ RDMALocalBlock *block;
|
|
|
9ae3a8 |
+} RDMALocalBlocks;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Main data structure for RDMA state.
|
|
|
9ae3a8 |
+ * While there is only one copy of this structure being allocated right now,
|
|
|
9ae3a8 |
+ * this is the place where one would start if you wanted to consider
|
|
|
9ae3a8 |
+ * having more than one RDMA connection open at the same time.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct RDMAContext {
|
|
|
9ae3a8 |
+ char *host;
|
|
|
9ae3a8 |
+ int port;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ RDMAWorkRequestData wr_data[RDMA_WRID_MAX + 1];
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * This is used by *_exchange_send() to figure out whether or not
|
|
|
9ae3a8 |
+ * the initial "READY" message has already been received or not.
|
|
|
9ae3a8 |
+ * This is because other functions may potentially poll() and detect
|
|
|
9ae3a8 |
+ * the READY message before send() does, in which case we need to
|
|
|
9ae3a8 |
+ * know if it completed.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ int control_ready_expected;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* number of outstanding writes */
|
|
|
9ae3a8 |
+ int nb_sent;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* store info about current buffer so that we can
|
|
|
9ae3a8 |
+ merge it with future sends */
|
|
|
9ae3a8 |
+ uint64_t current_addr;
|
|
|
9ae3a8 |
+ uint64_t current_length;
|
|
|
9ae3a8 |
+ /* index of ram block the current buffer belongs to */
|
|
|
9ae3a8 |
+ int current_index;
|
|
|
9ae3a8 |
+ /* index of the chunk in the current ram block */
|
|
|
9ae3a8 |
+ int current_chunk;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ bool pin_all;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * infiniband-specific variables for opening the device
|
|
|
9ae3a8 |
+ * and maintaining connection state and so forth.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * cm_id also has ibv_context, rdma_event_channel, and ibv_qp in
|
|
|
9ae3a8 |
+ * cm_id->verbs, cm_id->channel, and cm_id->qp.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ struct rdma_cm_id *cm_id; /* connection manager ID */
|
|
|
9ae3a8 |
+ struct rdma_cm_id *listen_id;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ struct ibv_context *verbs;
|
|
|
9ae3a8 |
+ struct rdma_event_channel *channel;
|
|
|
9ae3a8 |
+ struct ibv_qp *qp; /* queue pair */
|
|
|
9ae3a8 |
+ struct ibv_comp_channel *comp_channel; /* completion channel */
|
|
|
9ae3a8 |
+ struct ibv_pd *pd; /* protection domain */
|
|
|
9ae3a8 |
+ struct ibv_cq *cq; /* completion queue */
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * If a previous write failed (perhaps because of a failed
|
|
|
9ae3a8 |
+ * memory registration, then do not attempt any future work
|
|
|
9ae3a8 |
+ * and remember the error state.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ int error_state;
|
|
|
9ae3a8 |
+ int error_reported;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Description of ram blocks used throughout the code.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ RDMALocalBlocks local_ram_blocks;
|
|
|
9ae3a8 |
+ RDMARemoteBlock *block;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Migration on *destination* started.
|
|
|
9ae3a8 |
+ * Then use coroutine yield function.
|
|
|
9ae3a8 |
+ * Source runs in a thread, so we don't care.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ int migration_started_on_destination;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ int total_registrations;
|
|
|
9ae3a8 |
+ int total_writes;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ int unregister_current, unregister_next;
|
|
|
9ae3a8 |
+ uint64_t unregistrations[RDMA_SIGNALED_SEND_MAX];
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ GHashTable *blockmap;
|
|
|
9ae3a8 |
+} RDMAContext;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Interface to the rest of the migration call stack.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct QEMUFileRDMA {
|
|
|
9ae3a8 |
+ RDMAContext *rdma;
|
|
|
9ae3a8 |
+ size_t len;
|
|
|
9ae3a8 |
+ void *file;
|
|
|
9ae3a8 |
+} QEMUFileRDMA;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Main structure for IB Send/Recv control messages.
|
|
|
9ae3a8 |
+ * This gets prepended at the beginning of every Send/Recv.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct QEMU_PACKED {
|
|
|
9ae3a8 |
+ uint32_t len; /* Total length of data portion */
|
|
|
9ae3a8 |
+ uint32_t type; /* which control command to perform */
|
|
|
9ae3a8 |
+ uint32_t repeat; /* number of commands in data portion of same type */
|
|
|
9ae3a8 |
+ uint32_t padding;
|
|
|
9ae3a8 |
+} RDMAControlHeader;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void control_to_network(RDMAControlHeader *control)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ control->type = htonl(control->type);
|
|
|
9ae3a8 |
+ control->len = htonl(control->len);
|
|
|
9ae3a8 |
+ control->repeat = htonl(control->repeat);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_control(RDMAControlHeader *control)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ control->type = ntohl(control->type);
|
|
|
9ae3a8 |
+ control->len = ntohl(control->len);
|
|
|
9ae3a8 |
+ control->repeat = ntohl(control->repeat);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Register a single Chunk.
|
|
|
9ae3a8 |
+ * Information sent by the source VM to inform the dest
|
|
|
9ae3a8 |
+ * to register an single chunk of memory before we can perform
|
|
|
9ae3a8 |
+ * the actual RDMA operation.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct QEMU_PACKED {
|
|
|
9ae3a8 |
+ union QEMU_PACKED {
|
|
|
9ae3a8 |
+ uint64_t current_addr; /* offset into the ramblock of the chunk */
|
|
|
9ae3a8 |
+ uint64_t chunk; /* chunk to lookup if unregistering */
|
|
|
9ae3a8 |
+ } key;
|
|
|
9ae3a8 |
+ uint32_t current_index; /* which ramblock the chunk belongs to */
|
|
|
9ae3a8 |
+ uint32_t padding;
|
|
|
9ae3a8 |
+ uint64_t chunks; /* how many sequential chunks to register */
|
|
|
9ae3a8 |
+} RDMARegister;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void register_to_network(RDMARegister *reg)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ reg->key.current_addr = htonll(reg->key.current_addr);
|
|
|
9ae3a8 |
+ reg->current_index = htonl(reg->current_index);
|
|
|
9ae3a8 |
+ reg->chunks = htonll(reg->chunks);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_register(RDMARegister *reg)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ reg->key.current_addr = ntohll(reg->key.current_addr);
|
|
|
9ae3a8 |
+ reg->current_index = ntohl(reg->current_index);
|
|
|
9ae3a8 |
+ reg->chunks = ntohll(reg->chunks);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+typedef struct QEMU_PACKED {
|
|
|
9ae3a8 |
+ uint32_t value; /* if zero, we will madvise() */
|
|
|
9ae3a8 |
+ uint32_t block_idx; /* which ram block index */
|
|
|
9ae3a8 |
+ uint64_t offset; /* where in the remote ramblock this chunk */
|
|
|
9ae3a8 |
+ uint64_t length; /* length of the chunk */
|
|
|
9ae3a8 |
+} RDMACompress;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void compress_to_network(RDMACompress *comp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ comp->value = htonl(comp->value);
|
|
|
9ae3a8 |
+ comp->block_idx = htonl(comp->block_idx);
|
|
|
9ae3a8 |
+ comp->offset = htonll(comp->offset);
|
|
|
9ae3a8 |
+ comp->length = htonll(comp->length);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_compress(RDMACompress *comp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ comp->value = ntohl(comp->value);
|
|
|
9ae3a8 |
+ comp->block_idx = ntohl(comp->block_idx);
|
|
|
9ae3a8 |
+ comp->offset = ntohll(comp->offset);
|
|
|
9ae3a8 |
+ comp->length = ntohll(comp->length);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * The result of the dest's memory registration produces an "rkey"
|
|
|
9ae3a8 |
+ * which the source VM must reference in order to perform
|
|
|
9ae3a8 |
+ * the RDMA operation.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+typedef struct QEMU_PACKED {
|
|
|
9ae3a8 |
+ uint32_t rkey;
|
|
|
9ae3a8 |
+ uint32_t padding;
|
|
|
9ae3a8 |
+ uint64_t host_addr;
|
|
|
9ae3a8 |
+} RDMARegisterResult;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void result_to_network(RDMARegisterResult *result)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ result->rkey = htonl(result->rkey);
|
|
|
9ae3a8 |
+ result->host_addr = htonll(result->host_addr);
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void network_to_result(RDMARegisterResult *result)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ result->rkey = ntohl(result->rkey);
|
|
|
9ae3a8 |
+ result->host_addr = ntohll(result->host_addr);
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const char *print_wrid(int wrid);
|
|
|
9ae3a8 |
+static int qemu_rdma_exchange_send(RDMAContext *rdma, RDMAControlHeader *head,
|
|
|
9ae3a8 |
+ uint8_t *data, RDMAControlHeader *resp,
|
|
|
9ae3a8 |
+ int *resp_idx,
|
|
|
9ae3a8 |
+ int (*callback)(RDMAContext *rdma));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static inline uint64_t ram_chunk_index(uint8_t *start, uint8_t *host)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ return ((uintptr_t) host - (uintptr_t) start) >> RDMA_REG_CHUNK_SHIFT;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static inline uint8_t *ram_chunk_start(RDMALocalBlock *rdma_ram_block,
|
|
|
9ae3a8 |
+ uint64_t i)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ return (uint8_t *) (((uintptr_t) rdma_ram_block->local_host_addr)
|
|
|
9ae3a8 |
+ + (i << RDMA_REG_CHUNK_SHIFT));
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static inline uint8_t *ram_chunk_end(RDMALocalBlock *rdma_ram_block, uint64_t i)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ uint8_t *result = ram_chunk_start(rdma_ram_block, i) +
|
|
|
9ae3a8 |
+ (1UL << RDMA_REG_CHUNK_SHIFT);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (result > (rdma_ram_block->local_host_addr + rdma_ram_block->length)) {
|
|
|
9ae3a8 |
+ result = rdma_ram_block->local_host_addr + rdma_ram_block->length;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return result;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int __qemu_rdma_add_block(RDMAContext *rdma, void *host_addr,
|
|
|
9ae3a8 |
+ ram_addr_t block_offset, uint64_t length)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = g_hash_table_lookup(rdma->blockmap,
|
|
|
9ae3a8 |
+ (void *) block_offset);
|
|
|
9ae3a8 |
+ RDMALocalBlock *old = local->block;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ assert(block == NULL);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ local->block = g_malloc0(sizeof(RDMALocalBlock) * (local->nb_blocks + 1));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (local->nb_blocks) {
|
|
|
9ae3a8 |
+ int x;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (x = 0; x < local->nb_blocks; x++) {
|
|
|
9ae3a8 |
+ g_hash_table_remove(rdma->blockmap, (void *)old[x].offset);
|
|
|
9ae3a8 |
+ g_hash_table_insert(rdma->blockmap, (void *)old[x].offset,
|
|
|
9ae3a8 |
+ &local->block[x]);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ memcpy(local->block, old, sizeof(RDMALocalBlock) * local->nb_blocks);
|
|
|
9ae3a8 |
+ g_free(old);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block = &local->block[local->nb_blocks];
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block->local_host_addr = host_addr;
|
|
|
9ae3a8 |
+ block->offset = block_offset;
|
|
|
9ae3a8 |
+ block->length = length;
|
|
|
9ae3a8 |
+ block->index = local->nb_blocks;
|
|
|
9ae3a8 |
+ block->nb_chunks = ram_chunk_index(host_addr, host_addr + length) + 1UL;
|
|
|
9ae3a8 |
+ block->transit_bitmap = bitmap_new(block->nb_chunks);
|
|
|
9ae3a8 |
+ bitmap_clear(block->transit_bitmap, 0, block->nb_chunks);
|
|
|
9ae3a8 |
+ block->unregister_bitmap = bitmap_new(block->nb_chunks);
|
|
|
9ae3a8 |
+ bitmap_clear(block->unregister_bitmap, 0, block->nb_chunks);
|
|
|
9ae3a8 |
+ block->remote_keys = g_malloc0(block->nb_chunks * sizeof(uint32_t));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block->is_ram_block = local->init ? false : true;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_hash_table_insert(rdma->blockmap, (void *) block_offset, block);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Added Block: %d, addr: %" PRIu64 ", offset: %" PRIu64
|
|
|
9ae3a8 |
+ " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d\n",
|
|
|
9ae3a8 |
+ local->nb_blocks, (uint64_t) block->local_host_addr, block->offset,
|
|
|
9ae3a8 |
+ block->length, (uint64_t) (block->local_host_addr + block->length),
|
|
|
9ae3a8 |
+ BITS_TO_LONGS(block->nb_chunks) *
|
|
|
9ae3a8 |
+ sizeof(unsigned long) * 8, block->nb_chunks);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ local->nb_blocks++;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Memory regions need to be registered with the device and queue pairs setup
|
|
|
9ae3a8 |
+ * in advanced before the migration starts. This tells us where the RAM blocks
|
|
|
9ae3a8 |
+ * are so that we can register them individually.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static void qemu_rdma_init_one_block(void *host_addr,
|
|
|
9ae3a8 |
+ ram_addr_t block_offset, ram_addr_t length, void *opaque)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ __qemu_rdma_add_block(opaque, host_addr, block_offset, length);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Identify the RAMBlocks and their quantity. They will be references to
|
|
|
9ae3a8 |
+ * identify chunk boundaries inside each RAMBlock and also be referenced
|
|
|
9ae3a8 |
+ * during dynamic page registration.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_init_ram_blocks(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ assert(rdma->blockmap == NULL);
|
|
|
9ae3a8 |
+ rdma->blockmap = g_hash_table_new(g_direct_hash, g_direct_equal);
|
|
|
9ae3a8 |
+ memset(local, 0, sizeof *local);
|
|
|
9ae3a8 |
+ qemu_ram_foreach_block(qemu_rdma_init_one_block, rdma);
|
|
|
9ae3a8 |
+ DPRINTF("Allocated %d local ram block structures\n", local->nb_blocks);
|
|
|
9ae3a8 |
+ rdma->block = (RDMARemoteBlock *) g_malloc0(sizeof(RDMARemoteBlock) *
|
|
|
9ae3a8 |
+ rdma->local_ram_blocks.nb_blocks);
|
|
|
9ae3a8 |
+ local->init = true;
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int __qemu_rdma_delete_block(RDMAContext *rdma, ram_addr_t block_offset)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = g_hash_table_lookup(rdma->blockmap,
|
|
|
9ae3a8 |
+ (void *) block_offset);
|
|
|
9ae3a8 |
+ RDMALocalBlock *old = local->block;
|
|
|
9ae3a8 |
+ int x;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ assert(block);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (block->pmr) {
|
|
|
9ae3a8 |
+ int j;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (j = 0; j < block->nb_chunks; j++) {
|
|
|
9ae3a8 |
+ if (!block->pmr[j]) {
|
|
|
9ae3a8 |
+ continue;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ ibv_dereg_mr(block->pmr[j]);
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ g_free(block->pmr);
|
|
|
9ae3a8 |
+ block->pmr = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (block->mr) {
|
|
|
9ae3a8 |
+ ibv_dereg_mr(block->mr);
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+ block->mr = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_free(block->transit_bitmap);
|
|
|
9ae3a8 |
+ block->transit_bitmap = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_free(block->unregister_bitmap);
|
|
|
9ae3a8 |
+ block->unregister_bitmap = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_free(block->remote_keys);
|
|
|
9ae3a8 |
+ block->remote_keys = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (x = 0; x < local->nb_blocks; x++) {
|
|
|
9ae3a8 |
+ g_hash_table_remove(rdma->blockmap, (void *)old[x].offset);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (local->nb_blocks > 1) {
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ local->block = g_malloc0(sizeof(RDMALocalBlock) *
|
|
|
9ae3a8 |
+ (local->nb_blocks - 1));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (block->index) {
|
|
|
9ae3a8 |
+ memcpy(local->block, old, sizeof(RDMALocalBlock) * block->index);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (block->index < (local->nb_blocks - 1)) {
|
|
|
9ae3a8 |
+ memcpy(local->block + block->index, old + (block->index + 1),
|
|
|
9ae3a8 |
+ sizeof(RDMALocalBlock) *
|
|
|
9ae3a8 |
+ (local->nb_blocks - (block->index + 1)));
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ assert(block == local->block);
|
|
|
9ae3a8 |
+ local->block = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Deleted Block: %d, addr: %" PRIu64 ", offset: %" PRIu64
|
|
|
9ae3a8 |
+ " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d\n",
|
|
|
9ae3a8 |
+ local->nb_blocks, (uint64_t) block->local_host_addr, block->offset,
|
|
|
9ae3a8 |
+ block->length, (uint64_t) (block->local_host_addr + block->length),
|
|
|
9ae3a8 |
+ BITS_TO_LONGS(block->nb_chunks) *
|
|
|
9ae3a8 |
+ sizeof(unsigned long) * 8, block->nb_chunks);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_free(old);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ local->nb_blocks--;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (local->nb_blocks) {
|
|
|
9ae3a8 |
+ for (x = 0; x < local->nb_blocks; x++) {
|
|
|
9ae3a8 |
+ g_hash_table_insert(rdma->blockmap, (void *)local->block[x].offset,
|
|
|
9ae3a8 |
+ &local->block[x]);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Put in the log file which RDMA device was opened and the details
|
|
|
9ae3a8 |
+ * associated with that device.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static void qemu_rdma_dump_id(const char *who, struct ibv_context *verbs)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ printf("%s RDMA Device opened: kernel name %s "
|
|
|
9ae3a8 |
+ "uverbs device name %s, "
|
|
|
9ae3a8 |
+ "infiniband_verbs class device path %s,"
|
|
|
9ae3a8 |
+ " infiniband class device path %s\n",
|
|
|
9ae3a8 |
+ who,
|
|
|
9ae3a8 |
+ verbs->device->name,
|
|
|
9ae3a8 |
+ verbs->device->dev_name,
|
|
|
9ae3a8 |
+ verbs->device->dev_path,
|
|
|
9ae3a8 |
+ verbs->device->ibdev_path);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Put in the log file the RDMA gid addressing information,
|
|
|
9ae3a8 |
+ * useful for folks who have trouble understanding the
|
|
|
9ae3a8 |
+ * RDMA device hierarchy in the kernel.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static void qemu_rdma_dump_gid(const char *who, struct rdma_cm_id *id)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ char sgid[33];
|
|
|
9ae3a8 |
+ char dgid[33];
|
|
|
9ae3a8 |
+ inet_ntop(AF_INET6, &id->route.addr.addr.ibaddr.sgid, sgid, sizeof sgid);
|
|
|
9ae3a8 |
+ inet_ntop(AF_INET6, &id->route.addr.addr.ibaddr.dgid, dgid, sizeof dgid);
|
|
|
9ae3a8 |
+ DPRINTF("%s Source GID: %s, Dest GID: %s\n", who, sgid, dgid);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Figure out which RDMA device corresponds to the requested IP hostname
|
|
|
9ae3a8 |
+ * Also create the initial connection manager identifiers for opening
|
|
|
9ae3a8 |
+ * the connection.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_resolve_host(RDMAContext *rdma, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+ struct addrinfo *res;
|
|
|
9ae3a8 |
+ char port_str[16];
|
|
|
9ae3a8 |
+ struct rdma_cm_event *cm_event;
|
|
|
9ae3a8 |
+ char ip[40] = "unknown";
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->host == NULL || !strcmp(rdma->host, "")) {
|
|
|
9ae3a8 |
+ ERROR(errp, "RDMA hostname has not been set\n");
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* create CM channel */
|
|
|
9ae3a8 |
+ rdma->channel = rdma_create_event_channel();
|
|
|
9ae3a8 |
+ if (!rdma->channel) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not create CM channel\n");
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* create CM id */
|
|
|
9ae3a8 |
+ ret = rdma_create_id(rdma->channel, &rdma->cm_id, NULL, RDMA_PS_TCP);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not create channel id\n");
|
|
|
9ae3a8 |
+ goto err_resolve_create_id;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ snprintf(port_str, 16, "%d", rdma->port);
|
|
|
9ae3a8 |
+ port_str[15] = '\0';
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = getaddrinfo(rdma->host, port_str, NULL, &res;;
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not getaddrinfo address %s\n", rdma->host);
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ inet_ntop(AF_INET, &((struct sockaddr_in *) res->ai_addr)->sin_addr,
|
|
|
9ae3a8 |
+ ip, sizeof ip);
|
|
|
9ae3a8 |
+ DPRINTF("%s => %s\n", rdma->host, ip);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* resolve the first address */
|
|
|
9ae3a8 |
+ ret = rdma_resolve_addr(rdma->cm_id, NULL, res->ai_addr,
|
|
|
9ae3a8 |
+ RDMA_RESOLVE_TIMEOUT_MS);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not resolve address %s\n", rdma->host);
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_dump_gid("source_resolve_addr", rdma->cm_id);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not perform event_addr_resolved\n");
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (cm_event->event != RDMA_CM_EVENT_ADDR_RESOLVED) {
|
|
|
9ae3a8 |
+ ERROR(errp, "result not equal to event_addr_resolved %s\n",
|
|
|
9ae3a8 |
+ rdma_event_str(cm_event->event));
|
|
|
9ae3a8 |
+ perror("rdma_resolve_addr");
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* resolve route */
|
|
|
9ae3a8 |
+ ret = rdma_resolve_route(rdma->cm_id, RDMA_RESOLVE_TIMEOUT_MS);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not resolve rdma route\n");
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not perform event_route_resolved\n");
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (cm_event->event != RDMA_CM_EVENT_ROUTE_RESOLVED) {
|
|
|
9ae3a8 |
+ ERROR(errp, "result not equal to event_route_resolved: %s\n",
|
|
|
9ae3a8 |
+ rdma_event_str(cm_event->event));
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ goto err_resolve_get_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ rdma->verbs = rdma->cm_id->verbs;
|
|
|
9ae3a8 |
+ qemu_rdma_dump_id("source_resolve_host", rdma->cm_id->verbs);
|
|
|
9ae3a8 |
+ qemu_rdma_dump_gid("source_resolve_host", rdma->cm_id);
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_resolve_get_addr:
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->cm_id);
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+err_resolve_create_id:
|
|
|
9ae3a8 |
+ rdma_destroy_event_channel(rdma->channel);
|
|
|
9ae3a8 |
+ rdma->channel = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Create protection domain and completion queues
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_alloc_pd_cq(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ /* allocate pd */
|
|
|
9ae3a8 |
+ rdma->pd = ibv_alloc_pd(rdma->verbs);
|
|
|
9ae3a8 |
+ if (!rdma->pd) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "failed to allocate protection domain\n");
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* create completion channel */
|
|
|
9ae3a8 |
+ rdma->comp_channel = ibv_create_comp_channel(rdma->verbs);
|
|
|
9ae3a8 |
+ if (!rdma->comp_channel) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "failed to allocate completion channel\n");
|
|
|
9ae3a8 |
+ goto err_alloc_pd_cq;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Completion queue can be filled by both read and write work requests,
|
|
|
9ae3a8 |
+ * so must reflect the sum of both possible queue sizes.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ rdma->cq = ibv_create_cq(rdma->verbs, (RDMA_SIGNALED_SEND_MAX * 3),
|
|
|
9ae3a8 |
+ NULL, rdma->comp_channel, 0);
|
|
|
9ae3a8 |
+ if (!rdma->cq) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "failed to allocate completion queue\n");
|
|
|
9ae3a8 |
+ goto err_alloc_pd_cq;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_alloc_pd_cq:
|
|
|
9ae3a8 |
+ if (rdma->pd) {
|
|
|
9ae3a8 |
+ ibv_dealloc_pd(rdma->pd);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->comp_channel) {
|
|
|
9ae3a8 |
+ ibv_destroy_comp_channel(rdma->comp_channel);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->pd = NULL;
|
|
|
9ae3a8 |
+ rdma->comp_channel = NULL;
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Create queue pairs.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_alloc_qp(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ struct ibv_qp_init_attr attr = { 0 };
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ attr.cap.max_send_wr = RDMA_SIGNALED_SEND_MAX;
|
|
|
9ae3a8 |
+ attr.cap.max_recv_wr = 3;
|
|
|
9ae3a8 |
+ attr.cap.max_send_sge = 1;
|
|
|
9ae3a8 |
+ attr.cap.max_recv_sge = 1;
|
|
|
9ae3a8 |
+ attr.send_cq = rdma->cq;
|
|
|
9ae3a8 |
+ attr.recv_cq = rdma->cq;
|
|
|
9ae3a8 |
+ attr.qp_type = IBV_QPT_RC;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_create_qp(rdma->cm_id, rdma->pd, &attr);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->qp = rdma->cm_id->qp;
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_reg_whole_ram_blocks(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int i;
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (i = 0; i < local->nb_blocks; i++) {
|
|
|
9ae3a8 |
+ local->block[i].mr =
|
|
|
9ae3a8 |
+ ibv_reg_mr(rdma->pd,
|
|
|
9ae3a8 |
+ local->block[i].local_host_addr,
|
|
|
9ae3a8 |
+ local->block[i].length,
|
|
|
9ae3a8 |
+ IBV_ACCESS_LOCAL_WRITE |
|
|
|
9ae3a8 |
+ IBV_ACCESS_REMOTE_WRITE
|
|
|
9ae3a8 |
+ );
|
|
|
9ae3a8 |
+ if (!local->block[i].mr) {
|
|
|
9ae3a8 |
+ perror("Failed to register local dest ram block!\n");
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->total_registrations++;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (i >= local->nb_blocks) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (i--; i >= 0; i--) {
|
|
|
9ae3a8 |
+ ibv_dereg_mr(local->block[i].mr);
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Find the ram block that corresponds to the page requested to be
|
|
|
9ae3a8 |
+ * transmitted by QEMU.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Once the block is found, also identify which 'chunk' within that
|
|
|
9ae3a8 |
+ * block that the page belongs to.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * This search cannot fail or the migration will fail.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_search_ram_block(RDMAContext *rdma,
|
|
|
9ae3a8 |
+ uint64_t block_offset,
|
|
|
9ae3a8 |
+ uint64_t offset,
|
|
|
9ae3a8 |
+ uint64_t length,
|
|
|
9ae3a8 |
+ uint64_t *block_index,
|
|
|
9ae3a8 |
+ uint64_t *chunk_index)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ uint64_t current_addr = block_offset + offset;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = g_hash_table_lookup(rdma->blockmap,
|
|
|
9ae3a8 |
+ (void *) block_offset);
|
|
|
9ae3a8 |
+ assert(block);
|
|
|
9ae3a8 |
+ assert(current_addr >= block->offset);
|
|
|
9ae3a8 |
+ assert((current_addr + length) <= (block->offset + block->length));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ *block_index = block->index;
|
|
|
9ae3a8 |
+ *chunk_index = ram_chunk_index(block->local_host_addr,
|
|
|
9ae3a8 |
+ block->local_host_addr + (current_addr - block->offset));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Register a chunk with IB. If the chunk was already registered
|
|
|
9ae3a8 |
+ * previously, then skip.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Also return the keys associated with the registration needed
|
|
|
9ae3a8 |
+ * to perform the actual RDMA operation.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_register_and_get_keys(RDMAContext *rdma,
|
|
|
9ae3a8 |
+ RDMALocalBlock *block, uint8_t *host_addr,
|
|
|
9ae3a8 |
+ uint32_t *lkey, uint32_t *rkey, int chunk,
|
|
|
9ae3a8 |
+ uint8_t *chunk_start, uint8_t *chunk_end)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ if (block->mr) {
|
|
|
9ae3a8 |
+ if (lkey) {
|
|
|
9ae3a8 |
+ *lkey = block->mr->lkey;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rkey) {
|
|
|
9ae3a8 |
+ *rkey = block->mr->rkey;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* allocate memory to store chunk MRs */
|
|
|
9ae3a8 |
+ if (!block->pmr) {
|
|
|
9ae3a8 |
+ block->pmr = g_malloc0(block->nb_chunks * sizeof(struct ibv_mr *));
|
|
|
9ae3a8 |
+ if (!block->pmr) {
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * If 'rkey', then we're the destination, so grant access to the source.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * If 'lkey', then we're the source VM, so grant access only to ourselves.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (!block->pmr[chunk]) {
|
|
|
9ae3a8 |
+ uint64_t len = chunk_end - chunk_start;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Registering %" PRIu64 " bytes @ %p\n",
|
|
|
9ae3a8 |
+ len, chunk_start);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block->pmr[chunk] = ibv_reg_mr(rdma->pd,
|
|
|
9ae3a8 |
+ chunk_start, len,
|
|
|
9ae3a8 |
+ (rkey ? (IBV_ACCESS_LOCAL_WRITE |
|
|
|
9ae3a8 |
+ IBV_ACCESS_REMOTE_WRITE) : 0));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!block->pmr[chunk]) {
|
|
|
9ae3a8 |
+ perror("Failed to register chunk!");
|
|
|
9ae3a8 |
+ fprintf(stderr, "Chunk details: block: %d chunk index %d"
|
|
|
9ae3a8 |
+ " start %" PRIu64 " end %" PRIu64 " host %" PRIu64
|
|
|
9ae3a8 |
+ " local %" PRIu64 " registrations: %d\n",
|
|
|
9ae3a8 |
+ block->index, chunk, (uint64_t) chunk_start,
|
|
|
9ae3a8 |
+ (uint64_t) chunk_end, (uint64_t) host_addr,
|
|
|
9ae3a8 |
+ (uint64_t) block->local_host_addr,
|
|
|
9ae3a8 |
+ rdma->total_registrations);
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->total_registrations++;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (lkey) {
|
|
|
9ae3a8 |
+ *lkey = block->pmr[chunk]->lkey;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rkey) {
|
|
|
9ae3a8 |
+ *rkey = block->pmr[chunk]->rkey;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Register (at connection time) the memory used for control
|
|
|
9ae3a8 |
+ * channel messages.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_reg_control(RDMAContext *rdma, int idx)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_mr = ibv_reg_mr(rdma->pd,
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control, RDMA_CONTROL_MAX_BUFFER,
|
|
|
9ae3a8 |
+ IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE);
|
|
|
9ae3a8 |
+ if (rdma->wr_data[idx].control_mr) {
|
|
|
9ae3a8 |
+ rdma->total_registrations++;
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ fprintf(stderr, "qemu_rdma_reg_control failed!\n");
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const char *print_wrid(int wrid)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ if (wrid >= RDMA_WRID_RECV_CONTROL) {
|
|
|
9ae3a8 |
+ return wrid_desc[RDMA_WRID_RECV_CONTROL];
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return wrid_desc[wrid];
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * RDMA requires memory registration (mlock/pinning), but this is not good for
|
|
|
9ae3a8 |
+ * overcommitment.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * In preparation for the future where LRU information or workload-specific
|
|
|
9ae3a8 |
+ * writable writable working set memory access behavior is available to QEMU
|
|
|
9ae3a8 |
+ * it would be nice to have in place the ability to UN-register/UN-pin
|
|
|
9ae3a8 |
+ * particular memory regions from the RDMA hardware when it is determine that
|
|
|
9ae3a8 |
+ * those regions of memory will likely not be accessed again in the near future.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * While we do not yet have such information right now, the following
|
|
|
9ae3a8 |
+ * compile-time option allows us to perform a non-optimized version of this
|
|
|
9ae3a8 |
+ * behavior.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * By uncommenting this option, you will cause *all* RDMA transfers to be
|
|
|
9ae3a8 |
+ * unregistered immediately after the transfer completes on both sides of the
|
|
|
9ae3a8 |
+ * connection. This has no effect in 'rdma-pin-all' mode, only regular mode.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * This will have a terrible impact on migration performance, so until future
|
|
|
9ae3a8 |
+ * workload information or LRU information is available, do not attempt to use
|
|
|
9ae3a8 |
+ * this feature except for basic testing.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+//#define RDMA_UNREGISTRATION_EXAMPLE
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Perform a non-optimized memory unregistration after every transfer
|
|
|
9ae3a8 |
+ * for demonsration purposes, only if pin-all is not requested.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Potential optimizations:
|
|
|
9ae3a8 |
+ * 1. Start a new thread to run this function continuously
|
|
|
9ae3a8 |
+ - for bit clearing
|
|
|
9ae3a8 |
+ - and for receipt of unregister messages
|
|
|
9ae3a8 |
+ * 2. Use an LRU.
|
|
|
9ae3a8 |
+ * 3. Use workload hints.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_unregister_waiting(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ while (rdma->unregistrations[rdma->unregister_current]) {
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+ uint64_t wr_id = rdma->unregistrations[rdma->unregister_current];
|
|
|
9ae3a8 |
+ uint64_t chunk =
|
|
|
9ae3a8 |
+ (wr_id & RDMA_WRID_CHUNK_MASK) >> RDMA_WRID_CHUNK_SHIFT;
|
|
|
9ae3a8 |
+ uint64_t index =
|
|
|
9ae3a8 |
+ (wr_id & RDMA_WRID_BLOCK_MASK) >> RDMA_WRID_BLOCK_SHIFT;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block =
|
|
|
9ae3a8 |
+ &(rdma->local_ram_blocks.block[index]);
|
|
|
9ae3a8 |
+ RDMARegister reg = { .current_index = index };
|
|
|
9ae3a8 |
+ RDMAControlHeader resp = { .type = RDMA_CONTROL_UNREGISTER_FINISHED,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ RDMAControlHeader head = { .len = sizeof(RDMARegister),
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_UNREGISTER_REQUEST,
|
|
|
9ae3a8 |
+ .repeat = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Processing unregister for chunk: %" PRIu64
|
|
|
9ae3a8 |
+ " at position %d\n", chunk, rdma->unregister_current);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->unregistrations[rdma->unregister_current] = 0;
|
|
|
9ae3a8 |
+ rdma->unregister_current++;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->unregister_current == RDMA_SIGNALED_SEND_MAX) {
|
|
|
9ae3a8 |
+ rdma->unregister_current = 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Unregistration is speculative (because migration is single-threaded
|
|
|
9ae3a8 |
+ * and we cannot break the protocol's inifinband message ordering).
|
|
|
9ae3a8 |
+ * Thus, if the memory is currently being used for transmission,
|
|
|
9ae3a8 |
+ * then abort the attempt to unregister and try again
|
|
|
9ae3a8 |
+ * later the next time a completion is received for this memory.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ clear_bit(chunk, block->unregister_bitmap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (test_bit(chunk, block->transit_bitmap)) {
|
|
|
9ae3a8 |
+ DDPRINTF("Cannot unregister inflight chunk: %" PRIu64 "\n", chunk);
|
|
|
9ae3a8 |
+ continue;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Sending unregister for chunk: %" PRIu64 "\n", chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = ibv_dereg_mr(block->pmr[chunk]);
|
|
|
9ae3a8 |
+ block->pmr[chunk] = NULL;
|
|
|
9ae3a8 |
+ block->remote_keys[chunk] = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret != 0) {
|
|
|
9ae3a8 |
+ perror("unregistration chunk failed");
|
|
|
9ae3a8 |
+ return -ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg.key.chunk = chunk;
|
|
|
9ae3a8 |
+ register_to_network(®);
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) ®,
|
|
|
9ae3a8 |
+ &resp, NULL, NULL);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Unregister for chunk: %" PRIu64 " complete.\n", chunk);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static uint64_t qemu_rdma_make_wrid(uint64_t wr_id, uint64_t index,
|
|
|
9ae3a8 |
+ uint64_t chunk)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ uint64_t result = wr_id & RDMA_WRID_TYPE_MASK;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ result |= (index << RDMA_WRID_BLOCK_SHIFT);
|
|
|
9ae3a8 |
+ result |= (chunk << RDMA_WRID_CHUNK_SHIFT);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return result;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Set bit for unregistration in the next iteration.
|
|
|
9ae3a8 |
+ * We cannot transmit right here, but will unpin later.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static void qemu_rdma_signal_unregister(RDMAContext *rdma, uint64_t index,
|
|
|
9ae3a8 |
+ uint64_t chunk, uint64_t wr_id)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ if (rdma->unregistrations[rdma->unregister_next] != 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: queue is full!\n");
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = &(rdma->local_ram_blocks.block[index]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!test_and_set_bit(chunk, block->unregister_bitmap)) {
|
|
|
9ae3a8 |
+ DDPRINTF("Appending unregister chunk %" PRIu64
|
|
|
9ae3a8 |
+ " at position %d\n", chunk, rdma->unregister_next);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->unregistrations[rdma->unregister_next++] =
|
|
|
9ae3a8 |
+ qemu_rdma_make_wrid(wr_id, index, chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->unregister_next == RDMA_SIGNALED_SEND_MAX) {
|
|
|
9ae3a8 |
+ rdma->unregister_next = 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ DDPRINTF("Unregister chunk %" PRIu64 " already in queue.\n",
|
|
|
9ae3a8 |
+ chunk);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Consult the connection manager to see a work request
|
|
|
9ae3a8 |
+ * (of any kind) has completed.
|
|
|
9ae3a8 |
+ * Return the work request ID that completed.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static uint64_t qemu_rdma_poll(RDMAContext *rdma, uint64_t *wr_id_out)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+ struct ibv_wc wc;
|
|
|
9ae3a8 |
+ uint64_t wr_id;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = ibv_poll_cq(rdma->cq, 1, &wc);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!ret) {
|
|
|
9ae3a8 |
+ *wr_id_out = RDMA_WRID_NONE;
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "ibv_poll_cq return %d!\n", ret);
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ wr_id = wc.wr_id & RDMA_WRID_TYPE_MASK;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wc.status != IBV_WC_SUCCESS) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "ibv_poll_cq wc.status=%d %s!\n",
|
|
|
9ae3a8 |
+ wc.status, ibv_wc_status_str(wc.status));
|
|
|
9ae3a8 |
+ fprintf(stderr, "ibv_poll_cq wrid=%s!\n", wrid_desc[wr_id]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->control_ready_expected &&
|
|
|
9ae3a8 |
+ (wr_id >= RDMA_WRID_RECV_CONTROL)) {
|
|
|
9ae3a8 |
+ DDDPRINTF("completion %s #%" PRId64 " received (%" PRId64 ")"
|
|
|
9ae3a8 |
+ " left %d\n", wrid_desc[RDMA_WRID_RECV_CONTROL],
|
|
|
9ae3a8 |
+ wr_id - RDMA_WRID_RECV_CONTROL, wr_id, rdma->nb_sent);
|
|
|
9ae3a8 |
+ rdma->control_ready_expected = 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == RDMA_WRID_RDMA_WRITE) {
|
|
|
9ae3a8 |
+ uint64_t chunk =
|
|
|
9ae3a8 |
+ (wc.wr_id & RDMA_WRID_CHUNK_MASK) >> RDMA_WRID_CHUNK_SHIFT;
|
|
|
9ae3a8 |
+ uint64_t index =
|
|
|
9ae3a8 |
+ (wc.wr_id & RDMA_WRID_BLOCK_MASK) >> RDMA_WRID_BLOCK_SHIFT;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = &(rdma->local_ram_blocks.block[index]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("completions %s (%" PRId64 ") left %d, "
|
|
|
9ae3a8 |
+ "block %" PRIu64 ", chunk: %" PRIu64 " %p %p\n",
|
|
|
9ae3a8 |
+ print_wrid(wr_id), wr_id, rdma->nb_sent, index, chunk,
|
|
|
9ae3a8 |
+ block->local_host_addr, (void *)block->remote_host_addr);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ clear_bit(chunk, block->transit_bitmap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->nb_sent > 0) {
|
|
|
9ae3a8 |
+ rdma->nb_sent--;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!rdma->pin_all) {
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * FYI: If one wanted to signal a specific chunk to be unregistered
|
|
|
9ae3a8 |
+ * using LRU or workload-specific information, this is the function
|
|
|
9ae3a8 |
+ * you would call to do so. That chunk would then get asynchronously
|
|
|
9ae3a8 |
+ * unregistered later.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+#ifdef RDMA_UNREGISTRATION_EXAMPLE
|
|
|
9ae3a8 |
+ qemu_rdma_signal_unregister(rdma, index, chunk, wc.wr_id);
|
|
|
9ae3a8 |
+#endif
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ DDDPRINTF("other completion %s (%" PRId64 ") received left %d\n",
|
|
|
9ae3a8 |
+ print_wrid(wr_id), wr_id, rdma->nb_sent);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ *wr_id_out = wc.wr_id;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Block until the next work request has completed.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * First poll to see if a work request has already completed,
|
|
|
9ae3a8 |
+ * otherwise block.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * If we encounter completed work requests for IDs other than
|
|
|
9ae3a8 |
+ * the one we're interested in, then that's generally an error.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * The only exception is actual RDMA Write completions. These
|
|
|
9ae3a8 |
+ * completions only need to be recorded, but do not actually
|
|
|
9ae3a8 |
+ * need further processing.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_block_for_wrid(RDMAContext *rdma, int wrid_requested)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int num_cq_events = 0, ret = 0;
|
|
|
9ae3a8 |
+ struct ibv_cq *cq;
|
|
|
9ae3a8 |
+ void *cq_ctx;
|
|
|
9ae3a8 |
+ uint64_t wr_id = RDMA_WRID_NONE, wr_id_in;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ibv_req_notify_cq(rdma->cq, 0)) {
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ /* poll cq first */
|
|
|
9ae3a8 |
+ while (wr_id != wrid_requested) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_poll(rdma, &wr_id_in);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == RDMA_WRID_NONE) {
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (wr_id != wrid_requested) {
|
|
|
9ae3a8 |
+ DDDPRINTF("A Wanted wrid %s (%d) but got %s (%" PRIu64 ")\n",
|
|
|
9ae3a8 |
+ print_wrid(wrid_requested),
|
|
|
9ae3a8 |
+ wrid_requested, print_wrid(wr_id), wr_id);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == wrid_requested) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ while (1) {
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Coroutine doesn't start until process_incoming_migration()
|
|
|
9ae3a8 |
+ * so don't yield unless we know we're running inside of a coroutine.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (rdma->migration_started_on_destination) {
|
|
|
9ae3a8 |
+ yield_until_fd_readable(rdma->comp_channel->fd);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ibv_get_cq_event(rdma->comp_channel, &cq, &cq_ctx)) {
|
|
|
9ae3a8 |
+ perror("ibv_get_cq_event");
|
|
|
9ae3a8 |
+ goto err_block_for_wrid;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ num_cq_events++;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ibv_req_notify_cq(cq, 0)) {
|
|
|
9ae3a8 |
+ goto err_block_for_wrid;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ while (wr_id != wrid_requested) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_poll(rdma, &wr_id_in);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ goto err_block_for_wrid;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == RDMA_WRID_NONE) {
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (wr_id != wrid_requested) {
|
|
|
9ae3a8 |
+ DDDPRINTF("B Wanted wrid %s (%d) but got %s (%" PRIu64 ")\n",
|
|
|
9ae3a8 |
+ print_wrid(wrid_requested), wrid_requested,
|
|
|
9ae3a8 |
+ print_wrid(wr_id), wr_id);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == wrid_requested) {
|
|
|
9ae3a8 |
+ goto success_block_for_wrid;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+success_block_for_wrid:
|
|
|
9ae3a8 |
+ if (num_cq_events) {
|
|
|
9ae3a8 |
+ ibv_ack_cq_events(cq, num_cq_events);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_block_for_wrid:
|
|
|
9ae3a8 |
+ if (num_cq_events) {
|
|
|
9ae3a8 |
+ ibv_ack_cq_events(cq, num_cq_events);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Post a SEND message work request for the control channel
|
|
|
9ae3a8 |
+ * containing some data and block until the post completes.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_post_send_control(RDMAContext *rdma, uint8_t *buf,
|
|
|
9ae3a8 |
+ RDMAControlHeader *head)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+ RDMAWorkRequestData *wr = &rdma->wr_data[RDMA_WRID_MAX];
|
|
|
9ae3a8 |
+ struct ibv_send_wr *bad_wr;
|
|
|
9ae3a8 |
+ struct ibv_sge sge = {
|
|
|
9ae3a8 |
+ .addr = (uint64_t)(wr->control),
|
|
|
9ae3a8 |
+ .length = head->len + sizeof(RDMAControlHeader),
|
|
|
9ae3a8 |
+ .lkey = wr->control_mr->lkey,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ struct ibv_send_wr send_wr = {
|
|
|
9ae3a8 |
+ .wr_id = RDMA_WRID_SEND_CONTROL,
|
|
|
9ae3a8 |
+ .opcode = IBV_WR_SEND,
|
|
|
9ae3a8 |
+ .send_flags = IBV_SEND_SIGNALED,
|
|
|
9ae3a8 |
+ .sg_list = &sge,
|
|
|
9ae3a8 |
+ .num_sge = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("CONTROL: sending %s..\n", control_desc[head->type]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * We don't actually need to do a memcpy() in here if we used
|
|
|
9ae3a8 |
+ * the "sge" properly, but since we're only sending control messages
|
|
|
9ae3a8 |
+ * (not RAM in a performance-critical path), then its OK for now.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * The copy makes the RDMAControlHeader simpler to manipulate
|
|
|
9ae3a8 |
+ * for the time being.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ memcpy(wr->control, head, sizeof(RDMAControlHeader));
|
|
|
9ae3a8 |
+ control_to_network((void *) wr->control);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (buf) {
|
|
|
9ae3a8 |
+ memcpy(wr->control + sizeof(RDMAControlHeader), buf, head->len);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ibv_post_send(rdma->qp, &send_wr, &bad_wr)) {
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to use post IB SEND for control!\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_SEND_CONTROL);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: send polling control error!\n");
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Post a RECV work request in anticipation of some future receipt
|
|
|
9ae3a8 |
+ * of data on the control channel.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_post_recv_control(RDMAContext *rdma, int idx)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ struct ibv_recv_wr *bad_wr;
|
|
|
9ae3a8 |
+ struct ibv_sge sge = {
|
|
|
9ae3a8 |
+ .addr = (uint64_t)(rdma->wr_data[idx].control),
|
|
|
9ae3a8 |
+ .length = RDMA_CONTROL_MAX_BUFFER,
|
|
|
9ae3a8 |
+ .lkey = rdma->wr_data[idx].control_mr->lkey,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ struct ibv_recv_wr recv_wr = {
|
|
|
9ae3a8 |
+ .wr_id = RDMA_WRID_RECV_CONTROL + idx,
|
|
|
9ae3a8 |
+ .sg_list = &sge,
|
|
|
9ae3a8 |
+ .num_sge = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ibv_post_recv(rdma->qp, &recv_wr, &bad_wr)) {
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Block and wait for a RECV control channel message to arrive.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_exchange_get_response(RDMAContext *rdma,
|
|
|
9ae3a8 |
+ RDMAControlHeader *head, int expecting, int idx)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RECV_CONTROL + idx);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: recv polling control error!\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ network_to_control((void *) rdma->wr_data[idx].control);
|
|
|
9ae3a8 |
+ memcpy(head, rdma->wr_data[idx].control, sizeof(RDMAControlHeader));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("CONTROL: %s receiving...\n", control_desc[expecting]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (expecting == RDMA_CONTROL_NONE) {
|
|
|
9ae3a8 |
+ DDDPRINTF("Surprise: got %s (%d)\n",
|
|
|
9ae3a8 |
+ control_desc[head->type], head->type);
|
|
|
9ae3a8 |
+ } else if (head->type != expecting || head->type == RDMA_CONTROL_ERROR) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Was expecting a %s (%d) control message"
|
|
|
9ae3a8 |
+ ", but got: %s (%d), length: %d\n",
|
|
|
9ae3a8 |
+ control_desc[expecting], expecting,
|
|
|
9ae3a8 |
+ control_desc[head->type], head->type, head->len);
|
|
|
9ae3a8 |
+ return -EIO;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * When a RECV work request has completed, the work request's
|
|
|
9ae3a8 |
+ * buffer is pointed at the header.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * This will advance the pointer to the data portion
|
|
|
9ae3a8 |
+ * of the control message of the work request's buffer that
|
|
|
9ae3a8 |
+ * was populated after the work request finished.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static void qemu_rdma_move_header(RDMAContext *rdma, int idx,
|
|
|
9ae3a8 |
+ RDMAControlHeader *head)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_len = head->len;
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_curr =
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control + sizeof(RDMAControlHeader);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * This is an 'atomic' high-level operation to deliver a single, unified
|
|
|
9ae3a8 |
+ * control-channel message.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Additionally, if the user is expecting some kind of reply to this message,
|
|
|
9ae3a8 |
+ * they can request a 'resp' response message be filled in by posting an
|
|
|
9ae3a8 |
+ * additional work request on behalf of the user and waiting for an additional
|
|
|
9ae3a8 |
+ * completion.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * The extra (optional) response is used during registration to us from having
|
|
|
9ae3a8 |
+ * to perform an *additional* exchange of message just to provide a response by
|
|
|
9ae3a8 |
+ * instead piggy-backing on the acknowledgement.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_exchange_send(RDMAContext *rdma, RDMAControlHeader *head,
|
|
|
9ae3a8 |
+ uint8_t *data, RDMAControlHeader *resp,
|
|
|
9ae3a8 |
+ int *resp_idx,
|
|
|
9ae3a8 |
+ int (*callback)(RDMAContext *rdma))
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Wait until the dest is ready before attempting to deliver the message
|
|
|
9ae3a8 |
+ * by waiting for a READY message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (rdma->control_ready_expected) {
|
|
|
9ae3a8 |
+ RDMAControlHeader resp;
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_get_response(rdma,
|
|
|
9ae3a8 |
+ &resp, RDMA_CONTROL_READY, RDMA_WRID_READY);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * If the user is expecting a response, post a WR in anticipation of it.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (resp) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_DATA);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error posting"
|
|
|
9ae3a8 |
+ " extra control recv for anticipated result!");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Post a WR to replace the one we just consumed for the READY message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error posting first control recv!");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Deliver the control message that was requested.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_send_control(rdma, data, head);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to send control buffer!\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * If we're expecting a response, block and wait for it.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (resp) {
|
|
|
9ae3a8 |
+ if (callback) {
|
|
|
9ae3a8 |
+ DDPRINTF("Issuing callback before receiving response...\n");
|
|
|
9ae3a8 |
+ ret = callback(rdma);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Waiting for response %s\n", control_desc[resp->type]);
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_get_response(rdma, resp,
|
|
|
9ae3a8 |
+ resp->type, RDMA_WRID_DATA);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_move_header(rdma, RDMA_WRID_DATA, resp);
|
|
|
9ae3a8 |
+ if (resp_idx) {
|
|
|
9ae3a8 |
+ *resp_idx = RDMA_WRID_DATA;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ DDPRINTF("Response %s received.\n", control_desc[resp->type]);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->control_ready_expected = 1;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * This is an 'atomic' high-level operation to receive a single, unified
|
|
|
9ae3a8 |
+ * control-channel message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_exchange_recv(RDMAContext *rdma, RDMAControlHeader *head,
|
|
|
9ae3a8 |
+ int expecting)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMAControlHeader ready = {
|
|
|
9ae3a8 |
+ .len = 0,
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_READY,
|
|
|
9ae3a8 |
+ .repeat = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Inform the source that we're ready to receive a message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_send_control(rdma, NULL, &ready);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to send control buffer!\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Block and wait for the message.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_get_response(rdma, head,
|
|
|
9ae3a8 |
+ expecting, RDMA_WRID_READY);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_move_header(rdma, RDMA_WRID_READY, head);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Post a new RECV work request to replace the one we just consumed.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error posting second control recv!");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Write an actual chunk of memory using RDMA.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * If we're using dynamic registration on the dest-side, we have to
|
|
|
9ae3a8 |
+ * send a registration command first.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_write_one(QEMUFile *f, RDMAContext *rdma,
|
|
|
9ae3a8 |
+ int current_index, uint64_t current_addr,
|
|
|
9ae3a8 |
+ uint64_t length)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ struct ibv_sge sge;
|
|
|
9ae3a8 |
+ struct ibv_send_wr send_wr = { 0 };
|
|
|
9ae3a8 |
+ struct ibv_send_wr *bad_wr;
|
|
|
9ae3a8 |
+ int reg_result_idx, ret, count = 0;
|
|
|
9ae3a8 |
+ uint64_t chunk, chunks;
|
|
|
9ae3a8 |
+ uint8_t *chunk_start, *chunk_end;
|
|
|
9ae3a8 |
+ RDMALocalBlock *block = &(rdma->local_ram_blocks.block[current_index]);
|
|
|
9ae3a8 |
+ RDMARegister reg;
|
|
|
9ae3a8 |
+ RDMARegisterResult *reg_result;
|
|
|
9ae3a8 |
+ RDMAControlHeader resp = { .type = RDMA_CONTROL_REGISTER_RESULT };
|
|
|
9ae3a8 |
+ RDMAControlHeader head = { .len = sizeof(RDMARegister),
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_REGISTER_REQUEST,
|
|
|
9ae3a8 |
+ .repeat = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+retry:
|
|
|
9ae3a8 |
+ sge.addr = (uint64_t)(block->local_host_addr +
|
|
|
9ae3a8 |
+ (current_addr - block->offset));
|
|
|
9ae3a8 |
+ sge.length = length;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ chunk = ram_chunk_index(block->local_host_addr, (uint8_t *) sge.addr);
|
|
|
9ae3a8 |
+ chunk_start = ram_chunk_start(block, chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (block->is_ram_block) {
|
|
|
9ae3a8 |
+ chunks = length / (1UL << RDMA_REG_CHUNK_SHIFT);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (chunks && ((length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) {
|
|
|
9ae3a8 |
+ chunks--;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ chunks = block->length / (1UL << RDMA_REG_CHUNK_SHIFT);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (chunks && ((block->length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) {
|
|
|
9ae3a8 |
+ chunks--;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Writing %" PRIu64 " chunks, (%" PRIu64 " MB)\n",
|
|
|
9ae3a8 |
+ chunks + 1, (chunks + 1) * (1UL << RDMA_REG_CHUNK_SHIFT) / 1024 / 1024);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ chunk_end = ram_chunk_end(block, chunk + chunks);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!rdma->pin_all) {
|
|
|
9ae3a8 |
+#ifdef RDMA_UNREGISTRATION_EXAMPLE
|
|
|
9ae3a8 |
+ qemu_rdma_unregister_waiting(rdma);
|
|
|
9ae3a8 |
+#endif
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ while (test_bit(chunk, block->transit_bitmap)) {
|
|
|
9ae3a8 |
+ (void)count;
|
|
|
9ae3a8 |
+ DDPRINTF("(%d) Not clobbering: block: %d chunk %" PRIu64
|
|
|
9ae3a8 |
+ " current %" PRIu64 " len %" PRIu64 " %d %d\n",
|
|
|
9ae3a8 |
+ count++, current_index, chunk,
|
|
|
9ae3a8 |
+ sge.addr, length, rdma->nb_sent, block->nb_chunks);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to Wait for previous write to complete "
|
|
|
9ae3a8 |
+ "block %d chunk %" PRIu64
|
|
|
9ae3a8 |
+ " current %" PRIu64 " len %" PRIu64 " %d\n",
|
|
|
9ae3a8 |
+ current_index, chunk, sge.addr, length, rdma->nb_sent);
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!rdma->pin_all || !block->is_ram_block) {
|
|
|
9ae3a8 |
+ if (!block->remote_keys[chunk]) {
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * This chunk has not yet been registered, so first check to see
|
|
|
9ae3a8 |
+ * if the entire chunk is zero. If so, tell the other size to
|
|
|
9ae3a8 |
+ * memset() + madvise() the entire chunk without RDMA.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (can_use_buffer_find_nonzero_offset((void *)sge.addr, length)
|
|
|
9ae3a8 |
+ && buffer_find_nonzero_offset((void *)sge.addr,
|
|
|
9ae3a8 |
+ length) == length) {
|
|
|
9ae3a8 |
+ RDMACompress comp = {
|
|
|
9ae3a8 |
+ .offset = current_addr,
|
|
|
9ae3a8 |
+ .value = 0,
|
|
|
9ae3a8 |
+ .block_idx = current_index,
|
|
|
9ae3a8 |
+ .length = length,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ head.len = sizeof(comp);
|
|
|
9ae3a8 |
+ head.type = RDMA_CONTROL_COMPRESS;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Entire chunk is zero, sending compress: %"
|
|
|
9ae3a8 |
+ PRIu64 " for %d "
|
|
|
9ae3a8 |
+ "bytes, index: %d, offset: %" PRId64 "...\n",
|
|
|
9ae3a8 |
+ chunk, sge.length, current_index, current_addr);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ compress_to_network(&comp);
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head,
|
|
|
9ae3a8 |
+ (uint8_t *) &comp, NULL, NULL, NULL);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return -EIO;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ acct_update_position(f, sge.length, true);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Otherwise, tell other side to register.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ reg.current_index = current_index;
|
|
|
9ae3a8 |
+ if (block->is_ram_block) {
|
|
|
9ae3a8 |
+ reg.key.current_addr = current_addr;
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ reg.key.chunk = chunk;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ reg.chunks = chunks;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Sending registration request chunk %" PRIu64 " for %d "
|
|
|
9ae3a8 |
+ "bytes, index: %d, offset: %" PRId64 "...\n",
|
|
|
9ae3a8 |
+ chunk, sge.length, current_index, current_addr);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ register_to_network(®);
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) ®,
|
|
|
9ae3a8 |
+ &resp, ®_result_idx, NULL);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* try to overlap this single registration with the one we sent. */
|
|
|
9ae3a8 |
+ if (qemu_rdma_register_and_get_keys(rdma, block,
|
|
|
9ae3a8 |
+ (uint8_t *) sge.addr,
|
|
|
9ae3a8 |
+ &sge.lkey, NULL, chunk,
|
|
|
9ae3a8 |
+ chunk_start, chunk_end)) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "cannot get lkey!\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg_result = (RDMARegisterResult *)
|
|
|
9ae3a8 |
+ rdma->wr_data[reg_result_idx].control_curr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ network_to_result(reg_result);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Received registration result:"
|
|
|
9ae3a8 |
+ " my key: %x their key %x, chunk %" PRIu64 "\n",
|
|
|
9ae3a8 |
+ block->remote_keys[chunk], reg_result->rkey, chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block->remote_keys[chunk] = reg_result->rkey;
|
|
|
9ae3a8 |
+ block->remote_host_addr = reg_result->host_addr;
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ /* already registered before */
|
|
|
9ae3a8 |
+ if (qemu_rdma_register_and_get_keys(rdma, block,
|
|
|
9ae3a8 |
+ (uint8_t *)sge.addr,
|
|
|
9ae3a8 |
+ &sge.lkey, NULL, chunk,
|
|
|
9ae3a8 |
+ chunk_start, chunk_end)) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "cannot get lkey!\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ send_wr.wr.rdma.rkey = block->remote_keys[chunk];
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ send_wr.wr.rdma.rkey = block->remote_rkey;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (qemu_rdma_register_and_get_keys(rdma, block, (uint8_t *)sge.addr,
|
|
|
9ae3a8 |
+ &sge.lkey, NULL, chunk,
|
|
|
9ae3a8 |
+ chunk_start, chunk_end)) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "cannot get lkey!\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Encode the ram block index and chunk within this wrid.
|
|
|
9ae3a8 |
+ * We will use this information at the time of completion
|
|
|
9ae3a8 |
+ * to figure out which bitmap to check against and then which
|
|
|
9ae3a8 |
+ * chunk in the bitmap to look for.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ send_wr.wr_id = qemu_rdma_make_wrid(RDMA_WRID_RDMA_WRITE,
|
|
|
9ae3a8 |
+ current_index, chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ send_wr.opcode = IBV_WR_RDMA_WRITE;
|
|
|
9ae3a8 |
+ send_wr.send_flags = IBV_SEND_SIGNALED;
|
|
|
9ae3a8 |
+ send_wr.sg_list = &sg;;
|
|
|
9ae3a8 |
+ send_wr.num_sge = 1;
|
|
|
9ae3a8 |
+ send_wr.wr.rdma.remote_addr = block->remote_host_addr +
|
|
|
9ae3a8 |
+ (current_addr - block->offset);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("Posting chunk: %" PRIu64 ", addr: %lx"
|
|
|
9ae3a8 |
+ " remote: %lx, bytes %" PRIu32 "\n",
|
|
|
9ae3a8 |
+ chunk, sge.addr, send_wr.wr.rdma.remote_addr,
|
|
|
9ae3a8 |
+ sge.length);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * ibv_post_send() does not return negative error numbers,
|
|
|
9ae3a8 |
+ * per the specification they are positive - no idea why.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = ibv_post_send(rdma->qp, &send_wr, &bad_wr);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret == ENOMEM) {
|
|
|
9ae3a8 |
+ DDPRINTF("send queue is full. wait a little....\n");
|
|
|
9ae3a8 |
+ ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: failed to make "
|
|
|
9ae3a8 |
+ "room in full send queue! %d\n", ret);
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ goto retry;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ } else if (ret > 0) {
|
|
|
9ae3a8 |
+ perror("rdma migration: post rdma write failed");
|
|
|
9ae3a8 |
+ return -ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ set_bit(chunk, block->transit_bitmap);
|
|
|
9ae3a8 |
+ acct_update_position(f, sge.length, false);
|
|
|
9ae3a8 |
+ rdma->total_writes++;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Push out any unwritten RDMA operations.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * We support sending out multiple chunks at the same time.
|
|
|
9ae3a8 |
+ * Not all of them need to get signaled in the completion queue.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_write_flush(QEMUFile *f, RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!rdma->current_length) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_write_one(f, rdma,
|
|
|
9ae3a8 |
+ rdma->current_index, rdma->current_addr, rdma->current_length);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret == 0) {
|
|
|
9ae3a8 |
+ rdma->nb_sent++;
|
|
|
9ae3a8 |
+ DDDPRINTF("sent total: %d\n", rdma->nb_sent);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->current_length = 0;
|
|
|
9ae3a8 |
+ rdma->current_addr = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static inline int qemu_rdma_buffer_mergable(RDMAContext *rdma,
|
|
|
9ae3a8 |
+ uint64_t offset, uint64_t len)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMALocalBlock *block =
|
|
|
9ae3a8 |
+ &(rdma->local_ram_blocks.block[rdma->current_index]);
|
|
|
9ae3a8 |
+ uint8_t *host_addr = block->local_host_addr + (offset - block->offset);
|
|
|
9ae3a8 |
+ uint8_t *chunk_end = ram_chunk_end(block, rdma->current_chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->current_length == 0) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Only merge into chunk sequentially.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (offset != (rdma->current_addr + rdma->current_length)) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->current_index < 0) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (offset < block->offset) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if ((offset + len) > (block->offset + block->length)) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->current_chunk < 0) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if ((host_addr + len) > chunk_end) {
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 1;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * We're not actually writing here, but doing three things:
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * 1. Identify the chunk the buffer belongs to.
|
|
|
9ae3a8 |
+ * 2. If the chunk is full or the buffer doesn't belong to the current
|
|
|
9ae3a8 |
+ * chunk, then start a new chunk and flush() the old chunk.
|
|
|
9ae3a8 |
+ * 3. To keep the hardware busy, we also group chunks into batches
|
|
|
9ae3a8 |
+ * and only require that a batch gets acknowledged in the completion
|
|
|
9ae3a8 |
+ * qeueue instead of each individual chunk.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_write(QEMUFile *f, RDMAContext *rdma,
|
|
|
9ae3a8 |
+ uint64_t block_offset, uint64_t offset,
|
|
|
9ae3a8 |
+ uint64_t len)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ uint64_t current_addr = block_offset + offset;
|
|
|
9ae3a8 |
+ uint64_t index = rdma->current_index;
|
|
|
9ae3a8 |
+ uint64_t chunk = rdma->current_chunk;
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* If we cannot merge it, we flush the current buffer first. */
|
|
|
9ae3a8 |
+ if (!qemu_rdma_buffer_mergable(rdma, current_addr, len)) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_write_flush(f, rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->current_length = 0;
|
|
|
9ae3a8 |
+ rdma->current_addr = current_addr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_search_ram_block(rdma, block_offset,
|
|
|
9ae3a8 |
+ offset, len, &index, &chunk);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "ram block search failed\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->current_index = index;
|
|
|
9ae3a8 |
+ rdma->current_chunk = chunk;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* merge it */
|
|
|
9ae3a8 |
+ rdma->current_length += len;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* flush it if buffer is too large */
|
|
|
9ae3a8 |
+ if (rdma->current_length >= RDMA_MERGE_MAX) {
|
|
|
9ae3a8 |
+ return qemu_rdma_write_flush(f, rdma);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void qemu_rdma_cleanup(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ struct rdma_cm_event *cm_event;
|
|
|
9ae3a8 |
+ int ret, idx;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->cm_id) {
|
|
|
9ae3a8 |
+ if (rdma->error_state) {
|
|
|
9ae3a8 |
+ RDMAControlHeader head = { .len = 0,
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_ERROR,
|
|
|
9ae3a8 |
+ .repeat = 1,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ fprintf(stderr, "Early error. Sending error.\n");
|
|
|
9ae3a8 |
+ qemu_rdma_post_send_control(rdma, NULL, &head;;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_disconnect(rdma->cm_id);
|
|
|
9ae3a8 |
+ if (!ret) {
|
|
|
9ae3a8 |
+ DDPRINTF("waiting for disconnect\n");
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (!ret) {
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ DDPRINTF("Disconnected.\n");
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ g_free(rdma->block);
|
|
|
9ae3a8 |
+ rdma->block = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (idx = 0; idx <= RDMA_WRID_MAX; idx++) {
|
|
|
9ae3a8 |
+ if (rdma->wr_data[idx].control_mr) {
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+ ibv_dereg_mr(rdma->wr_data[idx].control_mr);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_mr = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->local_ram_blocks.block) {
|
|
|
9ae3a8 |
+ while (rdma->local_ram_blocks.nb_blocks) {
|
|
|
9ae3a8 |
+ __qemu_rdma_delete_block(rdma,
|
|
|
9ae3a8 |
+ rdma->local_ram_blocks.block->offset);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->qp) {
|
|
|
9ae3a8 |
+ ibv_destroy_qp(rdma->qp);
|
|
|
9ae3a8 |
+ rdma->qp = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->cq) {
|
|
|
9ae3a8 |
+ ibv_destroy_cq(rdma->cq);
|
|
|
9ae3a8 |
+ rdma->cq = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->comp_channel) {
|
|
|
9ae3a8 |
+ ibv_destroy_comp_channel(rdma->comp_channel);
|
|
|
9ae3a8 |
+ rdma->comp_channel = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->pd) {
|
|
|
9ae3a8 |
+ ibv_dealloc_pd(rdma->pd);
|
|
|
9ae3a8 |
+ rdma->pd = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->listen_id) {
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->listen_id);
|
|
|
9ae3a8 |
+ rdma->listen_id = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->cm_id) {
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->cm_id);
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ if (rdma->channel) {
|
|
|
9ae3a8 |
+ rdma_destroy_event_channel(rdma->channel);
|
|
|
9ae3a8 |
+ rdma->channel = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_source_init(RDMAContext *rdma, Error **errp, bool pin_all)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret, idx;
|
|
|
9ae3a8 |
+ Error *local_err = NULL, **temp = &local_err;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Will be validated against destination's actual capabilities
|
|
|
9ae3a8 |
+ * after the connect() completes.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ rdma->pin_all = pin_all;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_resolve_host(rdma, temp);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ goto err_rdma_source_init;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_alloc_pd_cq(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(temp, "rdma migration: error allocating pd and cq! Your mlock()"
|
|
|
9ae3a8 |
+ " limits may be too low. Please check $ ulimit -a # and "
|
|
|
9ae3a8 |
+ "search for 'ulimit -l' in the output\n");
|
|
|
9ae3a8 |
+ goto err_rdma_source_init;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_alloc_qp(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(temp, "rdma migration: error allocating qp!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_source_init;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_init_ram_blocks(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(temp, "rdma migration: error initializing ram blocks!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_source_init;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (idx = 0; idx <= RDMA_WRID_MAX; idx++) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_reg_control(rdma, idx);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(temp, "rdma migration: error registering %d control!\n",
|
|
|
9ae3a8 |
+ idx);
|
|
|
9ae3a8 |
+ goto err_rdma_source_init;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_rdma_source_init:
|
|
|
9ae3a8 |
+ error_propagate(errp, local_err);
|
|
|
9ae3a8 |
+ qemu_rdma_cleanup(rdma);
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_connect(RDMAContext *rdma, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMACapabilities cap = {
|
|
|
9ae3a8 |
+ .version = RDMA_CONTROL_VERSION_CURRENT,
|
|
|
9ae3a8 |
+ .flags = 0,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ struct rdma_conn_param conn_param = { .initiator_depth = 2,
|
|
|
9ae3a8 |
+ .retry_count = 5,
|
|
|
9ae3a8 |
+ .private_data = &cap,
|
|
|
9ae3a8 |
+ .private_data_len = sizeof(cap),
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ struct rdma_cm_event *cm_event;
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Only negotiate the capability with destination if the user
|
|
|
9ae3a8 |
+ * on the source first requested the capability.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (rdma->pin_all) {
|
|
|
9ae3a8 |
+ DPRINTF("Server pin-all memory requested.\n");
|
|
|
9ae3a8 |
+ cap.flags |= RDMA_CAPABILITY_PIN_ALL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ caps_to_network(&cap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_connect(rdma->cm_id, &conn_param);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ perror("rdma_connect");
|
|
|
9ae3a8 |
+ ERROR(errp, "connecting to destination!\n");
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->cm_id);
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+ goto err_rdma_source_connect;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ perror("rdma_get_cm_event after rdma_connect");
|
|
|
9ae3a8 |
+ ERROR(errp, "connecting to destination!\n");
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->cm_id);
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+ goto err_rdma_source_connect;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (cm_event->event != RDMA_CM_EVENT_ESTABLISHED) {
|
|
|
9ae3a8 |
+ perror("rdma_get_cm_event != EVENT_ESTABLISHED after rdma_connect");
|
|
|
9ae3a8 |
+ ERROR(errp, "connecting to destination!\n");
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ rdma_destroy_id(rdma->cm_id);
|
|
|
9ae3a8 |
+ rdma->cm_id = NULL;
|
|
|
9ae3a8 |
+ goto err_rdma_source_connect;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ memcpy(&cap, cm_event->param.conn.private_data, sizeof(cap));
|
|
|
9ae3a8 |
+ network_to_caps(&cap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Verify that the *requested* capabilities are supported by the destination
|
|
|
9ae3a8 |
+ * and disable them otherwise.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (rdma->pin_all && !(cap.flags & RDMA_CAPABILITY_PIN_ALL)) {
|
|
|
9ae3a8 |
+ ERROR(errp, "Server cannot support pinning all memory. "
|
|
|
9ae3a8 |
+ "Will register memory dynamically.\n");
|
|
|
9ae3a8 |
+ rdma->pin_all = false;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("Pin all memory: %s\n", rdma->pin_all ? "enabled" : "disabled");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_recv_control(rdma, 0);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "posting second control recv!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_source_connect;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->control_ready_expected = 1;
|
|
|
9ae3a8 |
+ rdma->nb_sent = 0;
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_rdma_source_connect:
|
|
|
9ae3a8 |
+ qemu_rdma_cleanup(rdma);
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_dest_init(RDMAContext *rdma, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret = -EINVAL, idx;
|
|
|
9ae3a8 |
+ struct sockaddr_in sin;
|
|
|
9ae3a8 |
+ struct rdma_cm_id *listen_id;
|
|
|
9ae3a8 |
+ char ip[40] = "unknown";
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (idx = 0; idx <= RDMA_WRID_MAX; idx++) {
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_len = 0;
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_curr = NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->host == NULL) {
|
|
|
9ae3a8 |
+ ERROR(errp, "RDMA host is not set!\n");
|
|
|
9ae3a8 |
+ rdma->error_state = -EINVAL;
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ /* create CM channel */
|
|
|
9ae3a8 |
+ rdma->channel = rdma_create_event_channel();
|
|
|
9ae3a8 |
+ if (!rdma->channel) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not create rdma event channel\n");
|
|
|
9ae3a8 |
+ rdma->error_state = -EINVAL;
|
|
|
9ae3a8 |
+ return -1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* create CM id */
|
|
|
9ae3a8 |
+ ret = rdma_create_id(rdma->channel, &listen_id, NULL, RDMA_PS_TCP);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not create cm_id!\n");
|
|
|
9ae3a8 |
+ goto err_dest_init_create_listen_id;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ memset(&sin, 0, sizeof(sin));
|
|
|
9ae3a8 |
+ sin.sin_family = AF_INET;
|
|
|
9ae3a8 |
+ sin.sin_port = htons(rdma->port);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->host && strcmp("", rdma->host)) {
|
|
|
9ae3a8 |
+ struct hostent *dest_addr;
|
|
|
9ae3a8 |
+ dest_addr = gethostbyname(rdma->host);
|
|
|
9ae3a8 |
+ if (!dest_addr) {
|
|
|
9ae3a8 |
+ ERROR(errp, "migration could not gethostbyname!\n");
|
|
|
9ae3a8 |
+ ret = -EINVAL;
|
|
|
9ae3a8 |
+ goto err_dest_init_bind_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ memcpy(&sin.sin_addr.s_addr, dest_addr->h_addr,
|
|
|
9ae3a8 |
+ dest_addr->h_length);
|
|
|
9ae3a8 |
+ inet_ntop(AF_INET, dest_addr->h_addr, ip, sizeof ip);
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ sin.sin_addr.s_addr = INADDR_ANY;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("%s => %s\n", rdma->host, ip);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_bind_addr(listen_id, (struct sockaddr *)&sin;;
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "Error: could not rdma_bind_addr!\n");
|
|
|
9ae3a8 |
+ goto err_dest_init_bind_addr;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->listen_id = listen_id;
|
|
|
9ae3a8 |
+ qemu_rdma_dump_gid("dest_init", listen_id);
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_dest_init_bind_addr:
|
|
|
9ae3a8 |
+ rdma_destroy_id(listen_id);
|
|
|
9ae3a8 |
+err_dest_init_create_listen_id:
|
|
|
9ae3a8 |
+ rdma_destroy_event_channel(rdma->channel);
|
|
|
9ae3a8 |
+ rdma->channel = NULL;
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void *qemu_rdma_data_init(const char *host_port, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMAContext *rdma = NULL;
|
|
|
9ae3a8 |
+ InetSocketAddress *addr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (host_port) {
|
|
|
9ae3a8 |
+ rdma = g_malloc0(sizeof(RDMAContext));
|
|
|
9ae3a8 |
+ memset(rdma, 0, sizeof(RDMAContext));
|
|
|
9ae3a8 |
+ rdma->current_index = -1;
|
|
|
9ae3a8 |
+ rdma->current_chunk = -1;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ addr = inet_parse(host_port, NULL);
|
|
|
9ae3a8 |
+ if (addr != NULL) {
|
|
|
9ae3a8 |
+ rdma->port = atoi(addr->port);
|
|
|
9ae3a8 |
+ rdma->host = g_strdup(addr->host);
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ ERROR(errp, "bad RDMA migration address '%s'", host_port);
|
|
|
9ae3a8 |
+ g_free(rdma);
|
|
|
9ae3a8 |
+ return NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return rdma;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * QEMUFile interface to the control channel.
|
|
|
9ae3a8 |
+ * SEND messages for control only.
|
|
|
9ae3a8 |
+ * pc.ram is handled with regular RDMA messages.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_put_buffer(void *opaque, const uint8_t *buf,
|
|
|
9ae3a8 |
+ int64_t pos, int size)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *r = opaque;
|
|
|
9ae3a8 |
+ QEMUFile *f = r->file;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = r->rdma;
|
|
|
9ae3a8 |
+ size_t remaining = size;
|
|
|
9ae3a8 |
+ uint8_t * data = (void *) buf;
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Push out any writes that
|
|
|
9ae3a8 |
+ * we're queued up for pc.ram.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_write_flush(f, rdma);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ while (remaining) {
|
|
|
9ae3a8 |
+ RDMAControlHeader head;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ r->len = MIN(remaining, RDMA_SEND_INCREMENT);
|
|
|
9ae3a8 |
+ remaining -= r->len;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ head.len = r->len;
|
|
|
9ae3a8 |
+ head.type = RDMA_CONTROL_QEMU_FILE;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head, data, NULL, NULL, NULL);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ data += r->len;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return size;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static size_t qemu_rdma_fill(RDMAContext *rdma, uint8_t *buf,
|
|
|
9ae3a8 |
+ int size, int idx)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ size_t len = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->wr_data[idx].control_len) {
|
|
|
9ae3a8 |
+ DDDPRINTF("RDMA %" PRId64 " of %d bytes already in buffer\n",
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_len, size);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ len = MIN(size, rdma->wr_data[idx].control_len);
|
|
|
9ae3a8 |
+ memcpy(buf, rdma->wr_data[idx].control_curr, len);
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_curr += len;
|
|
|
9ae3a8 |
+ rdma->wr_data[idx].control_len -= len;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return len;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * QEMUFile interface to the control channel.
|
|
|
9ae3a8 |
+ * RDMA links don't use bytestreams, so we have to
|
|
|
9ae3a8 |
+ * return bytes to QEMUFile opportunistically.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_get_buffer(void *opaque, uint8_t *buf,
|
|
|
9ae3a8 |
+ int64_t pos, int size)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *r = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = r->rdma;
|
|
|
9ae3a8 |
+ RDMAControlHeader head;
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * First, we hold on to the last SEND message we
|
|
|
9ae3a8 |
+ * were given and dish out the bytes until we run
|
|
|
9ae3a8 |
+ * out of bytes.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ r->len = qemu_rdma_fill(r->rdma, buf, size, 0);
|
|
|
9ae3a8 |
+ if (r->len) {
|
|
|
9ae3a8 |
+ return r->len;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Once we run out, we block and wait for another
|
|
|
9ae3a8 |
+ * SEND message to arrive.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_recv(rdma, &head, RDMA_CONTROL_QEMU_FILE);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * SEND was received with new bytes, now try again.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ return qemu_rdma_fill(r->rdma, buf, size, 0);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Block until all the outstanding chunks have been delivered by the hardware.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_drain_cq(QEMUFile *f, RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (qemu_rdma_write_flush(f, rdma) < 0) {
|
|
|
9ae3a8 |
+ return -EIO;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ while (rdma->nb_sent) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: complete polling error!\n");
|
|
|
9ae3a8 |
+ return -EIO;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_unregister_waiting(rdma);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_close(void *opaque)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ DPRINTF("Shutting down connection.\n");
|
|
|
9ae3a8 |
+ QEMUFileRDMA *r = opaque;
|
|
|
9ae3a8 |
+ if (r->rdma) {
|
|
|
9ae3a8 |
+ qemu_rdma_cleanup(r->rdma);
|
|
|
9ae3a8 |
+ g_free(r->rdma);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ g_free(r);
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Parameters:
|
|
|
9ae3a8 |
+ * @offset == 0 :
|
|
|
9ae3a8 |
+ * This means that 'block_offset' is a full virtual address that does not
|
|
|
9ae3a8 |
+ * belong to a RAMBlock of the virtual machine and instead
|
|
|
9ae3a8 |
+ * represents a private malloc'd memory area that the caller wishes to
|
|
|
9ae3a8 |
+ * transfer.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * @offset != 0 :
|
|
|
9ae3a8 |
+ * Offset is an offset to be added to block_offset and used
|
|
|
9ae3a8 |
+ * to also lookup the corresponding RAMBlock.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * @size > 0 :
|
|
|
9ae3a8 |
+ * Initiate an transfer this size.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * @size == 0 :
|
|
|
9ae3a8 |
+ * A 'hint' or 'advice' that means that we wish to speculatively
|
|
|
9ae3a8 |
+ * and asynchronously unregister this memory. In this case, there is no
|
|
|
9ae3a8 |
+ * gaurantee that the unregister will actually happen, for example,
|
|
|
9ae3a8 |
+ * if the memory is being actively transmitted. Additionally, the memory
|
|
|
9ae3a8 |
+ * may be re-registered at any future time if a write within the same
|
|
|
9ae3a8 |
+ * chunk was requested again, even if you attempted to unregister it
|
|
|
9ae3a8 |
+ * here.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * @size < 0 : TODO, not yet supported
|
|
|
9ae3a8 |
+ * Unregister the memory NOW. This means that the caller does not
|
|
|
9ae3a8 |
+ * expect there to be any future RDMA transfers and we just want to clean
|
|
|
9ae3a8 |
+ * things up. This is used in case the upper layer owns the memory and
|
|
|
9ae3a8 |
+ * cannot wait for qemu_fclose() to occur.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * @bytes_sent : User-specificed pointer to indicate how many bytes were
|
|
|
9ae3a8 |
+ * sent. Usually, this will not be more than a few bytes of
|
|
|
9ae3a8 |
+ * the protocol because most transfers are sent asynchronously.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static size_t qemu_rdma_save_page(QEMUFile *f, void *opaque,
|
|
|
9ae3a8 |
+ ram_addr_t block_offset, ram_addr_t offset,
|
|
|
9ae3a8 |
+ size_t size, int *bytes_sent)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *rfile = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = rfile->rdma;
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_fflush(f);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (size > 0) {
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Add this page to the current 'chunk'. If the chunk
|
|
|
9ae3a8 |
+ * is full, or the page doen't belong to the current chunk,
|
|
|
9ae3a8 |
+ * an actual RDMA write will occur and a new chunk will be formed.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_write(f, rdma, block_offset, offset, size);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: write error! %d\n", ret);
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * We always return 1 bytes because the RDMA
|
|
|
9ae3a8 |
+ * protocol is completely asynchronous. We do not yet know
|
|
|
9ae3a8 |
+ * whether an identified chunk is zero or not because we're
|
|
|
9ae3a8 |
+ * waiting for other pages to potentially be merged with
|
|
|
9ae3a8 |
+ * the current chunk. So, we have to call qemu_update_position()
|
|
|
9ae3a8 |
+ * later on when the actual write occurs.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (bytes_sent) {
|
|
|
9ae3a8 |
+ *bytes_sent = 1;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ uint64_t index, chunk;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* TODO: Change QEMUFileOps prototype to be signed: size_t => long
|
|
|
9ae3a8 |
+ if (size < 0) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_drain_cq(f, rdma);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma: failed to synchronously drain"
|
|
|
9ae3a8 |
+ " completion queue before unregistration.\n");
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_search_ram_block(rdma, block_offset,
|
|
|
9ae3a8 |
+ offset, size, &index, &chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "ram block search failed\n");
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_signal_unregister(rdma, index, chunk, 0);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * TODO: Synchronous, gauranteed unregistration (should not occur during
|
|
|
9ae3a8 |
+ * fast-path). Otherwise, unregisters will process on the next call to
|
|
|
9ae3a8 |
+ * qemu_rdma_drain_cq()
|
|
|
9ae3a8 |
+ if (size < 0) {
|
|
|
9ae3a8 |
+ qemu_rdma_unregister_waiting(rdma);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Drain the Completion Queue if possible, but do not block,
|
|
|
9ae3a8 |
+ * just poll.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * If nothing to poll, the end of the iteration will do this
|
|
|
9ae3a8 |
+ * again to make sure we don't overflow the request queue.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ while (1) {
|
|
|
9ae3a8 |
+ uint64_t wr_id, wr_id_in;
|
|
|
9ae3a8 |
+ int ret = qemu_rdma_poll(rdma, &wr_id_in);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: polling error! %d\n", ret);
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (wr_id == RDMA_WRID_NONE) {
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return RAM_SAVE_CONTROL_DELAYED;
|
|
|
9ae3a8 |
+err:
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_accept(RDMAContext *rdma)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMACapabilities cap;
|
|
|
9ae3a8 |
+ struct rdma_conn_param conn_param = {
|
|
|
9ae3a8 |
+ .responder_resources = 2,
|
|
|
9ae3a8 |
+ .private_data = &cap,
|
|
|
9ae3a8 |
+ .private_data_len = sizeof(cap),
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ struct rdma_cm_event *cm_event;
|
|
|
9ae3a8 |
+ struct ibv_context *verbs;
|
|
|
9ae3a8 |
+ int ret = -EINVAL;
|
|
|
9ae3a8 |
+ int idx;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (cm_event->event != RDMA_CM_EVENT_CONNECT_REQUEST) {
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ memcpy(&cap, cm_event->param.conn.private_data, sizeof(cap));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ network_to_caps(&cap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (cap.version < 1 || cap.version > RDMA_CONTROL_VERSION_CURRENT) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Unknown source RDMA version: %d, bailing...\n",
|
|
|
9ae3a8 |
+ cap.version);
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Respond with only the capabilities this version of QEMU knows about.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ cap.flags &= known_capabilities;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Enable the ones that we do know about.
|
|
|
9ae3a8 |
+ * Add other checks here as new ones are introduced.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ if (cap.flags & RDMA_CAPABILITY_PIN_ALL) {
|
|
|
9ae3a8 |
+ rdma->pin_all = true;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->cm_id = cm_event->id;
|
|
|
9ae3a8 |
+ verbs = cm_event->id->verbs;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("Memory pin all: %s\n", rdma->pin_all ? "enabled" : "disabled");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ caps_to_network(&cap);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("verbs context after listen: %p\n", verbs);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (!rdma->verbs) {
|
|
|
9ae3a8 |
+ rdma->verbs = verbs;
|
|
|
9ae3a8 |
+ } else if (rdma->verbs != verbs) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "ibv context not matching %p, %p!\n",
|
|
|
9ae3a8 |
+ rdma->verbs, verbs);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_dump_id("dest_init", verbs);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_alloc_pd_cq(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error allocating pd and cq!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_alloc_qp(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error allocating qp!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_init_ram_blocks(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error initializing ram blocks!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (idx = 0; idx <= RDMA_WRID_MAX; idx++) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_reg_control(rdma, idx);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma: error registering %d control!\n", idx);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_set_fd_handler2(rdma->channel->fd, NULL, NULL, NULL, NULL);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_accept(rdma->cm_id, &conn_param);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma_accept returns %d!\n", ret);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_get_cm_event(rdma->channel, &cm_event);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma_accept get_cm_event failed %d!\n", ret);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (cm_event->event != RDMA_CM_EVENT_ESTABLISHED) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma_accept not event established!\n");
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma_ack_cm_event(cm_event);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_recv_control(rdma, 0);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error posting second control recv!\n");
|
|
|
9ae3a8 |
+ goto err_rdma_dest_wait;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_dump_gid("dest_connect", rdma->cm_id);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+err_rdma_dest_wait:
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ qemu_rdma_cleanup(rdma);
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * During each iteration of the migration, we listen for instructions
|
|
|
9ae3a8 |
+ * by the source VM to perform dynamic page registrations before they
|
|
|
9ae3a8 |
+ * can perform RDMA operations.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * We respond with the 'rkey'.
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Keep doing this until the source tells us to stop.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_registration_handle(QEMUFile *f, void *opaque,
|
|
|
9ae3a8 |
+ uint64_t flags)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMAControlHeader reg_resp = { .len = sizeof(RDMARegisterResult),
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_REGISTER_RESULT,
|
|
|
9ae3a8 |
+ .repeat = 0,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ RDMAControlHeader unreg_resp = { .len = 0,
|
|
|
9ae3a8 |
+ .type = RDMA_CONTROL_UNREGISTER_FINISHED,
|
|
|
9ae3a8 |
+ .repeat = 0,
|
|
|
9ae3a8 |
+ };
|
|
|
9ae3a8 |
+ RDMAControlHeader blocks = { .type = RDMA_CONTROL_RAM_BLOCKS_RESULT,
|
|
|
9ae3a8 |
+ .repeat = 1 };
|
|
|
9ae3a8 |
+ QEMUFileRDMA *rfile = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = rfile->rdma;
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+ RDMAControlHeader head;
|
|
|
9ae3a8 |
+ RDMARegister *reg, *registers;
|
|
|
9ae3a8 |
+ RDMACompress *comp;
|
|
|
9ae3a8 |
+ RDMARegisterResult *reg_result;
|
|
|
9ae3a8 |
+ static RDMARegisterResult results[RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE];
|
|
|
9ae3a8 |
+ RDMALocalBlock *block;
|
|
|
9ae3a8 |
+ void *host_addr;
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+ int idx = 0;
|
|
|
9ae3a8 |
+ int count = 0;
|
|
|
9ae3a8 |
+ int i = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ do {
|
|
|
9ae3a8 |
+ DDDPRINTF("Waiting for next request %" PRIu64 "...\n", flags);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_recv(rdma, &head, RDMA_CONTROL_NONE);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (head.repeat > RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma: Too many requests in this message (%d)."
|
|
|
9ae3a8 |
+ "Bailing.\n", head.repeat);
|
|
|
9ae3a8 |
+ ret = -EIO;
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ switch (head.type) {
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_COMPRESS:
|
|
|
9ae3a8 |
+ comp = (RDMACompress *) rdma->wr_data[idx].control_curr;
|
|
|
9ae3a8 |
+ network_to_compress(comp);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Zapping zero chunk: %" PRId64
|
|
|
9ae3a8 |
+ " bytes, index %d, offset %" PRId64 "\n",
|
|
|
9ae3a8 |
+ comp->length, comp->block_idx, comp->offset);
|
|
|
9ae3a8 |
+ block = &(rdma->local_ram_blocks.block[comp->block_idx]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ host_addr = block->local_host_addr +
|
|
|
9ae3a8 |
+ (comp->offset - block->offset);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ram_handle_compressed(host_addr, comp->value, comp->length);
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_REGISTER_FINISHED:
|
|
|
9ae3a8 |
+ DDDPRINTF("Current registrations complete.\n");
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_RAM_BLOCKS_REQUEST:
|
|
|
9ae3a8 |
+ DPRINTF("Initial setup info requested.\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->pin_all) {
|
|
|
9ae3a8 |
+ ret = qemu_rdma_reg_whole_ram_blocks(rdma);
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error dest "
|
|
|
9ae3a8 |
+ "registering ram blocks!\n");
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Dest uses this to prepare to transmit the RAMBlock descriptions
|
|
|
9ae3a8 |
+ * to the source VM after connection setup.
|
|
|
9ae3a8 |
+ * Both sides use the "remote" structure to communicate and update
|
|
|
9ae3a8 |
+ * their "local" descriptions with what was sent.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ for (i = 0; i < local->nb_blocks; i++) {
|
|
|
9ae3a8 |
+ rdma->block[i].remote_host_addr =
|
|
|
9ae3a8 |
+ (uint64_t)(local->block[i].local_host_addr);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->pin_all) {
|
|
|
9ae3a8 |
+ rdma->block[i].remote_rkey = local->block[i].mr->rkey;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->block[i].offset = local->block[i].offset;
|
|
|
9ae3a8 |
+ rdma->block[i].length = local->block[i].length;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ remote_block_to_network(&rdma->block[i]);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ blocks.len = rdma->local_ram_blocks.nb_blocks
|
|
|
9ae3a8 |
+ * sizeof(RDMARemoteBlock);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_send_control(rdma,
|
|
|
9ae3a8 |
+ (uint8_t *) rdma->block, &blocks;;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "rdma migration: error sending remote info!\n");
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_REGISTER_REQUEST:
|
|
|
9ae3a8 |
+ DDPRINTF("There are %d registration requests\n", head.repeat);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg_resp.repeat = head.repeat;
|
|
|
9ae3a8 |
+ registers = (RDMARegister *) rdma->wr_data[idx].control_curr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (count = 0; count < head.repeat; count++) {
|
|
|
9ae3a8 |
+ uint64_t chunk;
|
|
|
9ae3a8 |
+ uint8_t *chunk_start, *chunk_end;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg = ®isters[count];
|
|
|
9ae3a8 |
+ network_to_register(reg);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg_result = &results[count];
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Registration request (%d): index %d, current_addr %"
|
|
|
9ae3a8 |
+ PRIu64 " chunks: %" PRIu64 "\n", count,
|
|
|
9ae3a8 |
+ reg->current_index, reg->key.current_addr, reg->chunks);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block = &(rdma->local_ram_blocks.block[reg->current_index]);
|
|
|
9ae3a8 |
+ if (block->is_ram_block) {
|
|
|
9ae3a8 |
+ host_addr = (block->local_host_addr +
|
|
|
9ae3a8 |
+ (reg->key.current_addr - block->offset));
|
|
|
9ae3a8 |
+ chunk = ram_chunk_index(block->local_host_addr,
|
|
|
9ae3a8 |
+ (uint8_t *) host_addr);
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ chunk = reg->key.chunk;
|
|
|
9ae3a8 |
+ host_addr = block->local_host_addr +
|
|
|
9ae3a8 |
+ (reg->key.chunk * (1UL << RDMA_REG_CHUNK_SHIFT));
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ chunk_start = ram_chunk_start(block, chunk);
|
|
|
9ae3a8 |
+ chunk_end = ram_chunk_end(block, chunk + reg->chunks);
|
|
|
9ae3a8 |
+ if (qemu_rdma_register_and_get_keys(rdma, block,
|
|
|
9ae3a8 |
+ (uint8_t *)host_addr, NULL, ®_result->rkey,
|
|
|
9ae3a8 |
+ chunk, chunk_start, chunk_end)) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "cannot get rkey!\n");
|
|
|
9ae3a8 |
+ ret = -EINVAL;
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ reg_result->host_addr = (uint64_t) block->local_host_addr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Registered rkey for this request: %x\n",
|
|
|
9ae3a8 |
+ reg_result->rkey);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ result_to_network(reg_result);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_send_control(rdma,
|
|
|
9ae3a8 |
+ (uint8_t *) results, ®_resp);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to send control buffer!\n");
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_UNREGISTER_REQUEST:
|
|
|
9ae3a8 |
+ DDPRINTF("There are %d unregistration requests\n", head.repeat);
|
|
|
9ae3a8 |
+ unreg_resp.repeat = head.repeat;
|
|
|
9ae3a8 |
+ registers = (RDMARegister *) rdma->wr_data[idx].control_curr;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (count = 0; count < head.repeat; count++) {
|
|
|
9ae3a8 |
+ reg = ®isters[count];
|
|
|
9ae3a8 |
+ network_to_register(reg);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Unregistration request (%d): "
|
|
|
9ae3a8 |
+ " index %d, chunk %" PRIu64 "\n",
|
|
|
9ae3a8 |
+ count, reg->current_index, reg->key.chunk);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ block = &(rdma->local_ram_blocks.block[reg->current_index]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = ibv_dereg_mr(block->pmr[reg->key.chunk]);
|
|
|
9ae3a8 |
+ block->pmr[reg->key.chunk] = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret != 0) {
|
|
|
9ae3a8 |
+ perror("rdma unregistration chunk failed");
|
|
|
9ae3a8 |
+ ret = -ret;
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->total_registrations--;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDPRINTF("Unregistered chunk %" PRIu64 " successfully.\n",
|
|
|
9ae3a8 |
+ reg->key.chunk);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_post_send_control(rdma, NULL, &unreg_resp);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ fprintf(stderr, "Failed to send control buffer!\n");
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ case RDMA_CONTROL_REGISTER_RESULT:
|
|
|
9ae3a8 |
+ fprintf(stderr, "Invalid RESULT message at dest.\n");
|
|
|
9ae3a8 |
+ ret = -EIO;
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ default:
|
|
|
9ae3a8 |
+ fprintf(stderr, "Unknown control message %s\n",
|
|
|
9ae3a8 |
+ control_desc[head.type]);
|
|
|
9ae3a8 |
+ ret = -EIO;
|
|
|
9ae3a8 |
+ goto out;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ } while (1);
|
|
|
9ae3a8 |
+out:
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_registration_start(QEMUFile *f, void *opaque,
|
|
|
9ae3a8 |
+ uint64_t flags)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *rfile = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = rfile->rdma;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("start section: %" PRIu64 "\n", flags);
|
|
|
9ae3a8 |
+ qemu_put_be64(f, RAM_SAVE_FLAG_HOOK);
|
|
|
9ae3a8 |
+ qemu_fflush(f);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+/*
|
|
|
9ae3a8 |
+ * Inform dest that dynamic registrations are done for now.
|
|
|
9ae3a8 |
+ * First, flush writes, if any.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+static int qemu_rdma_registration_stop(QEMUFile *f, void *opaque,
|
|
|
9ae3a8 |
+ uint64_t flags)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ Error *local_err = NULL, **errp = &local_err;
|
|
|
9ae3a8 |
+ QEMUFileRDMA *rfile = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = rfile->rdma;
|
|
|
9ae3a8 |
+ RDMAControlHeader head = { .len = 0, .repeat = 1 };
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ CHECK_ERROR_STATE();
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_fflush(f);
|
|
|
9ae3a8 |
+ ret = qemu_rdma_drain_cq(f, rdma);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (flags == RAM_CONTROL_SETUP) {
|
|
|
9ae3a8 |
+ RDMAControlHeader resp = {.type = RDMA_CONTROL_RAM_BLOCKS_RESULT };
|
|
|
9ae3a8 |
+ RDMALocalBlocks *local = &rdma->local_ram_blocks;
|
|
|
9ae3a8 |
+ int reg_result_idx, i, j, nb_remote_blocks;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ head.type = RDMA_CONTROL_RAM_BLOCKS_REQUEST;
|
|
|
9ae3a8 |
+ DPRINTF("Sending registration setup for ram blocks...\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * Make sure that we parallelize the pinning on both sides.
|
|
|
9ae3a8 |
+ * For very large guests, doing this serially takes a really
|
|
|
9ae3a8 |
+ * long time, so we have to 'interleave' the pinning locally
|
|
|
9ae3a8 |
+ * with the control messages by performing the pinning on this
|
|
|
9ae3a8 |
+ * side before we receive the control response from the other
|
|
|
9ae3a8 |
+ * side that the pinning has completed.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head, NULL, &resp,
|
|
|
9ae3a8 |
+ ®_result_idx, rdma->pin_all ?
|
|
|
9ae3a8 |
+ qemu_rdma_reg_whole_ram_blocks : NULL);
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ ERROR(errp, "receiving remote info!\n");
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_rdma_move_header(rdma, reg_result_idx, &resp);
|
|
|
9ae3a8 |
+ memcpy(rdma->block,
|
|
|
9ae3a8 |
+ rdma->wr_data[reg_result_idx].control_curr, resp.len);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ nb_remote_blocks = resp.len / sizeof(RDMARemoteBlock);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /*
|
|
|
9ae3a8 |
+ * The protocol uses two different sets of rkeys (mutually exclusive):
|
|
|
9ae3a8 |
+ * 1. One key to represent the virtual address of the entire ram block.
|
|
|
9ae3a8 |
+ * (dynamic chunk registration disabled - pin everything with one rkey.)
|
|
|
9ae3a8 |
+ * 2. One to represent individual chunks within a ram block.
|
|
|
9ae3a8 |
+ * (dynamic chunk registration enabled - pin individual chunks.)
|
|
|
9ae3a8 |
+ *
|
|
|
9ae3a8 |
+ * Once the capability is successfully negotiated, the destination transmits
|
|
|
9ae3a8 |
+ * the keys to use (or sends them later) including the virtual addresses
|
|
|
9ae3a8 |
+ * and then propagates the remote ram block descriptions to his local copy.
|
|
|
9ae3a8 |
+ */
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (local->nb_blocks != nb_remote_blocks) {
|
|
|
9ae3a8 |
+ ERROR(errp, "ram blocks mismatch #1! "
|
|
|
9ae3a8 |
+ "Your QEMU command line parameters are probably "
|
|
|
9ae3a8 |
+ "not identical on both the source and destination.\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ for (i = 0; i < nb_remote_blocks; i++) {
|
|
|
9ae3a8 |
+ network_to_remote_block(&rdma->block[i]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ /* search local ram blocks */
|
|
|
9ae3a8 |
+ for (j = 0; j < local->nb_blocks; j++) {
|
|
|
9ae3a8 |
+ if (rdma->block[i].offset != local->block[j].offset) {
|
|
|
9ae3a8 |
+ continue;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma->block[i].length != local->block[j].length) {
|
|
|
9ae3a8 |
+ ERROR(errp, "ram blocks mismatch #2! "
|
|
|
9ae3a8 |
+ "Your QEMU command line parameters are probably "
|
|
|
9ae3a8 |
+ "not identical on both the source and destination.\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ local->block[j].remote_host_addr =
|
|
|
9ae3a8 |
+ rdma->block[i].remote_host_addr;
|
|
|
9ae3a8 |
+ local->block[j].remote_rkey = rdma->block[i].remote_rkey;
|
|
|
9ae3a8 |
+ break;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (j >= local->nb_blocks) {
|
|
|
9ae3a8 |
+ ERROR(errp, "ram blocks mismatch #3! "
|
|
|
9ae3a8 |
+ "Your QEMU command line parameters are probably "
|
|
|
9ae3a8 |
+ "not identical on both the source and destination.\n");
|
|
|
9ae3a8 |
+ return -EINVAL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DDDPRINTF("Sending registration finish %" PRIu64 "...\n", flags);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ head.type = RDMA_CONTROL_REGISTER_FINISHED;
|
|
|
9ae3a8 |
+ ret = qemu_rdma_exchange_send(rdma, &head, NULL, NULL, NULL, NULL);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret < 0) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return 0;
|
|
|
9ae3a8 |
+err:
|
|
|
9ae3a8 |
+ rdma->error_state = ret;
|
|
|
9ae3a8 |
+ return ret;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static int qemu_rdma_get_fd(void *opaque)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *rfile = opaque;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = rfile->rdma;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return rdma->comp_channel->fd;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const QEMUFileOps rdma_read_ops = {
|
|
|
9ae3a8 |
+ .get_buffer = qemu_rdma_get_buffer,
|
|
|
9ae3a8 |
+ .get_fd = qemu_rdma_get_fd,
|
|
|
9ae3a8 |
+ .close = qemu_rdma_close,
|
|
|
9ae3a8 |
+ .hook_ram_load = qemu_rdma_registration_handle,
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+const QEMUFileOps rdma_write_ops = {
|
|
|
9ae3a8 |
+ .put_buffer = qemu_rdma_put_buffer,
|
|
|
9ae3a8 |
+ .close = qemu_rdma_close,
|
|
|
9ae3a8 |
+ .before_ram_iterate = qemu_rdma_registration_start,
|
|
|
9ae3a8 |
+ .after_ram_iterate = qemu_rdma_registration_stop,
|
|
|
9ae3a8 |
+ .save_page = qemu_rdma_save_page,
|
|
|
9ae3a8 |
+};
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void *qemu_fopen_rdma(RDMAContext *rdma, const char *mode)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ QEMUFileRDMA *r = g_malloc0(sizeof(QEMUFileRDMA));
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (qemu_file_mode_is_not_valid(mode)) {
|
|
|
9ae3a8 |
+ return NULL;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ r->rdma = rdma;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (mode[0] == 'w') {
|
|
|
9ae3a8 |
+ r->file = qemu_fopen_ops(r, &rdma_write_ops);
|
|
|
9ae3a8 |
+ } else {
|
|
|
9ae3a8 |
+ r->file = qemu_fopen_ops(r, &rdma_read_ops);
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ return r->file;
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+static void rdma_accept_incoming_migration(void *opaque)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ RDMAContext *rdma = opaque;
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+ QEMUFile *f;
|
|
|
9ae3a8 |
+ Error *local_err = NULL, **errp = &local_err;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("Accepting rdma connection...\n");
|
|
|
9ae3a8 |
+ ret = qemu_rdma_accept(rdma);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "RDMA Migration initialization failed!\n");
|
|
|
9ae3a8 |
+ return;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("Accepted migration\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ f = qemu_fopen_rdma(rdma, "rb");
|
|
|
9ae3a8 |
+ if (f == NULL) {
|
|
|
9ae3a8 |
+ ERROR(errp, "could not qemu_fopen_rdma!\n");
|
|
|
9ae3a8 |
+ qemu_rdma_cleanup(rdma);
|
|
|
9ae3a8 |
+ return;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ rdma->migration_started_on_destination = 1;
|
|
|
9ae3a8 |
+ process_incoming_migration(f);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+void rdma_start_incoming_migration(const char *host_port, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ int ret;
|
|
|
9ae3a8 |
+ RDMAContext *rdma;
|
|
|
9ae3a8 |
+ Error *local_err = NULL;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("Starting RDMA-based incoming migration\n");
|
|
|
9ae3a8 |
+ rdma = qemu_rdma_data_init(host_port, &local_err);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma == NULL) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_dest_init(rdma, &local_err);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("qemu_rdma_dest_init success\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = rdma_listen(rdma->listen_id, 5);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ ERROR(errp, "listening on socket!\n");
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("rdma_listen success\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ qemu_set_fd_handler2(rdma->channel->fd, NULL,
|
|
|
9ae3a8 |
+ rdma_accept_incoming_migration, NULL,
|
|
|
9ae3a8 |
+ (void *)(intptr_t) rdma);
|
|
|
9ae3a8 |
+ return;
|
|
|
9ae3a8 |
+err:
|
|
|
9ae3a8 |
+ error_propagate(errp, local_err);
|
|
|
9ae3a8 |
+ g_free(rdma);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+void rdma_start_outgoing_migration(void *opaque,
|
|
|
9ae3a8 |
+ const char *host_port, Error **errp)
|
|
|
9ae3a8 |
+{
|
|
|
9ae3a8 |
+ MigrationState *s = opaque;
|
|
|
9ae3a8 |
+ Error *local_err = NULL, **temp = &local_err;
|
|
|
9ae3a8 |
+ RDMAContext *rdma = qemu_rdma_data_init(host_port, &local_err);
|
|
|
9ae3a8 |
+ int ret = 0;
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (rdma == NULL) {
|
|
|
9ae3a8 |
+ ERROR(temp, "Failed to initialize RDMA data structures! %d\n", ret);
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ ret = qemu_rdma_source_init(rdma, &local_err,
|
|
|
9ae3a8 |
+ s->enabled_capabilities[MIGRATION_CAPABILITY_X_RDMA_PIN_ALL]);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("qemu_rdma_source_init success\n");
|
|
|
9ae3a8 |
+ ret = qemu_rdma_connect(rdma, &local_err);
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ if (ret) {
|
|
|
9ae3a8 |
+ goto err;
|
|
|
9ae3a8 |
+ }
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ DPRINTF("qemu_rdma_source_connect success\n");
|
|
|
9ae3a8 |
+
|
|
|
9ae3a8 |
+ s->file = qemu_fopen_rdma(rdma, "wb");
|
|
|
9ae3a8 |
+ migrate_fd_connect(s);
|
|
|
9ae3a8 |
+ return;
|
|
|
9ae3a8 |
+err:
|
|
|
9ae3a8 |
+ error_propagate(errp, local_err);
|
|
|
9ae3a8 |
+ g_free(rdma);
|
|
|
9ae3a8 |
+ migrate_fd_error(s);
|
|
|
9ae3a8 |
+}
|
|
|
9ae3a8 |
diff --git a/migration.c b/migration.c
|
|
|
9ae3a8 |
index 73a348f..2fa0237 100644
|
|
|
9ae3a8 |
--- a/migration.c
|
|
|
9ae3a8 |
+++ b/migration.c
|
|
|
9ae3a8 |
@@ -78,6 +78,10 @@ void qemu_start_incoming_migration(const char *uri, Error **errp)
|
|
|
9ae3a8 |
|
|
|
9ae3a8 |
if (strstart(uri, "tcp:", &p))
|
|
|
9ae3a8 |
tcp_start_incoming_migration(p, errp);
|
|
|
9ae3a8 |
+#ifdef CONFIG_RDMA
|
|
|
9ae3a8 |
+ else if (strstart(uri, "x-rdma:", &p))
|
|
|
9ae3a8 |
+ rdma_start_incoming_migration(p, errp);
|
|
|
9ae3a8 |
+#endif
|
|
|
9ae3a8 |
#if !defined(WIN32)
|
|
|
9ae3a8 |
else if (strstart(uri, "exec:", &p))
|
|
|
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exec_start_incoming_migration(p, errp);
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@@ -415,6 +419,10 @@ void qmp_migrate(const char *uri, bool has_blk, bool blk,
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if (strstart(uri, "tcp:", &p)) {
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tcp_start_outgoing_migration(s, p, &local_err);
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+#ifdef CONFIG_RDMA
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+ } else if (strstart(uri, "x-rdma:", &p)) {
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+ rdma_start_outgoing_migration(s, p, &local_err);
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+#endif
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#if !defined(WIN32)
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} else if (strstart(uri, "exec:", &p)) {
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exec_start_outgoing_migration(s, p, &local_err);
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--
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1.7.11.7
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