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From 1144c6fa17e7d3fca1e2940c8bd0da966c74e4c5 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Mon, 20 Jan 2014 19:05:30 +0100
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Subject: [PATCH 33/34] pc: Enable x2apic by default on more recent CPU models (v2)
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <1390244730-31038-3-git-send-email-ehabkost@redhat.com>
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Patchwork-id: 56848
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O-Subject: [RHEL7 qemu-kvm PATCH 2/2] pc: Enable x2apic by default on more recent CPU models (v2)
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Bugzilla: 1049706
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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Bugzilla: 1049706
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Brew scratch build: http://brewweb.devel.redhat.com/brew/taskinfo?taskID=6900764
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Upstream status: not applicable (see notes below)
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On RHEL-6 we already enabled x2apic by default on Conroe, Penryn,
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Nehalem, Westmere, SandyBridge, Haswell, Opteron_G{1,2,3}.
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To not introduce performance regressions, this patch changes the rhel7
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machine-types to enable x2apic by default on all those models and also
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on Opteron_G{4,5}.
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Quoting the patch I sent upstream[1]:
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> Normally we try to keep the CPU model definitions as close as the real
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> CPUs as possible, but x2apic can be emulated by KVM without host CPU
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> support for x2apic, and it improves performance by reducing APIC access
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> overhead. x2apic emulation is available on KVM since 2009 (Linux
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> 2.6.32-rc1), there's no reason for not enabling x2apic by default when
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> running KVM.
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Upstream status is "not applicable" because this patch touches only the
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rhel7-specific PC code. I am doing this because my plan is to enable
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x2apic by default even if upstream rejects my patch, and I want to get
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this done as soon as possible to get more testing exposure.
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[1] A patch was submitted to change cpu.c to add x2apic to those CPU models
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upstream, and can be seen at:
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Message-Id: <1390228618-21663-1-git-send-email-ehabkost@redhat.com>
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http://article.gmane.org/gmane.comp.emulators.qemu/251492
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The upstream patch is a resend. A similar patch was sent in
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September 2013, was ACKed by Gleb, but was ignored by all
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maintainers.
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Changes v2:
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* Use the new pc_compat_rhel*() functions
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* Disable x2apic explicitly on Opteron_G{4,5} on pc_compat_rhel650()
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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---
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hw/i386/pc_piix.c | 12 ++++++++++++
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hw/i386/pc_q35.c | 10 ++++++++++
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2 files changed, 22 insertions(+)
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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hw/i386/pc_piix.c | 12 ++++++++++++
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hw/i386/pc_q35.c | 10 ++++++++++
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2 files changed, 22 insertions(+), 0 deletions(-)
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diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
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index 769571c..663c9d5 100644
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--- a/hw/i386/pc_piix.c
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+++ b/hw/i386/pc_piix.c
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@@ -745,6 +745,16 @@ machine_init(pc_machine_init);
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static void pc_compat_rhel700(QEMUMachineInitArgs *args)
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{
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+ x86_cpu_compat_set_features("Conroe", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Penryn", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Nehalem", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ /* SandyBridge and Haswell already have x2apic enabled */
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+ x86_cpu_compat_set_features("Opteron_G1", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G2", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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}
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static void pc_init_rhel700(QEMUMachineInitArgs *args)
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@@ -899,6 +909,8 @@ static void pc_compat_rhel650(QEMUMachineInitArgs *args)
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x86_cpu_compat_set_features("Opteron_G1", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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x86_cpu_compat_set_features("Opteron_G2", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, 0, CPUID_EXT_X2APIC);
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+ x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, 0, CPUID_EXT_X2APIC);
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x86_cpu_compat_set_features("phenom", FEAT_8000_0001_EDX,
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0, CPUID_EXT2_RDTSCP);
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diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
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index 0280a95..232c62d 100644
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--- a/hw/i386/pc_q35.c
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+++ b/hw/i386/pc_q35.c
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@@ -270,6 +270,16 @@ machine_init(pc_q35_machine_init);
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static void pc_q35_compat_rhel700(QEMUMachineInitArgs *args)
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{
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+ x86_cpu_compat_set_features("Conroe", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Penryn", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Nehalem", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ /* SandyBridge and Haswell already have x2apic enabled */
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+ x86_cpu_compat_set_features("Opteron_G1", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G2", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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+ x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, CPUID_EXT_X2APIC, 0);
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}
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static void pc_q35_init_rhel700(QEMUMachineInitArgs *args)
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--
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1.7.1
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