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From 839a96660680e11ad494a02e5b14f64ebd9c8552 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Tue, 17 Oct 2017 20:36:53 +0200
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Subject: [PATCH 27/27] i386: add Skylake-Server cpu model
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20171017203653.28578-3-ehabkost@redhat.com>
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Patchwork-id: 77351
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O-Subject: [RHEL-7.5 qemu-kvm PATCH 2/2] i386: add Skylake-Server cpu model
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Bugzilla: 1501510
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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From: "Boqun Feng (Intel)" <boqun.feng@gmail.com>
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1501510
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Introduce Skylake-Server cpu mode which inherits the features from
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Skylake-Client and supports some additional features that are: AVX512,
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CLWB and PGPE1GB.
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Backport notes:
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* ARAT feature not included, as it is not available in the
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qemu-kvm-1.5.3 tree (and disabled by compat code in
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pc-i440fx-rhel7.2.0 and older on qemu-kvm-rhev)
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Signed-off-by: Boqun Feng (Intel) <boqun.feng@gmail.com>
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Message-Id: <20170621052935.20715-1-boqun.feng@gmail.com>
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[ehabkost: copied comment about XSAVES from Skylake-Client]
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 53f9a6f45fb214540cb40af45efc11ac40ac454c)
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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target-i386/cpu.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 50 insertions(+)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index e739647..539d659 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -1066,6 +1066,56 @@ static x86_def_t builtin_x86_defs[] = {
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.model_id = "Intel Core Processor (Skylake)",
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},
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{
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+ .name = "Skylake-Server",
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+ .level = 0xd,
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+ .vendor = CPUID_VENDOR_INTEL,
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+ .family = 6,
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+ .model = 85,
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+ .stepping = 4,
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+ .features[FEAT_1_EDX] =
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+ CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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+ CPUID_DE | CPUID_FP87,
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+ .features[FEAT_1_ECX] =
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+ CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
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+ CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
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+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
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+ CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
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+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
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+ CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
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+ .features[FEAT_8000_0001_EDX] =
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+ CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
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+ CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
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+ .features[FEAT_8000_0001_ECX] =
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+ CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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+ .features[FEAT_7_0_EBX] =
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+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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+ CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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+ CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
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+ CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
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+ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
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+ CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
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+ CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
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+ CPUID_7_0_EBX_AVX512VL,
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+ /* Missing: XSAVES (not supported by some Linux versions,
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+ * including v4.1 to v4.12).
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+ * KVM doesn't yet expose any XSAVES state save component,
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+ * and the only one defined in Skylake (processor tracing)
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+ * probably will block migration anyway.
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+ */
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+ .features[FEAT_XSAVE] =
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+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
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+ CPUID_XSAVE_XGETBV1,
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+ /* Missing: ARAT. not available in the qemu-kvm-1.5.3 tree (and
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+ * disabled by compat code in pc-i440fx-rhel7.2.0 and older on
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+ * qemu-kvm-rhev)
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+ */
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+ .xlevel = 0x80000008,
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+ .model_id = "Intel Xeon Processor (Skylake)",
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+ },
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+ {
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.name = "Opteron_G1",
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.level = 5,
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.vendor = CPUID_VENDOR_AMD,
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--
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1.8.3.1
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