|
 |
26ba25 |
From a05bef7298f7d30da342ef1a3f6d12bb33377fc5 Mon Sep 17 00:00:00 2001
|
|
|
26ba25 |
From: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
26ba25 |
Date: Thu, 26 Jul 2018 17:18:55 +0100
|
|
|
26ba25 |
Subject: [PATCH 05/14] i386: Add cache information in X86CPUDefinition
|
|
|
26ba25 |
|
|
|
26ba25 |
RH-Author: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
26ba25 |
Message-id: <20180726171904.27418-3-ehabkost@redhat.com>
|
|
|
26ba25 |
Patchwork-id: 81523
|
|
|
26ba25 |
O-Subject: [qemu-kvm RHEL8/virt212 PATCH v2 02/11] i386: Add cache information in X86CPUDefinition
|
|
|
26ba25 |
Bugzilla: 1597739
|
|
|
26ba25 |
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
26ba25 |
RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
|
|
|
26ba25 |
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
|
|
|
26ba25 |
|
|
|
26ba25 |
From: Babu Moger <babu.moger@amd.com>
|
|
|
26ba25 |
|
|
|
26ba25 |
Add cache information in X86CPUDefinition and CPUX86State.
|
|
|
26ba25 |
|
|
|
26ba25 |
Signed-off-by: Babu Moger <babu.moger@amd.com>
|
|
|
26ba25 |
Tested-by: Geoffrey McRae <geoff@hostfission.com>
|
|
|
26ba25 |
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
26ba25 |
Message-Id: <20180510204148.11687-3-babu.moger@amd.com>
|
|
|
26ba25 |
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
26ba25 |
(cherry picked from commit 6aaeb05492ef668f415324f43e7d875c0f1e90b3)
|
|
|
26ba25 |
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
26ba25 |
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
|
|
|
26ba25 |
---
|
|
|
26ba25 |
target/i386/cpu.c | 1 +
|
|
|
26ba25 |
target/i386/cpu.h | 7 +++++++
|
|
|
26ba25 |
2 files changed, 8 insertions(+)
|
|
|
26ba25 |
|
|
|
26ba25 |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
|
|
|
26ba25 |
index 6c57b2f..50af741 100644
|
|
|
26ba25 |
--- a/target/i386/cpu.c
|
|
|
26ba25 |
+++ b/target/i386/cpu.c
|
|
|
26ba25 |
@@ -1105,6 +1105,7 @@ struct X86CPUDefinition {
|
|
|
26ba25 |
int stepping;
|
|
|
26ba25 |
FeatureWordArray features;
|
|
|
26ba25 |
const char *model_id;
|
|
|
26ba25 |
+ CPUCaches *cache_info;
|
|
|
26ba25 |
};
|
|
|
26ba25 |
|
|
|
26ba25 |
static X86CPUDefinition builtin_x86_defs[] = {
|
|
|
26ba25 |
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
|
|
|
26ba25 |
index fa03e2c..372f8b7 100644
|
|
|
26ba25 |
--- a/target/i386/cpu.h
|
|
|
26ba25 |
+++ b/target/i386/cpu.h
|
|
|
26ba25 |
@@ -1096,6 +1096,12 @@ typedef struct CPUCacheInfo {
|
|
|
26ba25 |
} CPUCacheInfo;
|
|
|
26ba25 |
|
|
|
26ba25 |
|
|
|
26ba25 |
+typedef struct CPUCaches {
|
|
|
26ba25 |
+ CPUCacheInfo l1d_cache;
|
|
|
26ba25 |
+ CPUCacheInfo l1i_cache;
|
|
|
26ba25 |
+ CPUCacheInfo l2_cache;
|
|
|
26ba25 |
+ CPUCacheInfo l3_cache;
|
|
|
26ba25 |
+} CPUCaches;
|
|
|
26ba25 |
|
|
|
26ba25 |
typedef struct CPUX86State {
|
|
|
26ba25 |
/* standard registers */
|
|
|
26ba25 |
@@ -1282,6 +1288,7 @@ typedef struct CPUX86State {
|
|
|
26ba25 |
/* Features that were explicitly enabled/disabled */
|
|
|
26ba25 |
FeatureWordArray user_features;
|
|
|
26ba25 |
uint32_t cpuid_model[12];
|
|
|
26ba25 |
+ CPUCaches *cache_info;
|
|
|
26ba25 |
|
|
|
26ba25 |
/* MTRRs */
|
|
|
26ba25 |
uint64_t mtrr_fixed[11];
|
|
|
26ba25 |
--
|
|
|
26ba25 |
1.8.3.1
|
|
|
26ba25 |
|