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From 15ee295534f654d6b6ba9499cdd380aa9c954920 Mon Sep 17 00:00:00 2001
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From: Andrew Jones <drjones@redhat.com>
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Date: Mon, 1 Aug 2016 14:27:09 +0200
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Subject: RHEL-only: hw/char/pl011: fix SBSA reset
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RH-Author: Andrew Jones <drjones@redhat.com>
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Message-id: <1470061629-6395-1-git-send-email-drjones@redhat.com>
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Patchwork-id: 71697
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O-Subject: [AArch64 RHEL-7.3 qemu-kvm-rhev PATCH] RHEL-only: hw/char/pl011: fix SBSA reset
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Bugzilla: 1266048
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RH-Acked-by: Auger Eric <eric.auger@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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RH-Acked-by: Wei Huang <wei@redhat.com>
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When booting Linux with an SBSA UART, e.g. when booting mach-virt
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with ACPI, if the user types on the console during boot, then when
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the login prompt appears she won't be able to log in. This is
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because during boot the SBSA UART needs to be reset, but the SBSA
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specification doesn't provide registers to enable/disable the FIFOs.
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This patch observes a couple registers the SBSA UART does write to
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in order to attempt to guess when a reset is needed, and then do it.
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We risk losing some characters from the FIFO if the guess is wrong,
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but the risk of that should be quite low.
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Signed-off-by: Andrew Jones <drjones@redhat.com>
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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(cherry picked from commit aa0041f7036b3052ec9477bffae2fd6f41ac7ede)
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(cherry picked from commit 4fed0775a0a86b05fb5539aca43d5ee70fc0ab99)
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---
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hw/char/pl011.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/hw/char/pl011.c b/hw/char/pl011.c
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index 24ea973..453fcde 100644
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--- a/hw/char/pl011.c
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+++ b/hw/char/pl011.c
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@@ -209,6 +209,18 @@ static void pl011_write(void *opaque, hwaddr offset,
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pl011_update(s);
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break;
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case 17: /* UARTICR */
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+ /*
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+ * RHEL-only, fixes BZ1266048
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+ *
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+ * Look for the "signature" of a driver init or shutdown in
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+ * order to know that we need to reset the SBSA UART. Yes,
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+ * this is hacky, but as SBSA drivers aren't required to write
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+ * UARTLCR_H or UARTCR, then we don't have much choice...
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+ */
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+ if (s->int_enabled == 0 && value == 0xffff) {
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+ s->read_count = 0;
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+ s->read_pos = 0;
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+ }
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s->int_level &= ~value;
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pl011_update(s);
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break;
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--
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1.8.3.1
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