From 65ccb9e09a2a60653f0c23bc60913df8bac82cca Mon Sep 17 00:00:00 2001 From: Richard W.M. Jones Date: Sep 12 2021 19:45:17 +0000 Subject: Alternate fix for assertion on armv7hl (RHBZ#1999878) --- diff --git a/0001-tcg-arm-Reduce-vector-alignment-requirement-for-NEON.patch b/0001-tcg-arm-Reduce-vector-alignment-requirement-for-NEON.patch new file mode 100644 index 0000000..04679dc --- /dev/null +++ b/0001-tcg-arm-Reduce-vector-alignment-requirement-for-NEON.patch @@ -0,0 +1,73 @@ +From 1331e4eec016a295949009b4360c592401b089f7 Mon Sep 17 00:00:00 2001 +From: Richard Henderson +Date: Sun, 12 Sep 2021 10:49:25 -0700 +Subject: [PATCH] tcg/arm: Reduce vector alignment requirement for NEON + +With arm32, the ABI gives us 8-byte alignment for the stack. +While it's possible to realign the stack to provide 16-byte alignment, +it's far easier to simply not encode 16-byte alignment in the +VLD1 and VST1 instructions that we emit. + +Remove the assertion in temp_allocate_frame, limit natural alignment +to the provided stack alignment, and add a comment. + +Reported-by: Richard W.M. Jones +Signed-off-by: Richard Henderson +--- + tcg/arm/tcg-target.c.inc | 13 +++++++++---- + tcg/tcg.c | 8 +++++++- + 2 files changed, 16 insertions(+), 5 deletions(-) + +diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc +index 007ceee68e..34acfb522c 100644 +--- a/tcg/arm/tcg-target.c.inc ++++ b/tcg/arm/tcg-target.c.inc +@@ -2477,8 +2477,13 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg, + tcg_out_vldst(s, INSN_VLD1 | 0x7d0, arg, arg1, arg2); + return; + case TCG_TYPE_V128: +- /* regs 2; size 8; align 16 */ +- tcg_out_vldst(s, INSN_VLD1 | 0xae0, arg, arg1, arg2); ++ /* ++ * We have only 8-byte alignment for the stack per the ABI. ++ * Rather than dynamically re-align the stack, it's easier ++ * to simply not request alignment beyond that. So: ++ * regs 2; size 8; align 8 ++ */ ++ tcg_out_vldst(s, INSN_VLD1 | 0xad0, arg, arg1, arg2); + return; + default: + g_assert_not_reached(); +@@ -2497,8 +2502,8 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, + tcg_out_vldst(s, INSN_VST1 | 0x7d0, arg, arg1, arg2); + return; + case TCG_TYPE_V128: +- /* regs 2; size 8; align 16 */ +- tcg_out_vldst(s, INSN_VST1 | 0xae0, arg, arg1, arg2); ++ /* See tcg_out_ld re alignment: regs 2; size 8; align 8 */ ++ tcg_out_vldst(s, INSN_VST1 | 0xad0, arg, arg1, arg2); + return; + default: + g_assert_not_reached(); +diff --git a/tcg/tcg.c b/tcg/tcg.c +index 4142d42d77..ca5bcc4635 100644 +--- a/tcg/tcg.c ++++ b/tcg/tcg.c +@@ -3060,7 +3060,13 @@ static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) + g_assert_not_reached(); + } + +- assert(align <= TCG_TARGET_STACK_ALIGN); ++ /* ++ * Assume the stack is sufficiently aligned. ++ * This affects e.g. ARM NEON, where we have 8 byte stack alignment ++ * and do not require 16 byte vector alignment. This seems slightly ++ * easier than fully parameterizing the above switch statement. ++ */ ++ align = MIN(TCG_TARGET_STACK_ALIGN, align); + off = ROUND_UP(s->current_frame_offset, align); + + /* If we've exhausted the stack frame, restart with a smaller TB. */ +-- +2.32.0 + diff --git a/0002-tcg-arm-Increase-stack-alignment-for-function-genera.patch b/0002-tcg-arm-Increase-stack-alignment-for-function-genera.patch deleted file mode 100644 index 645fbc4..0000000 --- a/0002-tcg-arm-Increase-stack-alignment-for-function-genera.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 319935db129085bf4a3886dfd5662c687e6ce814 Mon Sep 17 00:00:00 2001 -From: "Richard W.M. Jones" -Date: Wed, 1 Sep 2021 17:12:20 +0100 -Subject: [PATCH 2/2] tcg/arm: Increase stack alignment for function generation - -This avoids the following assertion when the kernel initializes X.509 -certificates: - -[ 7.315373] Loading compiled-in X.509 certificates -qemu-system-arm: ../tcg/tcg.c:3063: temp_allocate_frame: Assertion `align <= TCG_TARGET_STACK_ALIGN' failed. - -Signed-off-by: Richard W.M. Jones ---- - tcg/arm/tcg-target.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h -index d113b7f8db..5c8f3f8c55 100644 ---- a/tcg/arm/tcg-target.h -+++ b/tcg/arm/tcg-target.h -@@ -115,7 +115,7 @@ extern bool use_neon_instructions; - #endif - - /* used for function call generation */ --#define TCG_TARGET_STACK_ALIGN 8 -+#define TCG_TARGET_STACK_ALIGN 16 - #define TCG_TARGET_CALL_ALIGN_ARGS 1 - #define TCG_TARGET_CALL_STACK_OFFSET 0 - --- -2.32.0 - diff --git a/qemu.spec b/qemu.spec index 85bf2f9..ee1d49b 100644 --- a/qemu.spec +++ b/qemu.spec @@ -282,7 +282,7 @@ Obsoletes: %{name}-system-unicore32-core <= %{epoch}:%{version}-%{release} Summary: QEMU is a FAST! processor emulator Name: qemu Version: 6.1.0 -Release: 6%{?rcrel}%{?dist} +Release: 7%{?rcrel}%{?dist} Epoch: 2 License: GPLv2 and BSD and MIT and CC-BY URL: http://www.qemu.org/ @@ -306,7 +306,7 @@ Patch1: 0001-target-i386-add-missing-bits-to-CR4_RESERVED_MASK.patch # Fix assertion on armv7hl # https://bugzilla.redhat.com/show_bug.cgi?id=1999878 -Patch2: 0002-tcg-arm-Increase-stack-alignment-for-function-genera.patch +Patch2: 0001-tcg-arm-Reduce-vector-alignment-requirement-for-NEON.patch BuildRequires: meson >= %{meson_version} BuildRequires: zlib-devel @@ -2236,6 +2236,9 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \ %changelog +* Sun Sep 12 2021 Richard W.M. Jones - 6.1.0-7 +- Alternate fix for assertion on armv7hl (RHBZ#1999878) + * Wed Sep 01 2021 Richard W.M. Jones - 6.1.0-6 - Fix assertion on armv7hl (RHBZ#1999878)