render / rpms / qemu

Forked from rpms/qemu 9 months ago
Clone

Blame 0089-tcg-sparc-Mask-shift-immediates-to-avoid-illegal-ins.patch

5544c1
From 12e60f780a097837840ab1e7bb7d54b8c15112e8 Mon Sep 17 00:00:00 2001
5544c1
From: Richard Henderson <rth@twiddle.net>
5544c1
Date: Sun, 25 Mar 2012 21:36:28 +0200
5544c1
Subject: [PATCH] tcg-sparc: Mask shift immediates to avoid illegal insns.
5544c1
5544c1
The xtensa-test image generates a sra_i32 with count 0x40.
5544c1
Whether this is accident of tcg constant propagation or
5544c1
originating directly from the instruction stream is immaterial.
5544c1
5544c1
Signed-off-by: Richard Henderson <rth@twiddle.net>
5544c1
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
5544c1
---
5544c1
 tcg/sparc/tcg-target.c | 18 ++++++++++++------
5544c1
 1 file changed, 12 insertions(+), 6 deletions(-)
5544c1
5544c1
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
5544c1
index e625aa3..be5c170 100644
5544c1
--- a/tcg/sparc/tcg-target.c
5544c1
+++ b/tcg/sparc/tcg-target.c
5544c1
@@ -1154,13 +1154,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
5544c1
         goto gen_arith;
5544c1
     case INDEX_op_shl_i32:
5544c1
         c = SHIFT_SLL;
5544c1
-        goto gen_arith;
5544c1
+    do_shift32:
5544c1
+        /* Limit immediate shift count lest we create an illegal insn.  */
5544c1
+        tcg_out_arithc(s, args[0], args[1], args[2] & 31, const_args[2], c);
5544c1
+        break;
5544c1
     case INDEX_op_shr_i32:
5544c1
         c = SHIFT_SRL;
5544c1
-        goto gen_arith;
5544c1
+        goto do_shift32;
5544c1
     case INDEX_op_sar_i32:
5544c1
         c = SHIFT_SRA;
5544c1
-        goto gen_arith;
5544c1
+        goto do_shift32;
5544c1
     case INDEX_op_mul_i32:
5544c1
         c = ARITH_UMUL;
5544c1
         goto gen_arith;
5544c1
@@ -1281,13 +1284,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
5544c1
         break;
5544c1
     case INDEX_op_shl_i64:
5544c1
         c = SHIFT_SLLX;
5544c1
-        goto gen_arith;
5544c1
+    do_shift64:
5544c1
+        /* Limit immediate shift count lest we create an illegal insn.  */
5544c1
+        tcg_out_arithc(s, args[0], args[1], args[2] & 63, const_args[2], c);
5544c1
+        break;
5544c1
     case INDEX_op_shr_i64:
5544c1
         c = SHIFT_SRLX;
5544c1
-        goto gen_arith;
5544c1
+        goto do_shift64;
5544c1
     case INDEX_op_sar_i64:
5544c1
         c = SHIFT_SRAX;
5544c1
-        goto gen_arith;
5544c1
+        goto do_shift64;
5544c1
     case INDEX_op_mul_i64:
5544c1
         c = ARITH_MULX;
5544c1
         goto gen_arith;
5544c1
-- 
5544c1
1.7.12.1
5544c1