render / rpms / qemu

Forked from rpms/qemu 9 months ago
Clone

Blame 0087-tcg-sparc-Change-AREG0-in-generated-code-to-i0.patch

5544c1
From d526285d4339f02e3be64a7287d1e009dd5bff3d Mon Sep 17 00:00:00 2001
5544c1
From: Richard Henderson <rth@twiddle.net>
5544c1
Date: Sun, 25 Mar 2012 19:52:11 +0200
5544c1
Subject: [PATCH] tcg-sparc: Change AREG0 in generated code to %i0.
5544c1
5544c1
We can now move the TCG variable from %g[56] to a call-preserved
5544c1
windowed register.
5544c1
5544c1
Signed-off-by: Richard Henderson <rth@twiddle.net>
5544c1
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
5544c1
---
5544c1
 tcg/sparc/tcg-target.c | 3 ++-
5544c1
 tcg/sparc/tcg-target.h | 8 +-------
5544c1
 2 files changed, 3 insertions(+), 8 deletions(-)
5544c1
5544c1
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
5544c1
index 5acfeba..9ab5746 100644
5544c1
--- a/tcg/sparc/tcg-target.c
5544c1
+++ b/tcg/sparc/tcg-target.c
5544c1
@@ -696,7 +696,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
5544c1
 
5544c1
     tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) |
5544c1
               INSN_RS2(TCG_REG_G0));
5544c1
-    tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0);
5544c1
+    /* delay slot */
5544c1
+    tcg_out_nop(s);
5544c1
 }
5544c1
 
5544c1
 #if defined(CONFIG_SOFTMMU)
5544c1
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
5544c1
index 99e9f57..ee154d0 100644
5544c1
--- a/tcg/sparc/tcg-target.h
5544c1
+++ b/tcg/sparc/tcg-target.h
5544c1
@@ -130,13 +130,7 @@ typedef enum {
5544c1
 
5544c1
 #define TCG_TARGET_HAS_GUEST_BASE
5544c1
 
5544c1
-#ifdef CONFIG_SOLARIS
5544c1
-#define TCG_AREG0 TCG_REG_G2
5544c1
-#elif HOST_LONG_BITS == 64
5544c1
-#define TCG_AREG0 TCG_REG_G5
5544c1
-#else
5544c1
-#define TCG_AREG0 TCG_REG_G6
5544c1
-#endif
5544c1
+#define TCG_AREG0 TCG_REG_I0
5544c1
 
5544c1
 static inline void flush_icache_range(tcg_target_ulong start,
5544c1
                                       tcg_target_ulong stop)
5544c1
-- 
5544c1
1.7.12.1
5544c1