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Blame 0040-tcg-i386-allow-constants-in-load-store-ops.patch

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From 83b25655bcd988054a2bb2a0a38dc662d4901b08 Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Mon, 10 Sep 2012 13:56:24 +0200
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Subject: [PATCH] tcg/i386: allow constants in load/store ops
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On x86, it is possible to move a constant value to memory. Add code to
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handle a constant argument to load/store ops.
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Reviewed-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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 tcg/i386/tcg-target.c | 50 +++++++++++++++++++++++++++++++++++++-------------
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 1 file changed, 37 insertions(+), 13 deletions(-)
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diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
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index 34c2df8..3017858 100644
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--- a/tcg/i386/tcg-target.c
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+++ b/tcg/i386/tcg-target.c
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@@ -263,6 +263,7 @@ static inline int tcg_target_const_match(tcg_target_long val,
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 #define OPC_MOVB_EvGv	(0x88)		/* stores, more or less */
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 #define OPC_MOVL_EvGv	(0x89)		/* stores, more or less */
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 #define OPC_MOVL_GvEv	(0x8b)		/* loads, more or less */
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+#define OPC_MOVB_EvIz   (0xc6)
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 #define OPC_MOVL_EvIz	(0xc7)
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 #define OPC_MOVL_Iv     (0xb8)
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 #define OPC_MOVSBL	(0xbe | P_EXT)
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@@ -1543,18 +1544,35 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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         break;
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     OP_32_64(st8):
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-        tcg_out_modrm_offset(s, OPC_MOVB_EvGv | P_REXB_R,
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-                             args[0], args[1], args[2]);
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+        if (const_args[0]) {
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+            tcg_out_modrm_offset(s, OPC_MOVB_EvIz,
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+                                 0, args[1], args[2]);
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+            tcg_out8(s, args[0]);
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+        } else {
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+            tcg_out_modrm_offset(s, OPC_MOVB_EvGv | P_REXB_R,
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+                                 args[0], args[1], args[2]);
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+        }
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         break;
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     OP_32_64(st16):
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-        tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
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-                             args[0], args[1], args[2]);
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+        if (const_args[0]) {
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+            tcg_out_modrm_offset(s, OPC_MOVL_EvIz | P_DATA16,
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+                                 0, args[1], args[2]);
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+            tcg_out16(s, args[0]);
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+        } else {
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+            tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
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+                                 args[0], args[1], args[2]);
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+        }
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         break;
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 #if TCG_TARGET_REG_BITS == 64
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     case INDEX_op_st32_i64:
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 #endif
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     case INDEX_op_st_i32:
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-        tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]);
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+        if (const_args[0]) {
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+            tcg_out_modrm_offset(s, OPC_MOVL_EvIz, 0, args[1], args[2]);
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+            tcg_out32(s, args[0]);
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+        } else {
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+            tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]);
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+        }
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         break;
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     OP_32_64(add):
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@@ -1758,7 +1776,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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         tcg_out_ld(s, TCG_TYPE_I64, args[0], args[1], args[2]);
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         break;
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     case INDEX_op_st_i64:
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-        tcg_out_st(s, TCG_TYPE_I64, args[0], args[1], args[2]);
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+        if (const_args[0]) {
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+            tcg_out_modrm_offset(s, OPC_MOVL_EvIz | P_REXW,
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+                                 0, args[1], args[2]);
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+            tcg_out32(s, args[0]);
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+        } else {
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+            tcg_out_st(s, TCG_TYPE_I64, args[0], args[1], args[2]);
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+        }
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         break;
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     case INDEX_op_qemu_ld32s:
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         tcg_out_qemu_ld(s, args, 2 | 4);
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@@ -1820,9 +1844,9 @@ static const TCGTargetOpDef x86_op_defs[] = {
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     { INDEX_op_ld16u_i32, { "r", "r" } },
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     { INDEX_op_ld16s_i32, { "r", "r" } },
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     { INDEX_op_ld_i32, { "r", "r" } },
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-    { INDEX_op_st8_i32, { "q", "r" } },
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-    { INDEX_op_st16_i32, { "r", "r" } },
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-    { INDEX_op_st_i32, { "r", "r" } },
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+    { INDEX_op_st8_i32, { "qi", "r" } },
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+    { INDEX_op_st16_i32, { "ri", "r" } },
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+    { INDEX_op_st_i32, { "ri", "r" } },
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     { INDEX_op_add_i32, { "r", "r", "ri" } },
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     { INDEX_op_sub_i32, { "r", "0", "ri" } },
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@@ -1873,10 +1897,10 @@ static const TCGTargetOpDef x86_op_defs[] = {
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     { INDEX_op_ld32u_i64, { "r", "r" } },
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     { INDEX_op_ld32s_i64, { "r", "r" } },
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     { INDEX_op_ld_i64, { "r", "r" } },
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-    { INDEX_op_st8_i64, { "r", "r" } },
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-    { INDEX_op_st16_i64, { "r", "r" } },
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-    { INDEX_op_st32_i64, { "r", "r" } },
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-    { INDEX_op_st_i64, { "r", "r" } },
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+    { INDEX_op_st8_i64, { "ri", "r" } },
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+    { INDEX_op_st16_i64, { "ri", "r" } },
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+    { INDEX_op_st32_i64, { "ri", "r" } },
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+    { INDEX_op_st_i64, { "re", "r" } },
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     { INDEX_op_add_i64, { "r", "0", "re" } },
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     { INDEX_op_mul_i64, { "r", "0", "re" } },
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-- 
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1.7.12.1
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