From 0004d2f3b0c3b21336415a967d70b7e9c2d08f54 Mon Sep 17 00:00:00 2001 Message-Id: <0004d2f3b0c3b21336415a967d70b7e9c2d08f54@dist-git> From: Jiri Denemark Date: Fri, 21 Jun 2019 09:26:09 +0200 Subject: [PATCH] cpu_x86: Read CPU features from IA32_ARCH_CAPABILITIES MSR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is used by the host capabilities code to construct host CPU definition. Signed-off-by: Jiri Denemark Reviewed-by: Ján Tomko (cherry picked from commit 56b254dccc96b7339494812c9df07ccf6af3da95) https://bugzilla.redhat.com/show_bug.cgi?id=1697627 Signed-off-by: Jiri Denemark Message-Id: <58ad207c48e0f2a6c44ff097b0881b649826ecd4.1561068591.git.jdenemar@redhat.com> Reviewed-by: Ján Tomko --- src/cpu/cpu_x86.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index ec0e408f98..0a520f07ff 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -2771,6 +2771,28 @@ virCPUx86GetHost(virCPUDefPtr cpu, cpuidSet(CPUX86_EXTENDED, cpuData) < 0) goto cleanup; + /* Read the IA32_ARCH_CAPABILITIES MSR (0x10a) if supported. + * This is best effort since there might be no way to read the MSR + * when we are not running as root. */ + if (virCPUx86DataCheckFeature(cpuData, "arch-capabilities") == 1) { + uint64_t msr; + unsigned long index = 0x10a; + + if (virHostCPUGetMSR(index, &msr) == 0) { + virCPUx86DataItem item = { + .type = VIR_CPU_X86_DATA_MSR, + .data.msr = { + .index = index, + .eax = msr & 0xffffffff, + .edx = msr >> 32, + }, + }; + + if (virCPUx86DataAdd(cpuData, &item) < 0) + return -1; + } + } + ret = x86DecodeCPUData(cpu, cpuData, models); cpu->microcodeVersion = virHostCPUGetMicrocodeVersion(); -- 2.22.0