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From 9b9fd1ec26b5386072fa967bac0771df5e86a284 Mon Sep 17 00:00:00 2001
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From: Stefan Liebler <stli@linux.vnet.ibm.com>
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Date: Thu, 27 Jul 2017 10:53:58 +0200
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Subject: [PATCH 07/10] S390: Use cu41 instruction for converting from utf32 to
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utf8.
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upstream-commit 23ea69a9d6e9ab28c66a232b767a800b04eaa938
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This patch adds an ifunc variant to use the cu instruction on arch12 CPUs.
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This new ifunc variant can be built if binutils support z13 vector
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instructions. At runtime, HWCAP_S390_VXE decides if we can use the
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cu41 instruction.
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ChangeLog:
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* sysdeps/s390/utf8-utf32-z9.c (__to_utf8_loop_vx_cu):
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Use vector and cu41 instruction.
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* sysdeps/s390/multiarch/utf8-utf32-z9.c: Add __to_utf8_loop_vx_cu
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in ifunc resolver.
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---
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sysdeps/s390/multiarch/utf8-utf32-z9.c | 8 ++-
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sysdeps/s390/utf8-utf32-z9.c | 112 +++++++++++++++++++++++++++++++++
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2 files changed, 117 insertions(+), 3 deletions(-)
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diff --git a/sysdeps/s390/multiarch/utf8-utf32-z9.c b/sysdeps/s390/multiarch/utf8-utf32-z9.c
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index faf1f46..0c6d9e9 100644
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--- a/sysdeps/s390/multiarch/utf8-utf32-z9.c
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+++ b/sysdeps/s390/multiarch/utf8-utf32-z9.c
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@@ -41,8 +41,10 @@ s390_libc_ifunc_expr (FROM_LOOP_DEFAULT, FROM_LOOP,
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: FROM_LOOP_DEFAULT);
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s390_libc_ifunc_expr (TO_LOOP_DEFAULT, TO_LOOP,
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- (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
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- ? TO_LOOP_VX
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- : TO_LOOP_DEFAULT);
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+ (HAVE_TO_VX_CU && (hwcap & HWCAP_S390_VXE))
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+ ? TO_LOOP_VX_CU
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+ : (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
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+ ? TO_LOOP_VX
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+ : TO_LOOP_DEFAULT);
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#include <iconv/skeleton.c>
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diff --git a/sysdeps/s390/utf8-utf32-z9.c b/sysdeps/s390/utf8-utf32-z9.c
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index e06d11e..e4f2e0c 100644
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--- a/sysdeps/s390/utf8-utf32-z9.c
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+++ b/sysdeps/s390/utf8-utf32-z9.c
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@@ -52,9 +52,11 @@
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#if defined HAVE_S390_VX_ASM_SUPPORT && defined USE_MULTIARCH
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# define HAVE_FROM_VX 1
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# define HAVE_TO_VX 1
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+# define HAVE_TO_VX_CU 1
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#else
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# define HAVE_FROM_VX 0
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# define HAVE_TO_VX 0
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+# define HAVE_TO_VX_CU 0
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#endif
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#if defined HAVE_S390_VX_GCC_SUPPORT
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@@ -863,6 +865,116 @@ gconv_end (struct __gconv_step *data)
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# define TO_LOOP_VX NULL
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#endif /* HAVE_TO_VX != 1 */
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+#if HAVE_TO_VX_CU == 1
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+#define BODY_TO_VX_CU \
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+ { \
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+ register const unsigned char* pInput asm ("8") = inptr; \
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+ register size_t inlen asm ("9") = inend - inptr; \
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+ register unsigned char* pOutput asm ("10") = outptr; \
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+ register size_t outlen asm ("11") = outend - outptr; \
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+ unsigned long tmp, tmp2; \
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+ asm volatile (".machine push\n\t" \
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+ ".machine \"z13\"\n\t" \
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+ ".machinemode \"zarch_nohighgprs\"\n\t" \
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+ " vleif %%v20,127,0\n\t" /* element 0: 127 */ \
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+ " vzero %%v21\n\t" \
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+ " vleih %%v21,8192,0\n\t" /* element 0: > */ \
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+ " vleih %%v21,-8192,2\n\t" /* element 1: =<> */ \
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+ CONVERT_32BIT_SIZE_T ([R_INLEN]) \
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+ CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
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+ /* Loop which handles UTF-32 chars <= 0x7f. */ \
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+ "0: clgijl %[R_INLEN],64,20f\n\t" \
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+ " clgijl %[R_OUTLEN],16,20f\n\t" \
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+ "1: vlm %%v16,%%v19,0(%[R_IN])\n\t" \
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+ " lghi %[R_TMP],0\n\t" \
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+ /* Shorten to byte values. */ \
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+ " vpkf %%v23,%%v16,%%v17\n\t" \
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+ " vpkf %%v24,%%v18,%%v19\n\t" \
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+ " vpkh %%v23,%%v23,%%v24\n\t" \
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+ /* Checking for values > 0x7f. */ \
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+ " vstrcfs %%v22,%%v16,%%v20,%%v21\n\t" \
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+ " jno 10f\n\t" \
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+ " vstrcfs %%v22,%%v17,%%v20,%%v21\n\t" \
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+ " jno 11f\n\t" \
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+ " vstrcfs %%v22,%%v18,%%v20,%%v21\n\t" \
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+ " jno 12f\n\t" \
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+ " vstrcfs %%v22,%%v19,%%v20,%%v21\n\t" \
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+ " jno 13f\n\t" \
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+ /* Store 16bytes to outptr. */ \
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+ " vst %%v23,0(%[R_OUT])\n\t" \
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+ " aghi %[R_INLEN],-64\n\t" \
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+ " aghi %[R_OUTLEN],-16\n\t" \
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+ " la %[R_IN],64(%[R_IN])\n\t" \
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+ " la %[R_OUT],16(%[R_OUT])\n\t" \
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+ " clgijl %[R_INLEN],64,20f\n\t" \
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+ " clgijl %[R_OUTLEN],16,20f\n\t" \
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+ " j 1b\n\t" \
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+ /* Found a value > 0x7f. */ \
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+ "13: ahi %[R_TMP],4\n\t" \
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+ "12: ahi %[R_TMP],4\n\t" \
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+ "11: ahi %[R_TMP],4\n\t" \
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+ "10: vlgvb %[R_I],%%v22,7\n\t" \
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+ " srlg %[R_I],%[R_I],2\n\t" \
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+ " agr %[R_I],%[R_TMP]\n\t" \
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+ " je 20f\n\t" \
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+ /* Store characters before invalid one... */ \
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+ " slgr %[R_OUTLEN],%[R_I]\n\t" \
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+ "15: aghi %[R_I],-1\n\t" \
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+ " vstl %%v23,%[R_I],0(%[R_OUT])\n\t" \
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+ /* ... and update pointers. */ \
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+ " aghi %[R_I],1\n\t" \
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+ " la %[R_OUT],0(%[R_I],%[R_OUT])\n\t" \
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+ " sllg %[R_I],%[R_I],2\n\t" \
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+ " la %[R_IN],0(%[R_I],%[R_IN])\n\t" \
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+ " slgr %[R_INLEN],%[R_I]\n\t" \
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+ /* Handle multibyte utf8-char with convert instruction. */ \
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+ "20: cu41 %[R_OUT],%[R_IN]\n\t" \
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+ " jo 0b\n\t" /* Try vector implemenation again. */ \
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+ " lochil %[R_RES],%[RES_OUT_FULL]\n\t" /* cc == 1. */ \
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+ " lochih %[R_RES],%[RES_IN_ILL]\n\t" /* cc == 2. */ \
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+ ".machine pop" \
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+ : /* outputs */ [R_IN] "+a" (pInput) \
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+ , [R_INLEN] "+d" (inlen), [R_OUT] "+a" (pOutput) \
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+ , [R_OUTLEN] "+d" (outlen), [R_TMP] "=d" (tmp) \
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+ , [R_I] "=a" (tmp2) \
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+ , [R_RES] "+d" (result) \
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+ : /* inputs */ \
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+ [RES_OUT_FULL] "i" (__GCONV_FULL_OUTPUT) \
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+ , [RES_IN_ILL] "i" (__GCONV_ILLEGAL_INPUT) \
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+ : /* clobber list */ "memory", "cc" \
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+ ASM_CLOBBER_VR ("v16") ASM_CLOBBER_VR ("v17") \
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+ ASM_CLOBBER_VR ("v18") ASM_CLOBBER_VR ("v19") \
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+ ASM_CLOBBER_VR ("v20") ASM_CLOBBER_VR ("v21") \
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+ ASM_CLOBBER_VR ("v22") ASM_CLOBBER_VR ("v23") \
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+ ASM_CLOBBER_VR ("v24") \
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+ ); \
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+ inptr = pInput; \
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+ outptr = pOutput; \
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+ \
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+ if (__glibc_likely (inptr == inend) \
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+ || result == __GCONV_FULL_OUTPUT) \
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+ break; \
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+ if (inptr + 4 > inend) \
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+ { \
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+ result = __GCONV_INCOMPLETE_INPUT; \
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+ break; \
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+ } \
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+ STANDARD_TO_LOOP_ERR_HANDLER (4); \
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+ }
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+
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+/* Generate loop-function with hardware vector and utf-convert instructions. */
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+# define MIN_NEEDED_INPUT MIN_NEEDED_TO
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+# define MIN_NEEDED_OUTPUT MIN_NEEDED_FROM
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+# define MAX_NEEDED_OUTPUT MAX_NEEDED_FROM
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+# define TO_LOOP_VX_CU __to_utf8_loop_vx_cu
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+# define LOOPFCT TO_LOOP_VX_CU
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+# define BODY BODY_TO_VX_CU
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+# define LOOP_NEED_FLAGS
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+# include <iconv/loop.c>
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+#else
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+# define TO_LOOP_VX_CU NULL
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+#endif /* HAVE_TO_VX_CU != 1 */
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+
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/* This file also exists in sysdeps/s390/multiarch/ which
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generates ifunc resolvers for FROM/TO_LOOP functions
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and includes iconv/skeleton.c afterwards. */
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--
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1.8.3.1
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