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commit 72276d6e8843db6df5971b06787f0a5e39bda138
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Author: Andrew Senkevich <andrew.senkevich@intel.com>
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Date: Sat Jan 16 00:49:45 2016 +0300
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Added memcpy/memmove family optimized with AVX512 for KNL hardware.
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Added AVX512 implementations of memcpy, mempcpy, memmove, memcpy_chk,
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mempcpy_chk, memmove_chk.
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It shows average improvement more than 30% over AVX versions on KNL
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hardware (performance results in the thread
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<https://sourceware.org/ml/libc-alpha/2016-01/msg00258.html>).
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* sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Added new files.
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* sysdeps/x86_64/multiarch/ifunc-impl-list.c: Added new tests.
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* sysdeps/x86_64/multiarch/memcpy-avx512-no-vzeroupper.S: New file.
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* sysdeps/x86_64/multiarch/mempcpy-avx512-no-vzeroupper.S: Likewise.
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* sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S: Likewise.
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* sysdeps/x86_64/multiarch/memcpy.S: Added new IFUNC branch.
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* sysdeps/x86_64/multiarch/memcpy_chk.S: Likewise.
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* sysdeps/x86_64/multiarch/memmove.c: Likewise.
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* sysdeps/x86_64/multiarch/memmove_chk.c: Likewise.
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* sysdeps/x86_64/multiarch/mempcpy.S: Likewise.
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* sysdeps/x86_64/multiarch/mempcpy_chk.S: Likewise.
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Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/Makefile
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===================================================================
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--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/Makefile
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+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/Makefile
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@@ -17,7 +17,8 @@ sysdep_routines += strncat-c stpncpy-c s
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strcat-ssse3 strncat-ssse3 strlen-sse2-pminub \
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strnlen-sse2-no-bsf strrchr-sse2-no-bsf strchr-sse2-no-bsf \
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memcmp-ssse3 strstr-sse2-unaligned \
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- memset-avx512-no-vzeroupper
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+ memset-avx512-no-vzeroupper memcpy-avx512-no-vzeroupper \
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+ mempcpy-avx512-no-vzeroupper memmove-avx512-no-vzeroupper
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ifeq (yes,$(config-cflags-sse4))
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sysdep_routines += strcspn-c strpbrk-c strspn-c strstr-c strcasestr-c varshift
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CFLAGS-varshift.c += -msse4
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Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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===================================================================
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--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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@@ -24,7 +24,7 @@
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#include "init-arch.h"
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/* Maximum number of IFUNC implementations. */
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-#define MAX_IFUNC 4
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+#define MAX_IFUNC 5
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/* Fill ARRAY of MAX elements with IFUNC implementations for function
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NAME supported on target machine and return the number of valid
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@@ -46,8 +46,11 @@ __libc_ifunc_impl_list (const char *name
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__memcmp_ssse3)
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IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_sse2))
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- /* Support sysdeps/x86_64/multiarch/memmove_chk.S. */
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+ /* Support sysdeps/x86_64/multiarch/memmove_chk.c. */
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IFUNC_IMPL (i, name, __memmove_chk,
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+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __memmove_chk_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_CPU_FEATURE (SSSE3),
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__memmove_chk_ssse3_back)
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IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_CPU_FEATURE (SSSE3),
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@@ -57,6 +60,9 @@ __libc_ifunc_impl_list (const char *name
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/* Support sysdeps/x86_64/multiarch/memmove.S. */
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IFUNC_IMPL (i, name, memmove,
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+ IFUNC_IMPL_ADD (array, i, memmove,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __memmove_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
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__memmove_ssse3_back)
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IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
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@@ -263,6 +269,9 @@ __libc_ifunc_impl_list (const char *name
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#ifdef SHARED
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/* Support sysdeps/x86_64/multiarch/memcpy_chk.S. */
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IFUNC_IMPL (i, name, __memcpy_chk,
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+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __memcpy_chk_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_CPU_FEATURE (SSSE3),
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__memcpy_chk_ssse3_back)
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IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_CPU_FEATURE (SSSE3),
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@@ -274,11 +283,18 @@ __libc_ifunc_impl_list (const char *name
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IFUNC_IMPL (i, name, memcpy,
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IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
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__memcpy_ssse3_back)
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- IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3), __memcpy_ssse3)
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+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
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+ __memcpy_ssse3)
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+ IFUNC_IMPL_ADD (array, i, memcpy,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __memcpy_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_sse2))
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/* Support sysdeps/x86_64/multiarch/mempcpy_chk.S. */
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IFUNC_IMPL (i, name, __mempcpy_chk,
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+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __mempcpy_chk_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_CPU_FEATURE (SSSE3),
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__mempcpy_chk_ssse3_back)
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IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_CPU_FEATURE (SSSE3),
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@@ -288,6 +304,9 @@ __libc_ifunc_impl_list (const char *name
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/* Support sysdeps/x86_64/multiarch/mempcpy.S. */
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IFUNC_IMPL (i, name, mempcpy,
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+ IFUNC_IMPL_ADD (array, i, mempcpy,
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+ HAS_ARCH_FEATURE (AVX512F_Usable),
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+ __mempcpy_avx512_no_vzeroupper)
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IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
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__mempcpy_ssse3_back)
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IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
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Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy-avx512-no-vzeroupper.S
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===================================================================
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--- /dev/null
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+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy-avx512-no-vzeroupper.S
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@@ -0,0 +1,408 @@
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+/* memcpy optimized with AVX512 for KNL hardware.
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+ Copyright (C) 2016 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <http://www.gnu.org/licenses/>. */
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+
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+#include <sysdep.h>
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+
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+#if defined HAVE_AVX512_ASM_SUPPORT && IS_IN (libc) \
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+ && (defined SHARED \
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+ || defined USE_AS_MEMMOVE \
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+ || !defined USE_MULTIARCH)
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+
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+#include "asm-syntax.h"
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+#ifndef MEMCPY
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+# define MEMCPY __memcpy_avx512_no_vzeroupper
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+# define MEMCPY_CHK __memcpy_chk_avx512_no_vzeroupper
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+#endif
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+
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+ .section .text,"ax",@progbits
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+#if !defined USE_AS_BCOPY
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+ENTRY (MEMCPY_CHK)
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+ cmpq %rdx, %rcx
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+ jb HIDDEN_JUMPTARGET (__chk_fail)
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+END (MEMCPY_CHK)
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+#endif
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+
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+ENTRY (MEMCPY)
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+ mov %rdi, %rax
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+#ifdef USE_AS_MEMPCPY
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+ add %rdx, %rax
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+#endif
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+ lea (%rsi, %rdx), %rcx
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+ lea (%rdi, %rdx), %r9
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+ cmp $512, %rdx
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+ ja L(512bytesormore)
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+
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+L(check):
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+ cmp $16, %rdx
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+ jbe L(less_16bytes)
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+ cmp $256, %rdx
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+ jb L(less_256bytes)
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+ vmovups (%rsi), %zmm0
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+ vmovups 0x40(%rsi), %zmm1
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+ vmovups 0x80(%rsi), %zmm2
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+ vmovups 0xC0(%rsi), %zmm3
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+ vmovups -0x100(%rcx), %zmm4
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+ vmovups -0xC0(%rcx), %zmm5
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+ vmovups -0x80(%rcx), %zmm6
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+ vmovups -0x40(%rcx), %zmm7
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+ vmovups %zmm0, (%rdi)
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+ vmovups %zmm1, 0x40(%rdi)
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+ vmovups %zmm2, 0x80(%rdi)
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+ vmovups %zmm3, 0xC0(%rdi)
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+ vmovups %zmm4, -0x100(%r9)
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+ vmovups %zmm5, -0xC0(%r9)
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+ vmovups %zmm6, -0x80(%r9)
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+ vmovups %zmm7, -0x40(%r9)
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+ ret
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+
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+L(less_256bytes):
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+ cmp $128, %dl
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+ jb L(less_128bytes)
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+ vmovups (%rsi), %zmm0
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+ vmovups 0x40(%rsi), %zmm1
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+ vmovups -0x80(%rcx), %zmm2
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+ vmovups -0x40(%rcx), %zmm3
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+ vmovups %zmm0, (%rdi)
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+ vmovups %zmm1, 0x40(%rdi)
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+ vmovups %zmm2, -0x80(%r9)
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+ vmovups %zmm3, -0x40(%r9)
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+ ret
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+
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+L(less_128bytes):
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+ cmp $64, %dl
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+ jb L(less_64bytes)
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+ vmovdqu (%rsi), %ymm0
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+ vmovdqu 0x20(%rsi), %ymm1
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+ vmovdqu -0x40(%rcx), %ymm2
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+ vmovdqu -0x20(%rcx), %ymm3
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+ vmovdqu %ymm0, (%rdi)
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+ vmovdqu %ymm1, 0x20(%rdi)
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+ vmovdqu %ymm2, -0x40(%r9)
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+ vmovdqu %ymm3, -0x20(%r9)
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+ ret
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+
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+L(less_64bytes):
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+ cmp $32, %dl
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+ jb L(less_32bytes)
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+ vmovdqu (%rsi), %ymm0
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+ vmovdqu -0x20(%rcx), %ymm1
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+ vmovdqu %ymm0, (%rdi)
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+ vmovdqu %ymm1, -0x20(%r9)
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+ ret
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+
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+L(less_32bytes):
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+ vmovdqu (%rsi), %xmm0
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+ vmovdqu -0x10(%rcx), %xmm1
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+ vmovdqu %xmm0, (%rdi)
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+ vmovdqu %xmm1, -0x10(%r9)
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+ ret
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+
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+L(less_16bytes):
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+ cmp $8, %dl
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+ jb L(less_8bytes)
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+ movq (%rsi), %rsi
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+ movq -0x8(%rcx), %rcx
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+ movq %rsi, (%rdi)
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+ movq %rcx, -0x8(%r9)
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+ ret
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+
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+L(less_8bytes):
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+ cmp $4, %dl
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+ jb L(less_4bytes)
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+ mov (%rsi), %esi
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+ mov -0x4(%rcx), %ecx
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+ mov %esi, (%rdi)
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+ mov %ecx, -0x4(%r9)
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+ ret
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+
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+L(less_4bytes):
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+ cmp $2, %dl
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+ jb L(less_2bytes)
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+ mov (%rsi), %si
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+ mov -0x2(%rcx), %cx
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+ mov %si, (%rdi)
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+ mov %cx, -0x2(%r9)
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+ ret
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+
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+L(less_2bytes):
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+ cmp $1, %dl
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+ jb L(less_1bytes)
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+ mov (%rsi), %cl
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00db10 |
+ mov %cl, (%rdi)
|
|
|
00db10 |
+L(less_1bytes):
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+
|
|
|
00db10 |
+L(512bytesormore):
|
|
|
00db10 |
+#ifdef SHARED_CACHE_SIZE_HALF
|
|
|
00db10 |
+ mov $SHARED_CACHE_SIZE_HALF, %r8
|
|
|
00db10 |
+#else
|
|
|
00db10 |
+ mov __x86_64_shared_cache_size_half(%rip), %r8
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+ cmp %r8, %rdx
|
|
|
00db10 |
+ jae L(preloop_large)
|
|
|
00db10 |
+ cmp $1024, %rdx
|
|
|
00db10 |
+ ja L(1024bytesormore)
|
|
|
00db10 |
+ prefetcht1 (%rsi)
|
|
|
00db10 |
+ prefetcht1 0x40(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x80(%rsi)
|
|
|
00db10 |
+ prefetcht1 0xC0(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x100(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x140(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x180(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x1C0(%rsi)
|
|
|
00db10 |
+ prefetcht1 -0x200(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x1C0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x180(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x140(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x100(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0xC0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x80(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x40(%rcx)
|
|
|
00db10 |
+ vmovups (%rsi), %zmm0
|
|
|
00db10 |
+ vmovups 0x40(%rsi), %zmm1
|
|
|
00db10 |
+ vmovups 0x80(%rsi), %zmm2
|
|
|
00db10 |
+ vmovups 0xC0(%rsi), %zmm3
|
|
|
00db10 |
+ vmovups 0x100(%rsi), %zmm4
|
|
|
00db10 |
+ vmovups 0x140(%rsi), %zmm5
|
|
|
00db10 |
+ vmovups 0x180(%rsi), %zmm6
|
|
|
00db10 |
+ vmovups 0x1C0(%rsi), %zmm7
|
|
|
00db10 |
+ vmovups -0x200(%rcx), %zmm8
|
|
|
00db10 |
+ vmovups -0x1C0(%rcx), %zmm9
|
|
|
00db10 |
+ vmovups -0x180(%rcx), %zmm10
|
|
|
00db10 |
+ vmovups -0x140(%rcx), %zmm11
|
|
|
00db10 |
+ vmovups -0x100(%rcx), %zmm12
|
|
|
00db10 |
+ vmovups -0xC0(%rcx), %zmm13
|
|
|
00db10 |
+ vmovups -0x80(%rcx), %zmm14
|
|
|
00db10 |
+ vmovups -0x40(%rcx), %zmm15
|
|
|
00db10 |
+ vmovups %zmm0, (%rdi)
|
|
|
00db10 |
+ vmovups %zmm1, 0x40(%rdi)
|
|
|
00db10 |
+ vmovups %zmm2, 0x80(%rdi)
|
|
|
00db10 |
+ vmovups %zmm3, 0xC0(%rdi)
|
|
|
00db10 |
+ vmovups %zmm4, 0x100(%rdi)
|
|
|
00db10 |
+ vmovups %zmm5, 0x140(%rdi)
|
|
|
00db10 |
+ vmovups %zmm6, 0x180(%rdi)
|
|
|
00db10 |
+ vmovups %zmm7, 0x1C0(%rdi)
|
|
|
00db10 |
+ vmovups %zmm8, -0x200(%r9)
|
|
|
00db10 |
+ vmovups %zmm9, -0x1C0(%r9)
|
|
|
00db10 |
+ vmovups %zmm10, -0x180(%r9)
|
|
|
00db10 |
+ vmovups %zmm11, -0x140(%r9)
|
|
|
00db10 |
+ vmovups %zmm12, -0x100(%r9)
|
|
|
00db10 |
+ vmovups %zmm13, -0xC0(%r9)
|
|
|
00db10 |
+ vmovups %zmm14, -0x80(%r9)
|
|
|
00db10 |
+ vmovups %zmm15, -0x40(%r9)
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+
|
|
|
00db10 |
+L(1024bytesormore):
|
|
|
00db10 |
+ cmp %rsi, %rdi
|
|
|
00db10 |
+ ja L(1024bytesormore_bkw)
|
|
|
00db10 |
+ sub $512, %r9
|
|
|
00db10 |
+ vmovups -0x200(%rcx), %zmm8
|
|
|
00db10 |
+ vmovups -0x1C0(%rcx), %zmm9
|
|
|
00db10 |
+ vmovups -0x180(%rcx), %zmm10
|
|
|
00db10 |
+ vmovups -0x140(%rcx), %zmm11
|
|
|
00db10 |
+ vmovups -0x100(%rcx), %zmm12
|
|
|
00db10 |
+ vmovups -0xC0(%rcx), %zmm13
|
|
|
00db10 |
+ vmovups -0x80(%rcx), %zmm14
|
|
|
00db10 |
+ vmovups -0x40(%rcx), %zmm15
|
|
|
00db10 |
+ prefetcht1 (%rsi)
|
|
|
00db10 |
+ prefetcht1 0x40(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x80(%rsi)
|
|
|
00db10 |
+ prefetcht1 0xC0(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x100(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x140(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x180(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x1C0(%rsi)
|
|
|
00db10 |
+
|
|
|
00db10 |
+/* Loop with unaligned memory access. */
|
|
|
00db10 |
+L(gobble_512bytes_loop):
|
|
|
00db10 |
+ vmovups (%rsi), %zmm0
|
|
|
00db10 |
+ vmovups 0x40(%rsi), %zmm1
|
|
|
00db10 |
+ vmovups 0x80(%rsi), %zmm2
|
|
|
00db10 |
+ vmovups 0xC0(%rsi), %zmm3
|
|
|
00db10 |
+ vmovups 0x100(%rsi), %zmm4
|
|
|
00db10 |
+ vmovups 0x140(%rsi), %zmm5
|
|
|
00db10 |
+ vmovups 0x180(%rsi), %zmm6
|
|
|
00db10 |
+ vmovups 0x1C0(%rsi), %zmm7
|
|
|
00db10 |
+ add $512, %rsi
|
|
|
00db10 |
+ prefetcht1 (%rsi)
|
|
|
00db10 |
+ prefetcht1 0x40(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x80(%rsi)
|
|
|
00db10 |
+ prefetcht1 0xC0(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x100(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x140(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x180(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x1C0(%rsi)
|
|
|
00db10 |
+ vmovups %zmm0, (%rdi)
|
|
|
00db10 |
+ vmovups %zmm1, 0x40(%rdi)
|
|
|
00db10 |
+ vmovups %zmm2, 0x80(%rdi)
|
|
|
00db10 |
+ vmovups %zmm3, 0xC0(%rdi)
|
|
|
00db10 |
+ vmovups %zmm4, 0x100(%rdi)
|
|
|
00db10 |
+ vmovups %zmm5, 0x140(%rdi)
|
|
|
00db10 |
+ vmovups %zmm6, 0x180(%rdi)
|
|
|
00db10 |
+ vmovups %zmm7, 0x1C0(%rdi)
|
|
|
00db10 |
+ add $512, %rdi
|
|
|
00db10 |
+ cmp %r9, %rdi
|
|
|
00db10 |
+ jb L(gobble_512bytes_loop)
|
|
|
00db10 |
+ vmovups %zmm8, (%r9)
|
|
|
00db10 |
+ vmovups %zmm9, 0x40(%r9)
|
|
|
00db10 |
+ vmovups %zmm10, 0x80(%r9)
|
|
|
00db10 |
+ vmovups %zmm11, 0xC0(%r9)
|
|
|
00db10 |
+ vmovups %zmm12, 0x100(%r9)
|
|
|
00db10 |
+ vmovups %zmm13, 0x140(%r9)
|
|
|
00db10 |
+ vmovups %zmm14, 0x180(%r9)
|
|
|
00db10 |
+ vmovups %zmm15, 0x1C0(%r9)
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+
|
|
|
00db10 |
+L(1024bytesormore_bkw):
|
|
|
00db10 |
+ add $512, %rdi
|
|
|
00db10 |
+ vmovups 0x1C0(%rsi), %zmm8
|
|
|
00db10 |
+ vmovups 0x180(%rsi), %zmm9
|
|
|
00db10 |
+ vmovups 0x140(%rsi), %zmm10
|
|
|
00db10 |
+ vmovups 0x100(%rsi), %zmm11
|
|
|
00db10 |
+ vmovups 0xC0(%rsi), %zmm12
|
|
|
00db10 |
+ vmovups 0x80(%rsi), %zmm13
|
|
|
00db10 |
+ vmovups 0x40(%rsi), %zmm14
|
|
|
00db10 |
+ vmovups (%rsi), %zmm15
|
|
|
00db10 |
+ prefetcht1 -0x40(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x80(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0xC0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x100(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x140(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x180(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x1C0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x200(%rcx)
|
|
|
00db10 |
+
|
|
|
00db10 |
+/* Backward loop with unaligned memory access. */
|
|
|
00db10 |
+L(gobble_512bytes_loop_bkw):
|
|
|
00db10 |
+ vmovups -0x40(%rcx), %zmm0
|
|
|
00db10 |
+ vmovups -0x80(%rcx), %zmm1
|
|
|
00db10 |
+ vmovups -0xC0(%rcx), %zmm2
|
|
|
00db10 |
+ vmovups -0x100(%rcx), %zmm3
|
|
|
00db10 |
+ vmovups -0x140(%rcx), %zmm4
|
|
|
00db10 |
+ vmovups -0x180(%rcx), %zmm5
|
|
|
00db10 |
+ vmovups -0x1C0(%rcx), %zmm6
|
|
|
00db10 |
+ vmovups -0x200(%rcx), %zmm7
|
|
|
00db10 |
+ sub $512, %rcx
|
|
|
00db10 |
+ prefetcht1 -0x40(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x80(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0xC0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x100(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x140(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x180(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x1C0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x200(%rcx)
|
|
|
00db10 |
+ vmovups %zmm0, -0x40(%r9)
|
|
|
00db10 |
+ vmovups %zmm1, -0x80(%r9)
|
|
|
00db10 |
+ vmovups %zmm2, -0xC0(%r9)
|
|
|
00db10 |
+ vmovups %zmm3, -0x100(%r9)
|
|
|
00db10 |
+ vmovups %zmm4, -0x140(%r9)
|
|
|
00db10 |
+ vmovups %zmm5, -0x180(%r9)
|
|
|
00db10 |
+ vmovups %zmm6, -0x1C0(%r9)
|
|
|
00db10 |
+ vmovups %zmm7, -0x200(%r9)
|
|
|
00db10 |
+ sub $512, %r9
|
|
|
00db10 |
+ cmp %rdi, %r9
|
|
|
00db10 |
+ ja L(gobble_512bytes_loop_bkw)
|
|
|
00db10 |
+ vmovups %zmm8, -0x40(%rdi)
|
|
|
00db10 |
+ vmovups %zmm9, -0x80(%rdi)
|
|
|
00db10 |
+ vmovups %zmm10, -0xC0(%rdi)
|
|
|
00db10 |
+ vmovups %zmm11, -0x100(%rdi)
|
|
|
00db10 |
+ vmovups %zmm12, -0x140(%rdi)
|
|
|
00db10 |
+ vmovups %zmm13, -0x180(%rdi)
|
|
|
00db10 |
+ vmovups %zmm14, -0x1C0(%rdi)
|
|
|
00db10 |
+ vmovups %zmm15, -0x200(%rdi)
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+
|
|
|
00db10 |
+L(preloop_large):
|
|
|
00db10 |
+ cmp %rsi, %rdi
|
|
|
00db10 |
+ ja L(preloop_large_bkw)
|
|
|
00db10 |
+ vmovups (%rsi), %zmm4
|
|
|
00db10 |
+ vmovups 0x40(%rsi), %zmm5
|
|
|
00db10 |
+
|
|
|
00db10 |
+/* Align destination for access with non-temporal stores in the loop. */
|
|
|
00db10 |
+ mov %rdi, %r8
|
|
|
00db10 |
+ and $-0x80, %rdi
|
|
|
00db10 |
+ add $0x80, %rdi
|
|
|
00db10 |
+ sub %rdi, %r8
|
|
|
00db10 |
+ sub %r8, %rsi
|
|
|
00db10 |
+ add %r8, %rdx
|
|
|
00db10 |
+L(gobble_256bytes_nt_loop):
|
|
|
00db10 |
+ prefetcht1 0x200(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x240(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x280(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x2C0(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x300(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x340(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x380(%rsi)
|
|
|
00db10 |
+ prefetcht1 0x3C0(%rsi)
|
|
|
00db10 |
+ vmovdqu64 (%rsi), %zmm0
|
|
|
00db10 |
+ vmovdqu64 0x40(%rsi), %zmm1
|
|
|
00db10 |
+ vmovdqu64 0x80(%rsi), %zmm2
|
|
|
00db10 |
+ vmovdqu64 0xC0(%rsi), %zmm3
|
|
|
00db10 |
+ vmovntdq %zmm0, (%rdi)
|
|
|
00db10 |
+ vmovntdq %zmm1, 0x40(%rdi)
|
|
|
00db10 |
+ vmovntdq %zmm2, 0x80(%rdi)
|
|
|
00db10 |
+ vmovntdq %zmm3, 0xC0(%rdi)
|
|
|
00db10 |
+ sub $256, %rdx
|
|
|
00db10 |
+ add $256, %rsi
|
|
|
00db10 |
+ add $256, %rdi
|
|
|
00db10 |
+ cmp $256, %rdx
|
|
|
00db10 |
+ ja L(gobble_256bytes_nt_loop)
|
|
|
00db10 |
+ sfence
|
|
|
00db10 |
+ vmovups %zmm4, (%rax)
|
|
|
00db10 |
+ vmovups %zmm5, 0x40(%rax)
|
|
|
00db10 |
+ jmp L(check)
|
|
|
00db10 |
+
|
|
|
00db10 |
+L(preloop_large_bkw):
|
|
|
00db10 |
+ vmovups -0x80(%rcx), %zmm4
|
|
|
00db10 |
+ vmovups -0x40(%rcx), %zmm5
|
|
|
00db10 |
+
|
|
|
00db10 |
+/* Align end of destination for access with non-temporal stores. */
|
|
|
00db10 |
+ mov %r9, %r8
|
|
|
00db10 |
+ and $-0x80, %r9
|
|
|
00db10 |
+ sub %r9, %r8
|
|
|
00db10 |
+ sub %r8, %rcx
|
|
|
00db10 |
+ sub %r8, %rdx
|
|
|
00db10 |
+ add %r9, %r8
|
|
|
00db10 |
+L(gobble_256bytes_nt_loop_bkw):
|
|
|
00db10 |
+ prefetcht1 -0x400(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x3C0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x380(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x340(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x300(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x2C0(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x280(%rcx)
|
|
|
00db10 |
+ prefetcht1 -0x240(%rcx)
|
|
|
00db10 |
+ vmovdqu64 -0x100(%rcx), %zmm0
|
|
|
00db10 |
+ vmovdqu64 -0xC0(%rcx), %zmm1
|
|
|
00db10 |
+ vmovdqu64 -0x80(%rcx), %zmm2
|
|
|
00db10 |
+ vmovdqu64 -0x40(%rcx), %zmm3
|
|
|
00db10 |
+ vmovntdq %zmm0, -0x100(%r9)
|
|
|
00db10 |
+ vmovntdq %zmm1, -0xC0(%r9)
|
|
|
00db10 |
+ vmovntdq %zmm2, -0x80(%r9)
|
|
|
00db10 |
+ vmovntdq %zmm3, -0x40(%r9)
|
|
|
00db10 |
+ sub $256, %rdx
|
|
|
00db10 |
+ sub $256, %rcx
|
|
|
00db10 |
+ sub $256, %r9
|
|
|
00db10 |
+ cmp $256, %rdx
|
|
|
00db10 |
+ ja L(gobble_256bytes_nt_loop_bkw)
|
|
|
00db10 |
+ sfence
|
|
|
00db10 |
+ vmovups %zmm4, -0x80(%r8)
|
|
|
00db10 |
+ vmovups %zmm5, -0x40(%r8)
|
|
|
00db10 |
+ jmp L(check)
|
|
|
00db10 |
+END (MEMCPY)
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/memcpy.S
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy.S
|
|
|
00db10 |
@@ -30,7 +30,15 @@
|
|
|
00db10 |
ENTRY(__new_memcpy)
|
|
|
00db10 |
.type __new_memcpy, @gnu_indirect_function
|
|
|
00db10 |
LOAD_RTLD_GLOBAL_RO_RDX
|
|
|
00db10 |
- leaq __memcpy_sse2(%rip), %rax
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ leaq __memcpy_avx512_no_vzeroupper(%rip), %rax
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+1: leaq __memcpy_sse2(%rip), %rax
|
|
|
00db10 |
HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
jz 2f
|
|
|
00db10 |
leaq __memcpy_ssse3(%rip), %rax
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy_chk.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/memcpy_chk.S
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memcpy_chk.S
|
|
|
00db10 |
@@ -30,7 +30,15 @@
|
|
|
00db10 |
ENTRY(__memcpy_chk)
|
|
|
00db10 |
.type __memcpy_chk, @gnu_indirect_function
|
|
|
00db10 |
LOAD_RTLD_GLOBAL_RO_RDX
|
|
|
00db10 |
- leaq __memcpy_chk_sse2(%rip), %rax
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+# HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+# jz 1f
|
|
|
00db10 |
+ leaq __memcpy_avx512_no_vzeroupper(%rip), %rax
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+1: leaq __memcpy_chk_sse2(%rip), %rax
|
|
|
00db10 |
HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
jz 2f
|
|
|
00db10 |
leaq __memcpy_chk_ssse3(%rip), %rax
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- /dev/null
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S
|
|
|
00db10 |
@@ -0,0 +1,22 @@
|
|
|
00db10 |
+/* memmove optimized with AVX512 for KNL hardware.
|
|
|
00db10 |
+ Copyright (C) 2016 Free Software Foundation, Inc.
|
|
|
00db10 |
+ This file is part of the GNU C Library.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ The GNU C Library is free software; you can redistribute it and/or
|
|
|
00db10 |
+ modify it under the terms of the GNU Lesser General Public
|
|
|
00db10 |
+ License as published by the Free Software Foundation; either
|
|
|
00db10 |
+ version 2.1 of the License, or (at your option) any later version.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ The GNU C Library is distributed in the hope that it will be useful,
|
|
|
00db10 |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
00db10 |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
00db10 |
+ Lesser General Public License for more details.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ You should have received a copy of the GNU Lesser General Public
|
|
|
00db10 |
+ License along with the GNU C Library; if not, see
|
|
|
00db10 |
+ <http://www.gnu.org/licenses/>. */
|
|
|
00db10 |
+
|
|
|
00db10 |
+#define USE_AS_MEMMOVE
|
|
|
00db10 |
+#define MEMCPY __memmove_avx512_no_vzeroupper
|
|
|
00db10 |
+#define MEMCPY_CHK __memmove_chk_avx512_no_vzeroupper
|
|
|
00db10 |
+#include "memcpy-avx512-no-vzeroupper.S"
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove.c
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/memmove.c
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove.c
|
|
|
00db10 |
@@ -35,6 +35,9 @@
|
|
|
00db10 |
extern __typeof (__redirect_memmove) __memmove_sse2 attribute_hidden;
|
|
|
00db10 |
extern __typeof (__redirect_memmove) __memmove_ssse3 attribute_hidden;
|
|
|
00db10 |
extern __typeof (__redirect_memmove) __memmove_ssse3_back attribute_hidden;
|
|
|
00db10 |
+# ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+extern __typeof (__redirect_memmove) __memmove_avx512_no_vzeroupper attribute_hidden;
|
|
|
00db10 |
+# endif
|
|
|
00db10 |
#endif
|
|
|
00db10 |
|
|
|
00db10 |
#include "string/memmove.c"
|
|
|
00db10 |
@@ -47,10 +50,16 @@ extern __typeof (__redirect_memmove) __m
|
|
|
00db10 |
ifunc symbol properly. */
|
|
|
00db10 |
extern __typeof (__redirect_memmove) __libc_memmove;
|
|
|
00db10 |
libc_ifunc (__libc_memmove,
|
|
|
00db10 |
- HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ && HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+ ? __memmove_avx512_no_vzeroupper
|
|
|
00db10 |
+ :
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+ (HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
? (HAS_ARCH_FEATURE (Fast_Copy_Backward)
|
|
|
00db10 |
? __memmove_ssse3_back : __memmove_ssse3)
|
|
|
00db10 |
- : __memmove_sse2)
|
|
|
00db10 |
+ : __memmove_sse2))
|
|
|
00db10 |
|
|
|
00db10 |
strong_alias (__libc_memmove, memmove)
|
|
|
00db10 |
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove_chk.c
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/memmove_chk.c
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/memmove_chk.c
|
|
|
00db10 |
@@ -25,11 +25,20 @@
|
|
|
00db10 |
extern __typeof (__memmove_chk) __memmove_chk_sse2 attribute_hidden;
|
|
|
00db10 |
extern __typeof (__memmove_chk) __memmove_chk_ssse3 attribute_hidden;
|
|
|
00db10 |
extern __typeof (__memmove_chk) __memmove_chk_ssse3_back attribute_hidden;
|
|
|
00db10 |
+# ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+extern __typeof (__memmove_chk) __memmove_chk_avx512_no_vzeroupper attribute_hidden;
|
|
|
00db10 |
+# endif
|
|
|
00db10 |
|
|
|
00db10 |
#include "debug/memmove_chk.c"
|
|
|
00db10 |
|
|
|
00db10 |
libc_ifunc (__memmove_chk,
|
|
|
00db10 |
- HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ && HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+ ? __memmove_chk_avx512_no_vzeroupper
|
|
|
00db10 |
+ :
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+ (HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
? (HAS_ARCH_FEATURE (Fast_Copy_Backward)
|
|
|
00db10 |
? __memmove_chk_ssse3_back : __memmove_chk_ssse3)
|
|
|
00db10 |
- : __memmove_chk_sse2);
|
|
|
00db10 |
+ : __memmove_chk_sse2));
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy-avx512-no-vzeroupper.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- /dev/null
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy-avx512-no-vzeroupper.S
|
|
|
00db10 |
@@ -0,0 +1,22 @@
|
|
|
00db10 |
+/* mempcpy optimized with AVX512 for KNL hardware.
|
|
|
00db10 |
+ Copyright (C) 2016 Free Software Foundation, Inc.
|
|
|
00db10 |
+ This file is part of the GNU C Library.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ The GNU C Library is free software; you can redistribute it and/or
|
|
|
00db10 |
+ modify it under the terms of the GNU Lesser General Public
|
|
|
00db10 |
+ License as published by the Free Software Foundation; either
|
|
|
00db10 |
+ version 2.1 of the License, or (at your option) any later version.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ The GNU C Library is distributed in the hope that it will be useful,
|
|
|
00db10 |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
00db10 |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
00db10 |
+ Lesser General Public License for more details.
|
|
|
00db10 |
+
|
|
|
00db10 |
+ You should have received a copy of the GNU Lesser General Public
|
|
|
00db10 |
+ License along with the GNU C Library; if not, see
|
|
|
00db10 |
+ <http://www.gnu.org/licenses/>. */
|
|
|
00db10 |
+
|
|
|
00db10 |
+#define USE_AS_MEMPCPY
|
|
|
00db10 |
+#define MEMCPY __mempcpy_avx512_no_vzeroupper
|
|
|
00db10 |
+#define MEMCPY_CHK __mempcpy_chk_avx512_no_vzeroupper
|
|
|
00db10 |
+#include "memcpy-avx512-no-vzeroupper.S"
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/mempcpy.S
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy.S
|
|
|
00db10 |
@@ -28,7 +28,15 @@
|
|
|
00db10 |
ENTRY(__mempcpy)
|
|
|
00db10 |
.type __mempcpy, @gnu_indirect_function
|
|
|
00db10 |
LOAD_RTLD_GLOBAL_RO_RDX
|
|
|
00db10 |
- leaq __mempcpy_sse2(%rip), %rax
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ leaq __mempcpy_avx512_no_vzeroupper(%rip), %rax
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+1: leaq __mempcpy_sse2(%rip), %rax
|
|
|
00db10 |
HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
jz 2f
|
|
|
00db10 |
leaq __mempcpy_ssse3(%rip), %rax
|
|
|
00db10 |
Index: glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy_chk.S
|
|
|
00db10 |
===================================================================
|
|
|
00db10 |
--- glibc-2.17-c758a686.orig/sysdeps/x86_64/multiarch/mempcpy_chk.S
|
|
|
00db10 |
+++ glibc-2.17-c758a686/sysdeps/x86_64/multiarch/mempcpy_chk.S
|
|
|
00db10 |
@@ -30,7 +30,15 @@
|
|
|
00db10 |
ENTRY(__mempcpy_chk)
|
|
|
00db10 |
.type __mempcpy_chk, @gnu_indirect_function
|
|
|
00db10 |
LOAD_RTLD_GLOBAL_RO_RDX
|
|
|
00db10 |
- leaq __mempcpy_chk_sse2(%rip), %rax
|
|
|
00db10 |
+#ifdef HAVE_AVX512_ASM_SUPPORT
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (AVX512F_Usable)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
|
|
00db10 |
+ jz 1f
|
|
|
00db10 |
+ leaq __mempcpy_chk_avx512_no_vzeroupper(%rip), %rax
|
|
|
00db10 |
+ ret
|
|
|
00db10 |
+#endif
|
|
|
00db10 |
+1: leaq __mempcpy_chk_sse2(%rip), %rax
|
|
|
00db10 |
HAS_CPU_FEATURE (SSSE3)
|
|
|
00db10 |
jz 2f
|
|
|
00db10 |
leaq __mempcpy_chk_ssse3(%rip), %rax
|