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From 88b3ac2949cb535c5213324f33e9745d769f7dad Mon Sep 17 00:00:00 2001
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From: Sasikumar Chandrasekaran <sasikumar.pc@broadcom.com>
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Date: Tue, 10 Jan 2017 18:20:48 -0500
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Subject: [PATCH 06/11] scsi: megaraid_sas: Dynamic Raid Map Changes for SAS3.5
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Generic Megaraid Controllers
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SAS3.5 Generic Megaraid Controllers FW will support new dynamic RaidMap to have different
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sizes for different number of supported VDs.
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Signed-off-by: Sasikumar Chandrasekaran <sasikumar.pc@broadcom.com>
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Reviewed-by: Tomas Henzl <thenzl@redhat.com>
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Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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---
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drivers/scsi/megaraid/megaraid_sas.h | 7 +
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drivers/scsi/megaraid/megaraid_sas_base.c | 60 ++++--
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drivers/scsi/megaraid/megaraid_sas_fp.c | 301 ++++++++++++++++++++++++----
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drivers/scsi/megaraid/megaraid_sas_fusion.c | 225 ++++++++++++++++-----
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drivers/scsi/megaraid/megaraid_sas_fusion.h | 240 ++++++++++++++++++----
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5 files changed, 695 insertions(+), 138 deletions(-)
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diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h
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index 0b4d37b..d5205c4 100644
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--- a/drivers/scsi/megaraid/megaraid_sas.h
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+++ b/drivers/scsi/megaraid/megaraid_sas.h
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@@ -1434,6 +1434,12 @@ enum FW_BOOT_CONTEXT {
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#define MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT 14
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#define MR_MAX_MSIX_REG_ARRAY 16
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#define MR_RDPQ_MODE_OFFSET 0X00800000
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+
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+#define MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT 16
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+#define MR_MAX_RAID_MAP_SIZE_MASK 0x1FF
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+#define MR_MIN_MAP_SIZE 0x10000
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+/* 64k */
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+
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#define MR_CAN_HANDLE_SYNC_CACHE_OFFSET 0X01000000
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/*
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@@ -2152,6 +2158,7 @@ struct megasas_instance {
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bool fw_sync_cache_support;
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bool is_ventura;
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bool msix_combined;
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+ u16 max_raid_mapsize;
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};
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struct MR_LD_VF_MAP {
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u32 size;
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diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c
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index 0722286..1d8cf03 100644
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--- a/drivers/scsi/megaraid/megaraid_sas_base.c
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+++ b/drivers/scsi/megaraid/megaraid_sas_base.c
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@@ -4457,8 +4457,7 @@ megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
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static void megasas_update_ext_vd_details(struct megasas_instance *instance)
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{
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struct fusion_context *fusion;
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- u32 old_map_sz;
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- u32 new_map_sz;
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+ u32 ventura_map_sz = 0;
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fusion = instance->ctrl_context;
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/* For MFI based controllers return dummy success */
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@@ -4488,21 +4487,38 @@ static void megasas_update_ext_vd_details(struct megasas_instance *instance)
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instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
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"Legacy(64 VD) firmware");
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- old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
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- (sizeof(struct MR_LD_SPAN_MAP) *
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- (instance->fw_supported_vd_count - 1));
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- new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
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- fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
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- (sizeof(struct MR_LD_SPAN_MAP) *
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- (instance->drv_supported_vd_count - 1));
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-
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- fusion->max_map_sz = max(old_map_sz, new_map_sz);
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+ if (instance->max_raid_mapsize) {
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+ ventura_map_sz = instance->max_raid_mapsize *
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+ MR_MIN_MAP_SIZE; /* 64k */
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+ fusion->current_map_sz = ventura_map_sz;
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+ fusion->max_map_sz = ventura_map_sz;
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+ } else {
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+ fusion->old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
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+ (sizeof(struct MR_LD_SPAN_MAP) *
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+ (instance->fw_supported_vd_count - 1));
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+ fusion->new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
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+ fusion->max_map_sz =
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+ max(fusion->old_map_sz, fusion->new_map_sz);
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- if (instance->supportmax256vd)
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- fusion->current_map_sz = new_map_sz;
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- else
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- fusion->current_map_sz = old_map_sz;
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+ if (instance->supportmax256vd)
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+ fusion->current_map_sz = fusion->new_map_sz;
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+ else
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+ fusion->current_map_sz = fusion->old_map_sz;
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+ }
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+ /* irrespective of FW raid maps, driver raid map is constant */
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+ fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP_ALL);
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+
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+#if VD_EXT_DEBUG
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+ dev_info(&instance->pdev->dev, "instance->max_raid_mapsize 0x%x\n ",
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+ instance->max_raid_mapsize);
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+ dev_info(&instance->pdev->dev, "new_map_sz = 0x%x, old_map_sz = 0x%x\n",
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+ fusion->new_map_sz, fusion->old_map_sz);
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+ dev_info(&instance->pdev->dev, "ventura_map_sz = 0x%x, current_map_sz = 0x%x\n",
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+ ventura_map_sz, fusion->current_map_sz);
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+ dev_info(&instance->pdev->dev, "fusion->drv_map_sz =0x%x, size of driver raid map 0x%lx\n",
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+ fusion->drv_map_sz, sizeof(struct MR_DRV_RAID_MAP_ALL));
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+#endif
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}
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/**
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@@ -5043,7 +5059,7 @@ static int megasas_init_fw(struct megasas_instance *instance)
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{
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u32 max_sectors_1;
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u32 max_sectors_2;
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- u32 tmp_sectors, msix_enable, scratch_pad_2;
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+ u32 tmp_sectors, msix_enable, scratch_pad_2, scratch_pad_3;
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resource_size_t base_addr;
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struct megasas_register_set __iomem *reg_set;
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struct megasas_ctrl_info *ctrl_info = NULL;
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@@ -5119,7 +5135,17 @@ static int megasas_init_fw(struct megasas_instance *instance)
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goto fail_ready_state;
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}
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-
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+ if (instance->is_ventura) {
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+ scratch_pad_3 =
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+ readl(&instance->reg_set->outbound_scratch_pad_3);
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+#if VD_EXT_DEBUG
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+ dev_info(&instance->pdev->dev, "scratch_pad3 0x%x\n",
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+ scratch_pad_3);
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+#endif
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+ instance->max_raid_mapsize = ((scratch_pad_3 >>
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+ MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
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+ MR_MAX_RAID_MAP_SIZE_MASK);
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+ }
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/* Check if MSI-X is supported while in ready state */
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msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
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diff --git a/drivers/scsi/megaraid/megaraid_sas_fp.c b/drivers/scsi/megaraid/megaraid_sas_fp.c
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index 3644dbc..e45affe 100644
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--- a/drivers/scsi/megaraid/megaraid_sas_fp.c
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+++ b/drivers/scsi/megaraid/megaraid_sas_fp.c
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@@ -179,18 +179,204 @@ void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
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struct fusion_context *fusion = instance->ctrl_context;
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struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
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struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
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- int i;
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+ int i, j;
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u16 ld_count;
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+ struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
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+ struct MR_FW_RAID_MAP_EXT *fw_map_ext;
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+ struct MR_RAID_MAP_DESC_TABLE *desc_table;
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struct MR_DRV_RAID_MAP_ALL *drv_map =
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fusion->ld_drv_map[(instance->map_id & 1)];
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struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
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+ void *raid_map_data = NULL;
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+
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+ memset(drv_map, 0, fusion->drv_map_sz);
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+ memset(pDrvRaidMap->ldTgtIdToLd,
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+ 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
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+
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+ if (instance->max_raid_mapsize) {
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+ fw_map_dyn = fusion->ld_map[(instance->map_id & 1)];
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+#if VD_EXT_DEBUG
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+ dev_dbg(&instance->pdev->dev, "raidMapSize 0x%x fw_map_dyn->descTableOffset 0x%x\n",
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+ le32_to_cpu(fw_map_dyn->raid_map_size),
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+ le32_to_cpu(fw_map_dyn->desc_table_offset));
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+ dev_dbg(&instance->pdev->dev, "descTableSize 0x%x descTableNumElements 0x%x\n",
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+ le32_to_cpu(fw_map_dyn->desc_table_size),
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+ le32_to_cpu(fw_map_dyn->desc_table_num_elements));
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+ dev_dbg(&instance->pdev->dev, "drv map %p ldCount %d\n",
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+ drv_map, fw_map_dyn->ld_count);
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+#endif
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+ desc_table =
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+ (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
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+ if (desc_table != fw_map_dyn->raid_map_desc_table)
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+ dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
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+ desc_table, fw_map_dyn->raid_map_desc_table);
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+
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+ ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
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+ pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
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+ pDrvRaidMap->fpPdIoTimeoutSec =
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+ fw_map_dyn->fp_pd_io_timeout_sec;
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+ pDrvRaidMap->totalSize = sizeof(struct MR_DRV_RAID_MAP_ALL);
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+ /* point to actual data starting point*/
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+ raid_map_data = (void *)fw_map_dyn +
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+ le32_to_cpu(fw_map_dyn->desc_table_offset) +
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+ le32_to_cpu(fw_map_dyn->desc_table_size);
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+
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+ for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
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+
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+#if VD_EXT_DEBUG
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+ dev_dbg(&instance->pdev->dev, "desc table %p\n",
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+ desc_table);
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+ dev_dbg(&instance->pdev->dev, "raidmap type %d, raidmapOffset 0x%x\n",
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+ desc_table->raid_map_desc_type,
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+ desc_table->raid_map_desc_offset);
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+ dev_dbg(&instance->pdev->dev, "raid map number of elements 0%x, raidmapsize 0x%x\n",
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+ desc_table->raid_map_desc_elements,
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+ desc_table->raid_map_desc_buffer_size);
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+#endif
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+ switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
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+ case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
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+ fw_map_dyn->dev_hndl_info =
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+ (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
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+#if VD_EXT_DEBUG
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+ dev_dbg(&instance->pdev->dev, "devHndlInfo address %p\n",
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+ fw_map_dyn->dev_hndl_info);
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a8a466 |
+#endif
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a8a466 |
+ memcpy(pDrvRaidMap->devHndlInfo,
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a8a466 |
+ fw_map_dyn->dev_hndl_info,
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+ sizeof(struct MR_DEV_HANDLE_INFO) *
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a8a466 |
+ le32_to_cpu(desc_table->raid_map_desc_elements));
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a8a466 |
+ break;
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a8a466 |
+ case RAID_MAP_DESC_TYPE_TGTID_INFO:
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a8a466 |
+ fw_map_dyn->ld_tgt_id_to_ld =
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+ (u16 *) (raid_map_data +
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a8a466 |
+ le32_to_cpu(desc_table->raid_map_desc_offset));
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a8a466 |
+#if VD_EXT_DEBUG
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a8a466 |
+ dev_dbg(&instance->pdev->dev, "ldTgtIdToLd address %p\n",
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a8a466 |
+ fw_map_dyn->ld_tgt_id_to_ld);
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a8a466 |
+#endif
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a8a466 |
+ for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
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a8a466 |
+ pDrvRaidMap->ldTgtIdToLd[j] =
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a8a466 |
+ fw_map_dyn->ld_tgt_id_to_ld[j];
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a8a466 |
+#if VD_EXT_DEBUG
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a8a466 |
+ dev_dbg(&instance->pdev->dev, " %d drv ldTgtIdToLd %d\n",
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a8a466 |
+ j, pDrvRaidMap->ldTgtIdToLd[j]);
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a8a466 |
+#endif
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a8a466 |
+ }
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a8a466 |
+ break;
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a8a466 |
+ case RAID_MAP_DESC_TYPE_ARRAY_INFO:
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a8a466 |
+ fw_map_dyn->ar_map_info =
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a8a466 |
+ (struct MR_ARRAY_INFO *)
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a8a466 |
+ (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
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a8a466 |
+#if VD_EXT_DEBUG
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a8a466 |
+ dev_dbg(&instance->pdev->dev, "arMapInfo address %p\n",
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a8a466 |
+ fw_map_dyn->ar_map_info);
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a8a466 |
+#endif
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a8a466 |
+
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a8a466 |
+ memcpy(pDrvRaidMap->arMapInfo,
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a8a466 |
+ fw_map_dyn->ar_map_info,
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|
a8a466 |
+ sizeof(struct MR_ARRAY_INFO) * le32_to_cpu(desc_table->raid_map_desc_elements));
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|
a8a466 |
+ break;
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a8a466 |
+ case RAID_MAP_DESC_TYPE_SPAN_INFO:
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|
a8a466 |
+ fw_map_dyn->ld_span_map =
|
|
|
a8a466 |
+ (struct MR_LD_SPAN_MAP *)
|
|
|
a8a466 |
+ (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
|
|
|
a8a466 |
+ memcpy(pDrvRaidMap->ldSpanMap,
|
|
|
a8a466 |
+ fw_map_dyn->ld_span_map,
|
|
|
a8a466 |
+ sizeof(struct MR_LD_SPAN_MAP) * le32_to_cpu(desc_table->raid_map_desc_elements));
|
|
|
a8a466 |
+#if VD_EXT_DEBUG
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "ldSpanMap address %p\n",
|
|
|
a8a466 |
+ fw_map_dyn->ld_span_map);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "MR_LD_SPAN_MAP size 0x%lx\n",
|
|
|
a8a466 |
+ sizeof(struct MR_LD_SPAN_MAP));
|
|
|
a8a466 |
+ for (j = 0; j < ld_count; j++) {
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) : fw_map_dyn->ldSpanMap[%d].ldRaid.targetId 0x%x\n",
|
|
|
a8a466 |
+ j, j, fw_map_dyn->ld_span_map[j].ldRaid.targetId);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "fw_map_dyn->ldSpanMap[%d].ldRaid.seqNum 0x%x\n",
|
|
|
a8a466 |
+ j, fw_map_dyn->ld_span_map[j].ldRaid.seqNum);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "fw_map_dyn->ld_span_map[%d].ldRaid.rowSize 0x%x\n",
|
|
|
a8a466 |
+ j, (u32)fw_map_dyn->ld_span_map[j].ldRaid.rowSize);
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) :pDrvRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x\n",
|
|
|
a8a466 |
+ j, j, pDrvRaidMap->ldSpanMap[j].ldRaid.targetId);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "DrvRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x\n",
|
|
|
a8a466 |
+ j, pDrvRaidMap->ldSpanMap[j].ldRaid.seqNum);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "pDrvRaidMap->ldSpanMap[%d].ldRaid.rowSize 0x%x\n",
|
|
|
a8a466 |
+ j, (u32)pDrvRaidMap->ldSpanMap[j].ldRaid.rowSize);
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) : drv raid map all %p\n",
|
|
|
a8a466 |
+ instance->unique_id, drv_map);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "raid map %p LD RAID MAP %p/%p\n",
|
|
|
a8a466 |
+ pDrvRaidMap,
|
|
|
a8a466 |
+ &fw_map_dyn->ld_span_map[j].ldRaid,
|
|
|
a8a466 |
+ &pDrvRaidMap->ldSpanMap[j].ldRaid);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+#endif
|
|
|
a8a466 |
+ break;
|
|
|
a8a466 |
+ default:
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
|
|
|
a8a466 |
+ fw_map_dyn->desc_table_num_elements);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+ ++desc_table;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ } else if (instance->supportmax256vd) {
|
|
|
a8a466 |
+ fw_map_ext =
|
|
|
a8a466 |
+ (struct MR_FW_RAID_MAP_EXT *) fusion->ld_map[(instance->map_id & 1)];
|
|
|
a8a466 |
+ ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
|
|
|
a8a466 |
+ if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
|
|
|
a8a466 |
+ return;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+#if VD_EXT_DEBUG
|
|
|
a8a466 |
+ for (i = 0; i < ld_count; i++) {
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) :Index 0x%x\n",
|
|
|
a8a466 |
+ instance->unique_id, i);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "Target Id 0x%x\n",
|
|
|
a8a466 |
+ fw_map_ext->ldSpanMap[i].ldRaid.targetId);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "Seq Num 0x%x Size 0/%llx\n",
|
|
|
a8a466 |
+ fw_map_ext->ldSpanMap[i].ldRaid.seqNum,
|
|
|
a8a466 |
+ fw_map_ext->ldSpanMap[i].ldRaid.size);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+#endif
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
|
|
|
a8a466 |
+ pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
|
|
|
a8a466 |
+ for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
|
|
|
a8a466 |
+ pDrvRaidMap->ldTgtIdToLd[i] =
|
|
|
a8a466 |
+ (u16)fw_map_ext->ldTgtIdToLd[i];
|
|
|
a8a466 |
+ memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
|
|
|
a8a466 |
+ sizeof(struct MR_LD_SPAN_MAP) * ld_count);
|
|
|
a8a466 |
+#if VD_EXT_DEBUG
|
|
|
a8a466 |
+ for (i = 0; i < ld_count; i++) {
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) : fw_map_ext->ldSpanMap[%d].ldRaid.targetId 0x%x\n",
|
|
|
a8a466 |
+ i, i, fw_map_ext->ldSpanMap[i].ldRaid.targetId);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "fw_map_ext->ldSpanMap[%d].ldRaid.seqNum 0x%x\n",
|
|
|
a8a466 |
+ i, fw_map_ext->ldSpanMap[i].ldRaid.seqNum);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "fw_map_ext->ldSpanMap[%d].ldRaid.rowSize 0x%x\n",
|
|
|
a8a466 |
+ i, (u32)fw_map_ext->ldSpanMap[i].ldRaid.rowSize);
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) : pDrvRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x\n",
|
|
|
a8a466 |
+ i, i, pDrvRaidMap->ldSpanMap[i].ldRaid.targetId);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "pDrvRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x\n",
|
|
|
a8a466 |
+ i, pDrvRaidMap->ldSpanMap[i].ldRaid.seqNum);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "pDrvRaidMap->ldSpanMap[%d].ldRaid.rowSize 0x%x\n",
|
|
|
a8a466 |
+ i, (u32)pDrvRaidMap->ldSpanMap[i].ldRaid.rowSize);
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megaraid_sas(%d) : drv raid map all %p\n",
|
|
|
a8a466 |
+ instance->unique_id, drv_map);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "raid map %p LD RAID MAP %p %p\n",
|
|
|
a8a466 |
+ pDrvRaidMap, &fw_map_ext->ldSpanMap[i].ldRaid,
|
|
|
a8a466 |
+ &pDrvRaidMap->ldSpanMap[i].ldRaid);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+#endif
|
|
|
a8a466 |
+ memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
|
|
|
a8a466 |
+ sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
|
|
|
a8a466 |
+ memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
|
|
|
a8a466 |
+ sizeof(struct MR_DEV_HANDLE_INFO) *
|
|
|
a8a466 |
+ MAX_RAIDMAP_PHYSICAL_DEVICES);
|
|
|
a8a466 |
|
|
|
a8a466 |
- if (instance->supportmax256vd) {
|
|
|
a8a466 |
- memcpy(fusion->ld_drv_map[instance->map_id & 1],
|
|
|
a8a466 |
- fusion->ld_map[instance->map_id & 1],
|
|
|
a8a466 |
- fusion->current_map_sz);
|
|
|
a8a466 |
/* New Raid map will not set totalSize, so keep expected value
|
|
|
a8a466 |
* for legacy code in ValidateMapInfo
|
|
|
a8a466 |
*/
|
|
|
a8a466 |
@@ -213,16 +399,12 @@ void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|
|
a8a466 |
}
|
|
|
a8a466 |
#endif
|
|
|
a8a466 |
|
|
|
a8a466 |
- memset(drv_map, 0, fusion->drv_map_sz);
|
|
|
a8a466 |
pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
|
|
|
a8a466 |
pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
|
|
|
a8a466 |
pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
|
|
|
a8a466 |
for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
|
|
|
a8a466 |
pDrvRaidMap->ldTgtIdToLd[i] =
|
|
|
a8a466 |
(u8)pFwRaidMap->ldTgtIdToLd[i];
|
|
|
a8a466 |
- for (i = (MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS);
|
|
|
a8a466 |
- i < MAX_LOGICAL_DRIVES_EXT; i++)
|
|
|
a8a466 |
- pDrvRaidMap->ldTgtIdToLd[i] = 0xff;
|
|
|
a8a466 |
for (i = 0; i < ld_count; i++) {
|
|
|
a8a466 |
pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
|
|
|
a8a466 |
#if VD_EXT_DEBUG
|
|
|
a8a466 |
@@ -279,7 +461,9 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance)
|
|
|
a8a466 |
lbInfo = fusion->load_balance_info;
|
|
|
a8a466 |
ldSpanInfo = fusion->log_to_span;
|
|
|
a8a466 |
|
|
|
a8a466 |
- if (instance->supportmax256vd)
|
|
|
a8a466 |
+ if (instance->max_raid_mapsize)
|
|
|
a8a466 |
+ expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
|
|
|
a8a466 |
+ else if (instance->supportmax256vd)
|
|
|
a8a466 |
expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
|
|
|
a8a466 |
else
|
|
|
a8a466 |
expected_size =
|
|
|
a8a466 |
@@ -287,8 +471,10 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance)
|
|
|
a8a466 |
(sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
|
|
|
a8a466 |
|
|
|
a8a466 |
if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
|
|
|
a8a466 |
- dev_err(&instance->pdev->dev, "map info structure size 0x%x is not matching with ld count\n",
|
|
|
a8a466 |
- (unsigned int) expected_size);
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
|
|
|
a8a466 |
+ le32_to_cpu(pDrvRaidMap->totalSize));
|
|
|
a8a466 |
+ dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
|
|
|
a8a466 |
+ (unsigned int) expected_size);
|
|
|
a8a466 |
dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
|
|
|
a8a466 |
(unsigned int)sizeof(struct MR_LD_SPAN_MAP),
|
|
|
a8a466 |
le32_to_cpu(pDrvRaidMap->totalSize));
|
|
|
a8a466 |
@@ -787,7 +973,7 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
|
|
|
a8a466 |
((fusion->adapter_type == THUNDERBOLT_SERIES) ||
|
|
|
a8a466 |
((fusion->adapter_type == INVADER_SERIES) &&
|
|
|
a8a466 |
(raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
|
|
|
a8a466 |
else if (raid->level == 1) {
|
|
|
a8a466 |
pd = MR_ArPdGet(arRef, physArm + 1, map);
|
|
|
a8a466 |
if (pd != MR_PD_INVALID)
|
|
|
a8a466 |
@@ -796,9 +982,16 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
|
|
|
a8a466 |
- pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
|
|
|
a8a466 |
- physArm;
|
|
|
a8a466 |
- io_info->span_arm = pRAID_Context->spanArm;
|
|
|
a8a466 |
+ if (instance->is_ventura) {
|
|
|
a8a466 |
+ ((struct RAID_CONTEXT_G35 *) pRAID_Context)->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ io_info->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ } else {
|
|
|
a8a466 |
+ pRAID_Context->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ io_info->span_arm = pRAID_Context->span_arm;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
return retval;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -890,7 +1083,7 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
|
|
|
a8a466 |
((fusion->adapter_type == THUNDERBOLT_SERIES) ||
|
|
|
a8a466 |
((fusion->adapter_type == INVADER_SERIES) &&
|
|
|
a8a466 |
(raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
|
|
|
a8a466 |
else if (raid->level == 1) {
|
|
|
a8a466 |
/* Get alternate Pd. */
|
|
|
a8a466 |
pd = MR_ArPdGet(arRef, physArm + 1, map);
|
|
|
a8a466 |
@@ -901,9 +1094,16 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
|
|
|
a8a466 |
- pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
|
|
|
a8a466 |
- physArm;
|
|
|
a8a466 |
- io_info->span_arm = pRAID_Context->spanArm;
|
|
|
a8a466 |
+ if (instance->is_ventura) {
|
|
|
a8a466 |
+ ((struct RAID_CONTEXT_G35 *) pRAID_Context)->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ io_info->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ } else {
|
|
|
a8a466 |
+ pRAID_Context->span_arm =
|
|
|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
|
|
a8a466 |
+ io_info->span_arm = pRAID_Context->span_arm;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
return retval;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -1107,20 +1307,20 @@ MR_BuildRaidContext(struct megasas_instance *instance,
|
|
|
a8a466 |
regSize += stripSize;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
- pRAID_Context->timeoutValue =
|
|
|
a8a466 |
+ pRAID_Context->timeout_value =
|
|
|
a8a466 |
cpu_to_le16(raid->fpIoTimeoutForLd ?
|
|
|
a8a466 |
raid->fpIoTimeoutForLd :
|
|
|
a8a466 |
map->raidMap.fpPdIoTimeoutSec);
|
|
|
a8a466 |
if (fusion->adapter_type == INVADER_SERIES)
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = (isRead) ?
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = (isRead) ?
|
|
|
a8a466 |
raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
|
|
|
a8a466 |
- else
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = (isRead) ?
|
|
|
a8a466 |
+ else if (!instance->is_ventura)
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = (isRead) ?
|
|
|
a8a466 |
REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId = raid->targetId;
|
|
|
a8a466 |
- pRAID_Context->regLockRowLBA = cpu_to_le64(regStart);
|
|
|
a8a466 |
- pRAID_Context->regLockLength = cpu_to_le32(regSize);
|
|
|
a8a466 |
- pRAID_Context->configSeqNum = raid->seqNum;
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id = raid->targetId;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
|
|
|
a8a466 |
+ pRAID_Context->config_seq_num = raid->seqNum;
|
|
|
a8a466 |
/* save pointer to raid->LUN array */
|
|
|
a8a466 |
*raidLUN = raid->LUN;
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -1138,6 +1338,13 @@ MR_BuildRaidContext(struct megasas_instance *instance,
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a8a466 |
/* If IO on an invalid Pd, then FP is not possible.*/
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|
a8a466 |
if (io_info->devHandle == cpu_to_le16(MR_PD_INVALID))
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a8a466 |
io_info->fpOkForIo = FALSE;
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|
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a8a466 |
+ /* if FP possible, set the SLUD bit in
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a8a466 |
+ * regLockFlags for ventura
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a8a466 |
+ */
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a8a466 |
+ else if ((instance->is_ventura) && (!isRead) &&
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a8a466 |
+ (raid->writeMode == MR_RL_WRITE_BACK_MODE) &&
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|
|
a8a466 |
+ (raid->capability.fp_cache_bypass_capable))
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a8a466 |
+ ((struct RAID_CONTEXT_G35 *) pRAID_Context)->routing_flags.bits.sld = 1;
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|
a8a466 |
/* set raid 1/10 fast path write capable bit in io_info */
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|
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a8a466 |
if (io_info->fpOkForIo &&
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|
a8a466 |
(io_info->r1_alt_dev_handle != MR_PD_INVALID) &&
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a8a466 |
@@ -1317,6 +1524,7 @@ u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
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a8a466 |
struct fusion_context *fusion;
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a8a466 |
struct MR_LD_RAID *raid;
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|
a8a466 |
struct MR_DRV_RAID_MAP_ALL *drv_map;
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a8a466 |
+ u16 pd1_dev_handle;
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a8a466 |
u16 pend0, pend1, ld;
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a8a466 |
u64 diff0, diff1;
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a8a466 |
u8 bestArm, pd0, pd1, span, arm;
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a8a466 |
@@ -1342,23 +1550,36 @@ u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
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a8a466 |
pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
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a8a466 |
(arm + 1 - span_row_size) : arm + 1, drv_map);
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a8a466 |
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a8a466 |
- /* get the pending cmds for the data and mirror arms */
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a8a466 |
- pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
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|
|
a8a466 |
- pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
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|
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a8a466 |
+ /* Get PD1 Dev Handle */
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a8a466 |
+
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a8a466 |
+ pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
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a8a466 |
+
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a8a466 |
+ if (pd1_dev_handle == MR_PD_INVALID) {
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a8a466 |
+ bestArm = arm;
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a8a466 |
+ } else {
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a8a466 |
+ /* get the pending cmds for the data and mirror arms */
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a8a466 |
+ pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
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a8a466 |
+ pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
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a8a466 |
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a8a466 |
- /* Determine the disk whose head is nearer to the req. block */
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|
a8a466 |
- diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
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a8a466 |
- diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
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a8a466 |
- bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
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|
a8a466 |
+ /* Determine the disk whose head is nearer to the req. block */
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|
a8a466 |
+ diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
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|
a8a466 |
+ diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
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a8a466 |
+ bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
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a8a466 |
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|
a8a466 |
- if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
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|
a8a466 |
+ /* Make balance count from 16 to 4 to
|
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|
a8a466 |
+ * keep driver in sync with Firmware
|
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|
a8a466 |
+ */
|
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|
a8a466 |
+ if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
|
|
|
a8a466 |
(bestArm != arm && pend1 > pend0 + lb_pending_cmds))
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|
|
a8a466 |
- bestArm ^= 1;
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|
a8a466 |
+ bestArm ^= 1;
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|
a8a466 |
+
|
|
|
a8a466 |
+ /* Update the last accessed block on the correct pd */
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|
a8a466 |
+ io_info->span_arm =
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|
a8a466 |
+ (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
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|
a8a466 |
+ io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
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|
|
a8a466 |
+ }
|
|
|
a8a466 |
|
|
|
a8a466 |
- /* Update the last accessed block on the correct pd */
|
|
|
a8a466 |
- io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
|
|
|
a8a466 |
lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
|
|
|
a8a466 |
- io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
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|
|
a8a466 |
#if SPAN_DEBUG
|
|
|
a8a466 |
if (arm != bestArm)
|
|
|
a8a466 |
dev_dbg(&instance->pdev->dev, "LSI Debug R1 Load balance "
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|
a8a466 |
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c
|
|
|
a8a466 |
index b146cd1..178f166 100644
|
|
|
a8a466 |
--- a/drivers/scsi/megaraid/megaraid_sas_fusion.c
|
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|
a8a466 |
+++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c
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|
a8a466 |
@@ -1829,7 +1829,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
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|
a8a466 |
struct megasas_cmd_fusion *cmd)
|
|
|
a8a466 |
{
|
|
|
a8a466 |
u8 fp_possible;
|
|
|
a8a466 |
- u32 start_lba_lo, start_lba_hi, device_id, datalength = 0;
|
|
|
a8a466 |
+ u32 start_lba_lo, start_lba_hi, device_id, datalength = 0, ld;
|
|
|
a8a466 |
struct MPI2_RAID_SCSI_IO_REQUEST *io_request;
|
|
|
a8a466 |
union MEGASAS_REQUEST_DESCRIPTOR_UNION *req_desc;
|
|
|
a8a466 |
struct IO_REQUEST_INFO io_info;
|
|
|
a8a466 |
@@ -1837,16 +1837,18 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
|
|
|
a8a466 |
u8 *raidLUN;
|
|
|
a8a466 |
unsigned long spinlock_flags;
|
|
|
a8a466 |
+ union RAID_CONTEXT_UNION *praid_context;
|
|
|
a8a466 |
+ struct MR_LD_RAID *raid;
|
|
|
a8a466 |
|
|
|
a8a466 |
device_id = MEGASAS_DEV_INDEX(scp);
|
|
|
a8a466 |
|
|
|
a8a466 |
fusion = instance->ctrl_context;
|
|
|
a8a466 |
|
|
|
a8a466 |
io_request = cmd->io_request;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.VirtualDiskTgtId =
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.virtual_disk_tgt_id =
|
|
|
a8a466 |
cpu_to_le16(device_id);
|
|
|
a8a466 |
io_request->RaidContext.raid_context.status = 0;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.exStatus = 0;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.ex_status = 0;
|
|
|
a8a466 |
|
|
|
a8a466 |
req_desc = (union MEGASAS_REQUEST_DESCRIPTOR_UNION *)cmd->request_desc;
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -1915,10 +1917,12 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
io_info.isRead = 1;
|
|
|
a8a466 |
|
|
|
a8a466 |
local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
|
|
|
a8a466 |
+ ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
|
|
|
a8a466 |
+ raid = MR_LdRaidGet(ld, local_map_ptr);
|
|
|
a8a466 |
|
|
|
a8a466 |
if ((MR_TargetIdToLdGet(device_id, local_map_ptr) >=
|
|
|
a8a466 |
instance->fw_supported_vd_count) || (!fusion->fast_path_io)) {
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.regLockFlags = 0;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.reg_lock_flags = 0;
|
|
|
a8a466 |
fp_possible = 0;
|
|
|
a8a466 |
} else {
|
|
|
a8a466 |
if (MR_BuildRaidContext(instance, &io_info,
|
|
|
a8a466 |
@@ -1945,6 +1949,8 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
fp_possible = false;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
+ praid_context = &io_request->RaidContext;
|
|
|
a8a466 |
+
|
|
|
a8a466 |
if (fp_possible) {
|
|
|
a8a466 |
megasas_set_pd_lba(io_request, scp->cmd_len, &io_info, scp,
|
|
|
a8a466 |
local_map_ptr, start_lba_lo);
|
|
|
a8a466 |
@@ -1953,18 +1959,25 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
(MPI2_REQ_DESCRIPT_FLAGS_FP_IO
|
|
|
a8a466 |
<< MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
|
|
|
a8a466 |
if (fusion->adapter_type == INVADER_SERIES) {
|
|
|
a8a466 |
- if (io_request->RaidContext.raid_context.regLockFlags ==
|
|
|
a8a466 |
+ if (io_request->RaidContext.raid_context.reg_lock_flags ==
|
|
|
a8a466 |
REGION_TYPE_UNUSED)
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
(MEGASAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
|
|
|
a8a466 |
MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.Type
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.type
|
|
|
a8a466 |
= MPI2_TYPE_CUDA;
|
|
|
a8a466 |
io_request->RaidContext.raid_context.nseg = 0x1;
|
|
|
a8a466 |
io_request->IoFlags |= cpu_to_le16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.regLockFlags |=
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.reg_lock_flags |=
|
|
|
a8a466 |
(MR_RL_FLAGS_GRANT_DESTINATION_CUDA |
|
|
|
a8a466 |
MR_RL_FLAGS_SEQ_NUM_ENABLE);
|
|
|
a8a466 |
+ } else if (instance->is_ventura) {
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.type
|
|
|
a8a466 |
+ = MPI2_TYPE_CUDA;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.nseg = 0x1;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.routing_flags.bits.sqn = 1;
|
|
|
a8a466 |
+ io_request->IoFlags |=
|
|
|
a8a466 |
+ cpu_to_le16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
|
|
|
a8a466 |
}
|
|
|
a8a466 |
if ((fusion->load_balance_info[device_id].loadBalanceFlag) &&
|
|
|
a8a466 |
(io_info.isRead)) {
|
|
|
a8a466 |
@@ -1974,6 +1987,13 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
&io_info);
|
|
|
a8a466 |
scp->SCp.Status |= MEGASAS_LOAD_BALANCE_FLAG;
|
|
|
a8a466 |
cmd->pd_r1_lb = io_info.pd_after_lb;
|
|
|
a8a466 |
+ if (instance->is_ventura)
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.span_arm
|
|
|
a8a466 |
+ = io_info.span_arm;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.span_arm
|
|
|
a8a466 |
+ = io_info.span_arm;
|
|
|
a8a466 |
+
|
|
|
a8a466 |
} else
|
|
|
a8a466 |
scp->SCp.Status &= ~MEGASAS_LOAD_BALANCE_FLAG;
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -1992,28 +2012,98 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
io_request->DevHandle = io_info.devHandle;
|
|
|
a8a466 |
/* populate the LUN field */
|
|
|
a8a466 |
memcpy(io_request->LUN, raidLUN, 8);
|
|
|
a8a466 |
+ if (instance->is_ventura) {
|
|
|
a8a466 |
+ if (io_info.isRead) {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.pdRead.cpu0) &&
|
|
|
a8a466 |
+ (raid->cpuAffinity.pdRead.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.pdRead.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ } else {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.pdWrite.cpu0)
|
|
|
a8a466 |
+ && (raid->cpuAffinity.pdWrite.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.pdWrite.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ if (praid_context->raid_context_g35.routing_flags.bits.sld) {
|
|
|
a8a466 |
+ praid_context->raid_context_g35.raid_flags
|
|
|
a8a466 |
+ = (MR_RAID_FLAGS_IO_SUB_TYPE_CACHE_BYPASS
|
|
|
a8a466 |
+ << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
} else {
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.timeoutValue =
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.timeout_value =
|
|
|
a8a466 |
cpu_to_le16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
(MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO
|
|
|
a8a466 |
<< MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
|
|
|
a8a466 |
if (fusion->adapter_type == INVADER_SERIES) {
|
|
|
a8a466 |
if (io_info.do_fp_rlbypass ||
|
|
|
a8a466 |
- (io_request->RaidContext.raid_context.regLockFlags
|
|
|
a8a466 |
+ (io_request->RaidContext.raid_context.reg_lock_flags
|
|
|
a8a466 |
== REGION_TYPE_UNUSED))
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
(MEGASAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
|
|
|
a8a466 |
MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.Type
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.type
|
|
|
a8a466 |
= MPI2_TYPE_CUDA;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.regLockFlags |=
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.reg_lock_flags |=
|
|
|
a8a466 |
(MR_RL_FLAGS_GRANT_DESTINATION_CPU0 |
|
|
|
a8a466 |
MR_RL_FLAGS_SEQ_NUM_ENABLE);
|
|
|
a8a466 |
io_request->RaidContext.raid_context.nseg = 0x1;
|
|
|
a8a466 |
+ } else if (instance->is_ventura) {
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.type
|
|
|
a8a466 |
+ = MPI2_TYPE_CUDA;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.routing_flags.bits.sqn = 1;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.nseg = 0x1;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST;
|
|
|
a8a466 |
io_request->DevHandle = cpu_to_le16(device_id);
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ if (instance->is_ventura) {
|
|
|
a8a466 |
+ if (io_info.isRead) {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.ldRead.cpu0)
|
|
|
a8a466 |
+ && (raid->cpuAffinity.ldRead.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.ldRead.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ } else {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.ldWrite.cpu0) &&
|
|
|
a8a466 |
+ (raid->cpuAffinity.ldWrite.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.ldWrite.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ if (io_request->RaidContext.raid_context_g35.stream_detected
|
|
|
a8a466 |
+ && (raid->level == 5) &&
|
|
|
a8a466 |
+ (raid->writeMode == MR_RL_WRITE_THROUGH_MODE)) {
|
|
|
a8a466 |
+ if (praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ == MR_RAID_CTX_CPUSEL_FCFS)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
} /* Not FP */
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -2048,9 +2138,9 @@ static void megasas_build_ld_nonrw_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
/* get RAID_Context pointer */
|
|
|
a8a466 |
pRAID_Context = &io_request->RaidContext.raid_context;
|
|
|
a8a466 |
/* Check with FW team */
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
|
|
|
a8a466 |
- pRAID_Context->regLockRowLBA = 0;
|
|
|
a8a466 |
- pRAID_Context->regLockLength = 0;
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id = cpu_to_le16(device_id);
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_row_lba = 0;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_length = 0;
|
|
|
a8a466 |
|
|
|
a8a466 |
if (fusion->fast_path_io && (
|
|
|
a8a466 |
device_id < instance->fw_supported_vd_count)) {
|
|
|
a8a466 |
@@ -2069,7 +2159,7 @@ static void megasas_build_ld_nonrw_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST;
|
|
|
a8a466 |
io_request->DevHandle = cpu_to_le16(device_id);
|
|
|
a8a466 |
io_request->LUN[1] = scmd->device->lun;
|
|
|
a8a466 |
- pRAID_Context->timeoutValue =
|
|
|
a8a466 |
+ pRAID_Context->timeout_value =
|
|
|
a8a466 |
cpu_to_le16 (scmd->request->timeout / HZ);
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
(MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
|
|
|
a8a466 |
@@ -2077,9 +2167,11 @@ static void megasas_build_ld_nonrw_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
} else {
|
|
|
a8a466 |
|
|
|
a8a466 |
/* set RAID context values */
|
|
|
a8a466 |
- pRAID_Context->configSeqNum = raid->seqNum;
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = REGION_TYPE_SHARED_READ;
|
|
|
a8a466 |
- pRAID_Context->timeoutValue = cpu_to_le16(raid->fpIoTimeoutForLd);
|
|
|
a8a466 |
+ pRAID_Context->config_seq_num = raid->seqNum;
|
|
|
a8a466 |
+ if (!instance->is_ventura)
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = REGION_TYPE_SHARED_READ;
|
|
|
a8a466 |
+ pRAID_Context->timeout_value =
|
|
|
a8a466 |
+ cpu_to_le16(raid->fpIoTimeoutForLd);
|
|
|
a8a466 |
|
|
|
a8a466 |
/* get the DevHandle for the PD (since this is
|
|
|
a8a466 |
fpNonRWCapable, this is a single disk RAID0) */
|
|
|
a8a466 |
@@ -2134,12 +2226,12 @@ megasas_build_syspd_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
io_request = cmd->io_request;
|
|
|
a8a466 |
/* get RAID_Context pointer */
|
|
|
a8a466 |
pRAID_Context = &io_request->RaidContext.raid_context;
|
|
|
a8a466 |
- pRAID_Context->regLockFlags = 0;
|
|
|
a8a466 |
- pRAID_Context->regLockRowLBA = 0;
|
|
|
a8a466 |
- pRAID_Context->regLockLength = 0;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags = 0;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_row_lba = 0;
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_length = 0;
|
|
|
a8a466 |
io_request->DataLength = cpu_to_le32(scsi_bufflen(scmd));
|
|
|
a8a466 |
io_request->LUN[1] = scmd->device->lun;
|
|
|
a8a466 |
- pRAID_Context->RAIDFlags = MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD
|
|
|
a8a466 |
+ pRAID_Context->raid_flags = MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD
|
|
|
a8a466 |
<< MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT;
|
|
|
a8a466 |
|
|
|
a8a466 |
/* If FW supports PD sequence number */
|
|
|
a8a466 |
@@ -2148,24 +2240,27 @@ megasas_build_syspd_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
/* TgtId must be incremented by 255 as jbod seq number is index
|
|
|
a8a466 |
* below raid map
|
|
|
a8a466 |
*/
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId =
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id =
|
|
|
a8a466 |
cpu_to_le16(device_id + (MAX_PHYSICAL_DEVICES - 1));
|
|
|
a8a466 |
- pRAID_Context->configSeqNum = pd_sync->seq[pd_index].seqNum;
|
|
|
a8a466 |
+ pRAID_Context->config_seq_num = pd_sync->seq[pd_index].seqNum;
|
|
|
a8a466 |
io_request->DevHandle = pd_sync->seq[pd_index].devHandle;
|
|
|
a8a466 |
- pRAID_Context->regLockFlags |=
|
|
|
a8a466 |
+ if (instance->is_ventura)
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.routing_flags.bits.sqn = 1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ pRAID_Context->reg_lock_flags |=
|
|
|
a8a466 |
(MR_RL_FLAGS_SEQ_NUM_ENABLE|MR_RL_FLAGS_GRANT_DESTINATION_CUDA);
|
|
|
a8a466 |
- pRAID_Context->Type = MPI2_TYPE_CUDA;
|
|
|
a8a466 |
+ pRAID_Context->type = MPI2_TYPE_CUDA;
|
|
|
a8a466 |
pRAID_Context->nseg = 0x1;
|
|
|
a8a466 |
} else if (fusion->fast_path_io) {
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
|
|
|
a8a466 |
- pRAID_Context->configSeqNum = 0;
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id = cpu_to_le16(device_id);
|
|
|
a8a466 |
+ pRAID_Context->config_seq_num = 0;
|
|
|
a8a466 |
local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
|
|
|
a8a466 |
io_request->DevHandle =
|
|
|
a8a466 |
local_map_ptr->raidMap.devHndlInfo[device_id].curDevHdl;
|
|
|
a8a466 |
} else {
|
|
|
a8a466 |
/* Want to send all IO via FW path */
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
|
|
|
a8a466 |
- pRAID_Context->configSeqNum = 0;
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id = cpu_to_le16(device_id);
|
|
|
a8a466 |
+ pRAID_Context->config_seq_num = 0;
|
|
|
a8a466 |
io_request->DevHandle = cpu_to_le16(0xFFFF);
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -2181,14 +2276,14 @@ megasas_build_syspd_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
(MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
|
|
|
a8a466 |
MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
|
|
|
a8a466 |
- pRAID_Context->timeoutValue = cpu_to_le16(os_timeout_value);
|
|
|
a8a466 |
- pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
|
|
|
a8a466 |
+ pRAID_Context->timeout_value = cpu_to_le16(os_timeout_value);
|
|
|
a8a466 |
+ pRAID_Context->virtual_disk_tgt_id = cpu_to_le16(device_id);
|
|
|
a8a466 |
} else {
|
|
|
a8a466 |
/* system pd Fast Path */
|
|
|
a8a466 |
io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
|
|
|
a8a466 |
timeout_limit = (scmd->device->type == TYPE_DISK) ?
|
|
|
a8a466 |
255 : 0xFFFF;
|
|
|
a8a466 |
- pRAID_Context->timeoutValue =
|
|
|
a8a466 |
+ pRAID_Context->timeout_value =
|
|
|
a8a466 |
cpu_to_le16((os_timeout_value > timeout_limit) ?
|
|
|
a8a466 |
timeout_limit : os_timeout_value);
|
|
|
a8a466 |
if (fusion->adapter_type == INVADER_SERIES)
|
|
|
a8a466 |
@@ -2227,8 +2322,8 @@ megasas_build_io_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
io_request->Control = 0;
|
|
|
a8a466 |
io_request->EEDPBlockSize = 0;
|
|
|
a8a466 |
io_request->ChainOffset = 0;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.RAIDFlags = 0;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.Type = 0;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.raid_flags = 0;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.type = 0;
|
|
|
a8a466 |
io_request->RaidContext.raid_context.nseg = 0;
|
|
|
a8a466 |
|
|
|
a8a466 |
memcpy(io_request->CDB.CDB32, scp->cmnd, scp->cmd_len);
|
|
|
a8a466 |
@@ -2273,11 +2368,16 @@ megasas_build_io_fusion(struct megasas_instance *instance,
|
|
|
a8a466 |
return 1;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
- /* numSGE store lower 8 bit of sge_count.
|
|
|
a8a466 |
- * numSGEExt store higher 8 bit of sge_count
|
|
|
a8a466 |
- */
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.numSGE = sge_count;
|
|
|
a8a466 |
- io_request->RaidContext.raid_context.numSGEExt = (u8)(sge_count >> 8);
|
|
|
a8a466 |
+ if (instance->is_ventura)
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context_g35.num_sge = sge_count;
|
|
|
a8a466 |
+ else {
|
|
|
a8a466 |
+ /* numSGE store lower 8 bit of sge_count.
|
|
|
a8a466 |
+ * numSGEExt store higher 8 bit of sge_count
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.num_sge = sge_count;
|
|
|
a8a466 |
+ io_request->RaidContext.raid_context.num_sge_ext =
|
|
|
a8a466 |
+ (u8)(sge_count >> 8);
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
|
|
|
a8a466 |
io_request->SGLFlags = cpu_to_le16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -2326,6 +2426,10 @@ void megasas_fpio_to_ldio(struct megasas_instance *instance,
|
|
|
a8a466 |
struct megasas_cmd_fusion *cmd, struct scsi_cmnd *scmd)
|
|
|
a8a466 |
{
|
|
|
a8a466 |
struct fusion_context *fusion;
|
|
|
a8a466 |
+ union RAID_CONTEXT_UNION *praid_context;
|
|
|
a8a466 |
+ struct MR_LD_RAID *raid;
|
|
|
a8a466 |
+ struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
|
|
|
a8a466 |
+ u32 device_id, ld;
|
|
|
a8a466 |
|
|
|
a8a466 |
fusion = instance->ctrl_context;
|
|
|
a8a466 |
cmd->request_desc->SCSIIO.RequestFlags =
|
|
|
a8a466 |
@@ -2349,6 +2453,35 @@ void megasas_fpio_to_ldio(struct megasas_instance *instance,
|
|
|
a8a466 |
cmd->io_request->Control = 0;
|
|
|
a8a466 |
cmd->io_request->EEDPBlockSize = 0;
|
|
|
a8a466 |
cmd->is_raid_1_fp_write = 0;
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+ device_id = MEGASAS_DEV_INDEX(cmd->scmd);
|
|
|
a8a466 |
+ local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
|
|
|
a8a466 |
+ ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
|
|
|
a8a466 |
+ raid = MR_LdRaidGet(ld, local_map_ptr);
|
|
|
a8a466 |
+ praid_context = &cmd->io_request->RaidContext;
|
|
|
a8a466 |
+ if (cmd->scmd->sc_data_direction == PCI_DMA_FROMDEVICE) {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.ldRead.cpu0)
|
|
|
a8a466 |
+ && (raid->cpuAffinity.ldRead.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.ldRead.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ } else {
|
|
|
a8a466 |
+ if ((raid->cpuAffinity.ldWrite.cpu0)
|
|
|
a8a466 |
+ && (raid->cpuAffinity.ldWrite.cpu1))
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_FCFS;
|
|
|
a8a466 |
+ else if (raid->cpuAffinity.ldWrite.cpu1)
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_1;
|
|
|
a8a466 |
+ else
|
|
|
a8a466 |
+ praid_context->raid_context_g35.routing_flags.bits.cpu_sel
|
|
|
a8a466 |
+ = MR_RAID_CTX_CPUSEL_0;
|
|
|
a8a466 |
+ }
|
|
|
a8a466 |
}
|
|
|
a8a466 |
|
|
|
a8a466 |
/* megasas_prepate_secondRaid1_IO
|
|
|
a8a466 |
@@ -2585,7 +2718,7 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
|
|
|
a8a466 |
|
|
|
a8a466 |
scmd_local = cmd_fusion->scmd;
|
|
|
a8a466 |
status = scsi_io_req->RaidContext.raid_context.status;
|
|
|
a8a466 |
- extStatus = scsi_io_req->RaidContext.raid_context.exStatus;
|
|
|
a8a466 |
+ extStatus = scsi_io_req->RaidContext.raid_context.ex_status;
|
|
|
a8a466 |
sense = cmd_fusion->sense;
|
|
|
a8a466 |
data_length = scsi_io_req->DataLength;
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -2653,13 +2786,13 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
|
|
|
a8a466 |
status =
|
|
|
a8a466 |
r1_cmd->io_request->RaidContext.raid_context.status;
|
|
|
a8a466 |
extStatus =
|
|
|
a8a466 |
- r1_cmd->io_request->RaidContext.raid_context.exStatus;
|
|
|
a8a466 |
+ r1_cmd->io_request->RaidContext.raid_context.ex_status;
|
|
|
a8a466 |
data_length =
|
|
|
a8a466 |
r1_cmd->io_request->DataLength;
|
|
|
a8a466 |
sense = r1_cmd->sense;
|
|
|
a8a466 |
}
|
|
|
a8a466 |
r1_cmd->io_request->RaidContext.raid_context.status = 0;
|
|
|
a8a466 |
- r1_cmd->io_request->RaidContext.raid_context.exStatus = 0;
|
|
|
a8a466 |
+ r1_cmd->io_request->RaidContext.raid_context.ex_status = 0;
|
|
|
a8a466 |
cmd_fusion->is_raid_1_fp_write = 0;
|
|
|
a8a466 |
r1_cmd->is_raid_1_fp_write = 0;
|
|
|
a8a466 |
r1_cmd->cmd_completed = false;
|
|
|
a8a466 |
@@ -2669,10 +2802,8 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
|
|
|
a8a466 |
if (!cmd_fusion->is_raid_1_fp_write) {
|
|
|
a8a466 |
map_cmd_status(fusion, scmd_local, status,
|
|
|
a8a466 |
extStatus, data_length, sense);
|
|
|
a8a466 |
- scsi_io_req->RaidContext.raid_context.status
|
|
|
a8a466 |
- = 0;
|
|
|
a8a466 |
- scsi_io_req->RaidContext.raid_context.exStatus
|
|
|
a8a466 |
- = 0;
|
|
|
a8a466 |
+ scsi_io_req->RaidContext.raid_context.status = 0;
|
|
|
a8a466 |
+ scsi_io_req->RaidContext.raid_context.ex_status = 0;
|
|
|
a8a466 |
megasas_return_cmd_fusion(instance, cmd_fusion);
|
|
|
a8a466 |
scsi_dma_unmap(scmd_local);
|
|
|
a8a466 |
scmd_local->scsi_done(scmd_local);
|
|
|
a8a466 |
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.h b/drivers/scsi/megaraid/megaraid_sas_fusion.h
|
|
|
a8a466 |
index 7a3c3d1..2de12b4 100644
|
|
|
a8a466 |
--- a/drivers/scsi/megaraid/megaraid_sas_fusion.h
|
|
|
a8a466 |
+++ b/drivers/scsi/megaraid/megaraid_sas_fusion.h
|
|
|
a8a466 |
@@ -59,6 +59,8 @@
|
|
|
a8a466 |
#define MR_RL_FLAGS_GRANT_DESTINATION_CPU1 0x10
|
|
|
a8a466 |
#define MR_RL_FLAGS_GRANT_DESTINATION_CUDA 0x80
|
|
|
a8a466 |
#define MR_RL_FLAGS_SEQ_NUM_ENABLE 0x8
|
|
|
a8a466 |
+#define MR_RL_WRITE_THROUGH_MODE 0x00
|
|
|
a8a466 |
+#define MR_RL_WRITE_BACK_MODE 0x01
|
|
|
a8a466 |
|
|
|
a8a466 |
/* T10 PI defines */
|
|
|
a8a466 |
#define MR_PROT_INFO_TYPE_CONTROLLER 0x8
|
|
|
a8a466 |
@@ -81,6 +83,11 @@
|
|
|
a8a466 |
enum MR_RAID_FLAGS_IO_SUB_TYPE {
|
|
|
a8a466 |
MR_RAID_FLAGS_IO_SUB_TYPE_NONE = 0,
|
|
|
a8a466 |
MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD = 1,
|
|
|
a8a466 |
+ MR_RAID_FLAGS_IO_SUB_TYPE_RMW_DATA = 2,
|
|
|
a8a466 |
+ MR_RAID_FLAGS_IO_SUB_TYPE_RMW_P = 3,
|
|
|
a8a466 |
+ MR_RAID_FLAGS_IO_SUB_TYPE_RMW_Q = 4,
|
|
|
a8a466 |
+ MR_RAID_FLAGS_IO_SUB_TYPE_CACHE_BYPASS = 6,
|
|
|
a8a466 |
+ MR_RAID_FLAGS_IO_SUB_TYPE_LDIO_BW_LIMIT = 7
|
|
|
a8a466 |
};
|
|
|
a8a466 |
|
|
|
a8a466 |
/*
|
|
|
a8a466 |
@@ -109,29 +116,29 @@ enum MR_FUSION_ADAPTER_TYPE {
|
|
|
a8a466 |
|
|
|
a8a466 |
struct RAID_CONTEXT {
|
|
|
a8a466 |
#if defined(__BIG_ENDIAN_BITFIELD)
|
|
|
a8a466 |
- u8 nseg:4;
|
|
|
a8a466 |
- u8 Type:4;
|
|
|
a8a466 |
+ u8 nseg:4;
|
|
|
a8a466 |
+ u8 type:4;
|
|
|
a8a466 |
#else
|
|
|
a8a466 |
- u8 Type:4;
|
|
|
a8a466 |
- u8 nseg:4;
|
|
|
a8a466 |
+ u8 type:4;
|
|
|
a8a466 |
+ u8 nseg:4;
|
|
|
a8a466 |
#endif
|
|
|
a8a466 |
- u8 resvd0;
|
|
|
a8a466 |
- __le16 timeoutValue;
|
|
|
a8a466 |
- u8 regLockFlags;
|
|
|
a8a466 |
- u8 resvd1;
|
|
|
a8a466 |
- __le16 VirtualDiskTgtId;
|
|
|
a8a466 |
- __le64 regLockRowLBA;
|
|
|
a8a466 |
- __le32 regLockLength;
|
|
|
a8a466 |
- __le16 nextLMId;
|
|
|
a8a466 |
- u8 exStatus;
|
|
|
a8a466 |
- u8 status;
|
|
|
a8a466 |
- u8 RAIDFlags;
|
|
|
a8a466 |
- u8 numSGE;
|
|
|
a8a466 |
- __le16 configSeqNum;
|
|
|
a8a466 |
- u8 spanArm;
|
|
|
a8a466 |
- u8 priority;
|
|
|
a8a466 |
- u8 numSGEExt;
|
|
|
a8a466 |
- u8 resvd2;
|
|
|
a8a466 |
+ u8 resvd0;
|
|
|
a8a466 |
+ __le16 timeout_value;
|
|
|
a8a466 |
+ u8 reg_lock_flags;
|
|
|
a8a466 |
+ u8 resvd1;
|
|
|
a8a466 |
+ __le16 virtual_disk_tgt_id;
|
|
|
a8a466 |
+ __le64 reg_lock_row_lba;
|
|
|
a8a466 |
+ __le32 reg_lock_length;
|
|
|
a8a466 |
+ __le16 next_lmid;
|
|
|
a8a466 |
+ u8 ex_status;
|
|
|
a8a466 |
+ u8 status;
|
|
|
a8a466 |
+ u8 raid_flags;
|
|
|
a8a466 |
+ u8 num_sge;
|
|
|
a8a466 |
+ __le16 config_seq_num;
|
|
|
a8a466 |
+ u8 span_arm;
|
|
|
a8a466 |
+ u8 priority;
|
|
|
a8a466 |
+ u8 num_sge_ext;
|
|
|
a8a466 |
+ u8 resvd2;
|
|
|
a8a466 |
};
|
|
|
a8a466 |
|
|
|
a8a466 |
/*
|
|
|
a8a466 |
@@ -187,7 +194,7 @@ struct RAID_CONTEXT_G35 {
|
|
|
a8a466 |
} smid;
|
|
|
a8a466 |
u8 ex_status; /* 0x16 : OUT */
|
|
|
a8a466 |
u8 status; /* 0x17 status */
|
|
|
a8a466 |
- u8 RAIDFlags; /* 0x18 resvd[7:6], ioSubType[5:4],
|
|
|
a8a466 |
+ u8 raid_flags; /* 0x18 resvd[7:6], ioSubType[5:4],
|
|
|
a8a466 |
* resvd[3:1], preferredCpu[0]
|
|
|
a8a466 |
*/
|
|
|
a8a466 |
u8 span_arm; /* 0x1C span[7:5], arm[4:0] */
|
|
|
a8a466 |
@@ -672,14 +679,17 @@ struct MPI2_IOC_INIT_REQUEST {
|
|
|
a8a466 |
#define MAX_RAIDMAP_ROW_SIZE (MAX_ROW_SIZE)
|
|
|
a8a466 |
#define MAX_LOGICAL_DRIVES 64
|
|
|
a8a466 |
#define MAX_LOGICAL_DRIVES_EXT 256
|
|
|
a8a466 |
+#define MAX_LOGICAL_DRIVES_DYN 512
|
|
|
a8a466 |
#define MAX_RAIDMAP_LOGICAL_DRIVES (MAX_LOGICAL_DRIVES)
|
|
|
a8a466 |
#define MAX_RAIDMAP_VIEWS (MAX_LOGICAL_DRIVES)
|
|
|
a8a466 |
#define MAX_ARRAYS 128
|
|
|
a8a466 |
#define MAX_RAIDMAP_ARRAYS (MAX_ARRAYS)
|
|
|
a8a466 |
#define MAX_ARRAYS_EXT 256
|
|
|
a8a466 |
#define MAX_API_ARRAYS_EXT (MAX_ARRAYS_EXT)
|
|
|
a8a466 |
+#define MAX_API_ARRAYS_DYN 512
|
|
|
a8a466 |
#define MAX_PHYSICAL_DEVICES 256
|
|
|
a8a466 |
#define MAX_RAIDMAP_PHYSICAL_DEVICES (MAX_PHYSICAL_DEVICES)
|
|
|
a8a466 |
+#define MAX_RAIDMAP_PHYSICAL_DEVICES_DYN 512
|
|
|
a8a466 |
#define MR_DCMD_LD_MAP_GET_INFO 0x0300e101
|
|
|
a8a466 |
#define MR_DCMD_SYSTEM_PD_MAP_GET_INFO 0x0200e102
|
|
|
a8a466 |
#define MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC 0x010e8485 /* SR-IOV HB alloc*/
|
|
|
a8a466 |
@@ -726,12 +736,56 @@ struct MR_SPAN_BLOCK_INFO {
|
|
|
a8a466 |
struct MR_SPAN_INFO block_span_info;
|
|
|
a8a466 |
};
|
|
|
a8a466 |
|
|
|
a8a466 |
+#define MR_RAID_CTX_CPUSEL_0 0
|
|
|
a8a466 |
+#define MR_RAID_CTX_CPUSEL_1 1
|
|
|
a8a466 |
+#define MR_RAID_CTX_CPUSEL_2 2
|
|
|
a8a466 |
+#define MR_RAID_CTX_CPUSEL_3 3
|
|
|
a8a466 |
+#define MR_RAID_CTX_CPUSEL_FCFS 0xF
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+struct MR_CPU_AFFINITY_MASK {
|
|
|
a8a466 |
+ union {
|
|
|
a8a466 |
+ struct {
|
|
|
a8a466 |
+#ifndef MFI_BIG_ENDIAN
|
|
|
a8a466 |
+ u8 hw_path:1;
|
|
|
a8a466 |
+ u8 cpu0:1;
|
|
|
a8a466 |
+ u8 cpu1:1;
|
|
|
a8a466 |
+ u8 cpu2:1;
|
|
|
a8a466 |
+ u8 cpu3:1;
|
|
|
a8a466 |
+ u8 reserved:3;
|
|
|
a8a466 |
+#else
|
|
|
a8a466 |
+ u8 reserved:3;
|
|
|
a8a466 |
+ u8 cpu3:1;
|
|
|
a8a466 |
+ u8 cpu2:1;
|
|
|
a8a466 |
+ u8 cpu1:1;
|
|
|
a8a466 |
+ u8 cpu0:1;
|
|
|
a8a466 |
+ u8 hw_path:1;
|
|
|
a8a466 |
+#endif
|
|
|
a8a466 |
+ };
|
|
|
a8a466 |
+ u8 core_mask;
|
|
|
a8a466 |
+ };
|
|
|
a8a466 |
+};
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+struct MR_IO_AFFINITY {
|
|
|
a8a466 |
+ union {
|
|
|
a8a466 |
+ struct {
|
|
|
a8a466 |
+ struct MR_CPU_AFFINITY_MASK pdRead;
|
|
|
a8a466 |
+ struct MR_CPU_AFFINITY_MASK pdWrite;
|
|
|
a8a466 |
+ struct MR_CPU_AFFINITY_MASK ldRead;
|
|
|
a8a466 |
+ struct MR_CPU_AFFINITY_MASK ldWrite;
|
|
|
a8a466 |
+ };
|
|
|
a8a466 |
+ u32 word;
|
|
|
a8a466 |
+ };
|
|
|
a8a466 |
+ u8 maxCores; /* Total cores + HW Path in ROC */
|
|
|
a8a466 |
+ u8 reserved[3];
|
|
|
a8a466 |
+};
|
|
|
a8a466 |
+
|
|
|
a8a466 |
struct MR_LD_RAID {
|
|
|
a8a466 |
struct {
|
|
|
a8a466 |
#if defined(__BIG_ENDIAN_BITFIELD)
|
|
|
a8a466 |
- u32 reserved4:3;
|
|
|
a8a466 |
- u32 fp_cache_bypass_capable:1;
|
|
|
a8a466 |
- u32 fp_rmw_capable:1;
|
|
|
a8a466 |
+ u32 reserved4:2;
|
|
|
a8a466 |
+ u32 fp_cache_bypass_capable:1;
|
|
|
a8a466 |
+ u32 fp_rmw_capable:1;
|
|
|
a8a466 |
+ u32 disable_coalescing:1;
|
|
|
a8a466 |
u32 fpBypassRegionLock:1;
|
|
|
a8a466 |
u32 tmCapable:1;
|
|
|
a8a466 |
u32 fpNonRWCapable:1;
|
|
|
a8a466 |
@@ -759,9 +813,10 @@ struct MR_LD_RAID {
|
|
|
a8a466 |
u32 fpNonRWCapable:1;
|
|
|
a8a466 |
u32 tmCapable:1;
|
|
|
a8a466 |
u32 fpBypassRegionLock:1;
|
|
|
a8a466 |
- u32 fp_rmw_capable:1;
|
|
|
a8a466 |
- u32 fp_cache_bypass_capable:1;
|
|
|
a8a466 |
- u32 reserved4:3;
|
|
|
a8a466 |
+ u32 disable_coalescing:1;
|
|
|
a8a466 |
+ u32 fp_rmw_capable:1;
|
|
|
a8a466 |
+ u32 fp_cache_bypass_capable:1;
|
|
|
a8a466 |
+ u32 reserved4:2;
|
|
|
a8a466 |
#endif
|
|
|
a8a466 |
} capability;
|
|
|
a8a466 |
__le32 reserved6;
|
|
|
a8a466 |
@@ -788,7 +843,36 @@ struct MR_LD_RAID {
|
|
|
a8a466 |
|
|
|
a8a466 |
u8 LUN[8]; /* 0x24 8 byte LUN field used for SCSI IO's */
|
|
|
a8a466 |
u8 fpIoTimeoutForLd;/*0x2C timeout value used by driver in FP IO*/
|
|
|
a8a466 |
- u8 reserved3[0x80-0x2D]; /* 0x2D */
|
|
|
a8a466 |
+ /* Ox2D This LD accept priority boost of this type */
|
|
|
a8a466 |
+ u8 ld_accept_priority_type;
|
|
|
a8a466 |
+ u8 reserved2[2]; /* 0x2E - 0x2F */
|
|
|
a8a466 |
+ /* 0x30 - 0x33, Logical block size for the LD */
|
|
|
a8a466 |
+ u32 logical_block_length;
|
|
|
a8a466 |
+ struct {
|
|
|
a8a466 |
+#ifndef MFI_BIG_ENDIAN
|
|
|
a8a466 |
+ /* 0x34, P_I_EXPONENT from READ CAPACITY 16 */
|
|
|
a8a466 |
+ u32 ld_pi_exp:4;
|
|
|
a8a466 |
+ /* 0x34, LOGICAL BLOCKS PER PHYSICAL
|
|
|
a8a466 |
+ * BLOCK EXPONENT from READ CAPACITY 16
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 ld_logical_block_exp:4;
|
|
|
a8a466 |
+ u32 reserved1:24; /* 0x34 */
|
|
|
a8a466 |
+#else
|
|
|
a8a466 |
+ u32 reserved1:24; /* 0x34 */
|
|
|
a8a466 |
+ /* 0x34, LOGICAL BLOCKS PER PHYSICAL
|
|
|
a8a466 |
+ * BLOCK EXPONENT from READ CAPACITY 16
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 ld_logical_block_exp:4;
|
|
|
a8a466 |
+ /* 0x34, P_I_EXPONENT from READ CAPACITY 16 */
|
|
|
a8a466 |
+ u32 ld_pi_exp:4;
|
|
|
a8a466 |
+#endif
|
|
|
a8a466 |
+ }; /* 0x34 - 0x37 */
|
|
|
a8a466 |
+ /* 0x38 - 0x3f, This will determine which
|
|
|
a8a466 |
+ * core will process LD IO and PD IO.
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ struct MR_IO_AFFINITY cpuAffinity;
|
|
|
a8a466 |
+ /* Bit definiations are specified by MR_IO_AFFINITY */
|
|
|
a8a466 |
+ u8 reserved3[0x80-0x40]; /* 0x40 - 0x7f */
|
|
|
a8a466 |
};
|
|
|
a8a466 |
|
|
|
a8a466 |
struct MR_LD_SPAN_MAP {
|
|
|
a8a466 |
@@ -846,6 +930,91 @@ struct MR_LD_TARGET_SYNC {
|
|
|
a8a466 |
__le16 seqNum;
|
|
|
a8a466 |
};
|
|
|
a8a466 |
|
|
|
a8a466 |
+/*
|
|
|
a8a466 |
+ * RAID Map descriptor Types.
|
|
|
a8a466 |
+ * Each element should uniquely idetify one data structure in the RAID map
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+enum MR_RAID_MAP_DESC_TYPE {
|
|
|
a8a466 |
+ /* MR_DEV_HANDLE_INFO data */
|
|
|
a8a466 |
+ RAID_MAP_DESC_TYPE_DEVHDL_INFO = 0x0,
|
|
|
a8a466 |
+ /* target to Ld num Index map */
|
|
|
a8a466 |
+ RAID_MAP_DESC_TYPE_TGTID_INFO = 0x1,
|
|
|
a8a466 |
+ /* MR_ARRAY_INFO data */
|
|
|
a8a466 |
+ RAID_MAP_DESC_TYPE_ARRAY_INFO = 0x2,
|
|
|
a8a466 |
+ /* MR_LD_SPAN_MAP data */
|
|
|
a8a466 |
+ RAID_MAP_DESC_TYPE_SPAN_INFO = 0x3,
|
|
|
a8a466 |
+ RAID_MAP_DESC_TYPE_COUNT,
|
|
|
a8a466 |
+};
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+/*
|
|
|
a8a466 |
+ * This table defines the offset, size and num elements of each descriptor
|
|
|
a8a466 |
+ * type in the RAID Map buffer
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+struct MR_RAID_MAP_DESC_TABLE {
|
|
|
a8a466 |
+ /* Raid map descriptor type */
|
|
|
a8a466 |
+ u32 raid_map_desc_type;
|
|
|
a8a466 |
+ /* Offset into the RAID map buffer where
|
|
|
a8a466 |
+ * descriptor data is saved
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 raid_map_desc_offset;
|
|
|
a8a466 |
+ /* total size of the
|
|
|
a8a466 |
+ * descriptor buffer
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 raid_map_desc_buffer_size;
|
|
|
a8a466 |
+ /* Number of elements contained in the
|
|
|
a8a466 |
+ * descriptor buffer
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 raid_map_desc_elements;
|
|
|
a8a466 |
+};
|
|
|
a8a466 |
+
|
|
|
a8a466 |
+/*
|
|
|
a8a466 |
+ * Dynamic Raid Map Structure.
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+struct MR_FW_RAID_MAP_DYNAMIC {
|
|
|
a8a466 |
+ u32 raid_map_size; /* total size of RAID Map structure */
|
|
|
a8a466 |
+ u32 desc_table_offset;/* Offset of desc table into RAID map*/
|
|
|
a8a466 |
+ u32 desc_table_size; /* Total Size of desc table */
|
|
|
a8a466 |
+ /* Total Number of elements in the desc table */
|
|
|
a8a466 |
+ u32 desc_table_num_elements;
|
|
|
a8a466 |
+ u64 reserved1;
|
|
|
a8a466 |
+ u32 reserved2[3]; /*future use */
|
|
|
a8a466 |
+ /* timeout value used by driver in FP IOs */
|
|
|
a8a466 |
+ u8 fp_pd_io_timeout_sec;
|
|
|
a8a466 |
+ u8 reserved3[3];
|
|
|
a8a466 |
+ /* when this seqNum increments, driver needs to
|
|
|
a8a466 |
+ * release RMW buffers asap
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ u32 rmw_fp_seq_num;
|
|
|
a8a466 |
+ u16 ld_count; /* count of lds. */
|
|
|
a8a466 |
+ u16 ar_count; /* count of arrays */
|
|
|
a8a466 |
+ u16 span_count; /* count of spans */
|
|
|
a8a466 |
+ u16 reserved4[3];
|
|
|
a8a466 |
+/*
|
|
|
a8a466 |
+ * The below structure of pointers is only to be used by the driver.
|
|
|
a8a466 |
+ * This is added in the ,API to reduce the amount of code changes
|
|
|
a8a466 |
+ * needed in the driver to support dynamic RAID map Firmware should
|
|
|
a8a466 |
+ * not update these pointers while preparing the raid map
|
|
|
a8a466 |
+ */
|
|
|
a8a466 |
+ union {
|
|
|
a8a466 |
+ struct {
|
|
|
a8a466 |
+ struct MR_DEV_HANDLE_INFO *dev_hndl_info;
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a8a466 |
+ u16 *ld_tgt_id_to_ld;
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a8a466 |
+ struct MR_ARRAY_INFO *ar_map_info;
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a8a466 |
+ struct MR_LD_SPAN_MAP *ld_span_map;
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a8a466 |
+ };
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a8a466 |
+ u64 ptr_structure_size[RAID_MAP_DESC_TYPE_COUNT];
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a8a466 |
+ };
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a8a466 |
+/*
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a8a466 |
+ * RAID Map descriptor table defines the layout of data in the RAID Map.
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a8a466 |
+ * The size of the descriptor table itself could change.
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a8a466 |
+ */
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a8a466 |
+ /* Variable Size descriptor Table. */
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a8a466 |
+ struct MR_RAID_MAP_DESC_TABLE
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a8a466 |
+ raid_map_desc_table[RAID_MAP_DESC_TYPE_COUNT];
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a8a466 |
+ /* Variable Size buffer containing all data */
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a8a466 |
+ u32 raid_map_desc_data[1];
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a8a466 |
+}; /* Dynamicaly sized RAID MAp structure */
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a8a466 |
+
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a8a466 |
#define IEEE_SGE_FLAGS_ADDR_MASK (0x03)
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a8a466 |
#define IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
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a8a466 |
#define IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
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a8a466 |
@@ -955,9 +1124,10 @@ struct MR_DRV_RAID_MAP {
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a8a466 |
__le16 spanCount;
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a8a466 |
__le16 reserve3;
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a8a466 |
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a8a466 |
- struct MR_DEV_HANDLE_INFO devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES];
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a8a466 |
- u8 ldTgtIdToLd[MAX_LOGICAL_DRIVES_EXT];
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|
|
a8a466 |
- struct MR_ARRAY_INFO arMapInfo[MAX_API_ARRAYS_EXT];
|
|
|
a8a466 |
+ struct MR_DEV_HANDLE_INFO
|
|
|
a8a466 |
+ devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES_DYN];
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|
|
a8a466 |
+ u16 ldTgtIdToLd[MAX_LOGICAL_DRIVES_DYN];
|
|
|
a8a466 |
+ struct MR_ARRAY_INFO arMapInfo[MAX_API_ARRAYS_DYN];
|
|
|
a8a466 |
struct MR_LD_SPAN_MAP ldSpanMap[1];
|
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|
a8a466 |
|
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a8a466 |
};
|
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|
a8a466 |
@@ -969,7 +1139,7 @@ struct MR_DRV_RAID_MAP {
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a8a466 |
struct MR_DRV_RAID_MAP_ALL {
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|
a8a466 |
|
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|
a8a466 |
struct MR_DRV_RAID_MAP raidMap;
|
|
|
a8a466 |
- struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_EXT - 1];
|
|
|
a8a466 |
+ struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_DYN - 1];
|
|
|
a8a466 |
} __packed;
|
|
|
a8a466 |
|
|
|
a8a466 |
|
|
|
a8a466 |
@@ -1088,7 +1258,7 @@ struct fusion_context {
|
|
|
a8a466 |
u8 chain_offset_io_request;
|
|
|
a8a466 |
u8 chain_offset_mfi_pthru;
|
|
|
a8a466 |
|
|
|
a8a466 |
- struct MR_FW_RAID_MAP_ALL *ld_map[2];
|
|
|
a8a466 |
+ struct MR_FW_RAID_MAP_DYNAMIC *ld_map[2];
|
|
|
a8a466 |
dma_addr_t ld_map_phys[2];
|
|
|
a8a466 |
|
|
|
a8a466 |
/*Non dma-able memory. Driver local copy.*/
|
|
|
a8a466 |
@@ -1096,6 +1266,8 @@ struct fusion_context {
|
|
|
a8a466 |
|
|
|
a8a466 |
u32 max_map_sz;
|
|
|
a8a466 |
u32 current_map_sz;
|
|
|
a8a466 |
+ u32 old_map_sz;
|
|
|
a8a466 |
+ u32 new_map_sz;
|
|
|
a8a466 |
u32 drv_map_sz;
|
|
|
a8a466 |
u32 drv_map_pages;
|
|
|
a8a466 |
struct MR_PD_CFG_SEQ_NUM_SYNC *pd_seq_sync[JBOD_MAPS_COUNT];
|
|
|
a8a466 |
--
|
|
|
a8a466 |
1.8.3.1
|
|
|
a8a466 |
|