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From bd2314e40123381058f15b3ae49616d1cccb4f44 Mon Sep 17 00:00:00 2001
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From: Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com>
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Date: Wed, 26 Oct 2016 13:34:38 +0530
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Subject: [PATCH 07/11] scsi: mpt3sas: Increased/Additional MSIX support for
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 SAS35 devices.
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For SAS35 devices MSIX vectors are inceased to 128 from 96. To support this
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Reply post host index register count is increased to 16. Also variable
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msix96_vector is replaced with combined_reply_queue and variable
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combined_reply_index_count is added to set different values for SAS3 and
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SAS35 devices.
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Signed-off-by: Chaitra P B <chaitra.basappa@broadcom.com>
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Signed-off-by: Sathya Prakash <sathya.prakash@broadcom.com>
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Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com>
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Reviewed-by: Hannes Reinecke <hare@suse.com>
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Reviewed-by: Tomas Henzl <thenzl@redhat.com>
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Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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---
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 drivers/scsi/mpt3sas/mpt3sas_base.c  | 14 +++++++-------
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 drivers/scsi/mpt3sas/mpt3sas_base.h  |  8 +++++---
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 drivers/scsi/mpt3sas/mpt3sas_scsih.c | 11 +++++++++--
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 3 files changed, 21 insertions(+), 12 deletions(-)
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diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c
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index ac87e12..b26fa23 100644
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--- a/drivers/scsi/mpt3sas/mpt3sas_base.c
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+++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
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@@ -1079,7 +1079,7 @@ _base_interrupt(int irq, void *bus_id)
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 	 * new reply host index value in ReplyPostIndex Field and msix_index
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 	 * value in MSIxIndex field.
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 	 */
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-	if (ioc->msix96_vector)
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+	if (ioc->combined_reply_queue)
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 		writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
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 			MPI2_RPHI_MSIX_INDEX_SHIFT),
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 			ioc->replyPostRegisterIndex[msix_index/8]);
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@@ -2053,7 +2053,7 @@ mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
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 	_base_free_irq(ioc);
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 	_base_disable_msix(ioc);
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-	if (ioc->msix96_vector) {
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+	if (ioc->combined_reply_queue) {
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 		kfree(ioc->replyPostRegisterIndex);
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 		ioc->replyPostRegisterIndex = NULL;
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 	}
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@@ -2163,7 +2163,7 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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 	/* Use the Combined reply queue feature only for SAS3 C0 & higher
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 	 * revision HBAs and also only when reply queue count is greater than 8
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 	 */
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-	if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
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+	if (ioc->combined_reply_queue && ioc->reply_queue_count > 8) {
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 		/* Determine the Supplemental Reply Post Host Index Registers
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 		 * Addresse. Supplemental Reply Post Host Index Registers
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 		 * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
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@@ -2171,7 +2171,7 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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 		 * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
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 		 */
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 		ioc->replyPostRegisterIndex = kcalloc(
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-		     MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
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+		     ioc->combined_reply_index_count,
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 		     sizeof(resource_size_t *), GFP_KERNEL);
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 		if (!ioc->replyPostRegisterIndex) {
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 			dfailprintk(ioc, printk(MPT3SAS_FMT
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@@ -2181,14 +2181,14 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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 			goto out_fail;
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 		}
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-		for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
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+		for (i = 0; i < ioc->combined_reply_index_count; i++) {
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 			ioc->replyPostRegisterIndex[i] = (resource_size_t *)
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 			     ((u8 *)&ioc->chip->Doorbell +
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 			     MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
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 			     (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
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 		}
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 	} else
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-		ioc->msix96_vector = 0;
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+		ioc->combined_reply_queue = 0;
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 	list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
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 		pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
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@@ -5161,7 +5161,7 @@ _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
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 	/* initialize reply post host index */
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 	list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
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-		if (ioc->msix96_vector)
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+		if (ioc->combined_reply_queue)
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 			writel((reply_q->msix_index & 7)<<
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 			   MPI2_RPHI_MSIX_INDEX_SHIFT,
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 			   ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
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diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h
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index c3a39e8..240c360 100644
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--- a/drivers/scsi/mpt3sas/mpt3sas_base.h
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+++ b/drivers/scsi/mpt3sas/mpt3sas_base.h
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@@ -304,8 +304,9 @@
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  * There are twelve Supplemental Reply Post Host Index Registers
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  * and each register is at offset 0x10 bytes from the previous one.
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  */
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-#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT 12
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-#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
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+#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3	12
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+#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35	16
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+#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET	(0x10)
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 /* OEM Identifiers */
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 #define MFG10_OEM_ID_INVALID                   (0x00000000)
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@@ -1172,7 +1173,8 @@ struct MPT3SAS_ADAPTER {
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 	u8		reply_queue_count;
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 	struct list_head reply_queue_list;
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-	u8		msix96_vector;
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+	u8		combined_reply_queue;
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+	u8		combined_reply_index_count;
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 	/* reply post register index */
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 	resource_size_t	**replyPostRegisterIndex;
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diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
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index eaef45c..980c69d 100644
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--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
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+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
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@@ -8797,8 +8797,15 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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 		}
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 		if ((ioc->hba_mpi_version_belonged == MPI25_VERSION &&
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 			pdev->revision >= SAS3_PCI_DEVICE_C0_REVISION) ||
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-			(ioc->hba_mpi_version_belonged == MPI26_VERSION))
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-			ioc->msix96_vector = 1;
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+			(ioc->hba_mpi_version_belonged == MPI26_VERSION)) {
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+			ioc->combined_reply_queue = 1;
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+			if (ioc->is_gen35_ioc)
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+				ioc->combined_reply_index_count =
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+				 MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35;
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+			else
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+				ioc->combined_reply_index_count =
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+				 MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3;
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+		}
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 		break;
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 	default:
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 		return -ENODEV;
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-- 
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1.8.3.1
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