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Blame 0060-tcg-mips-use-TCGArg-or-TCGReg-instead-of-int.patch

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From 7b817977fbb87ee2e34018d92b64907197974a75 Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Fri, 21 Sep 2012 18:20:26 +0200
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Subject: [PATCH] tcg/mips: use TCGArg or TCGReg instead of int
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Instead of int, use the correct TCGArg and TCGReg type: TCGReg when
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representing a TCG target register, TCGArg when representing the latter
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or a constant.
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Reviewed-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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 tcg/mips/tcg-target.c | 63 ++++++++++++++++++++++++++++-----------------------
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 1 file changed, 35 insertions(+), 28 deletions(-)
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diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
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index a09c0d6..8b38f98 100644
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--- a/tcg/mips/tcg-target.c
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+++ b/tcg/mips/tcg-target.c
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@@ -68,7 +68,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
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 #endif
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 /* check if we really need so many registers :P */
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-static const int tcg_target_reg_alloc_order[] = {
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+static const TCGReg tcg_target_reg_alloc_order[] = {
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     TCG_REG_S0,
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     TCG_REG_S1,
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     TCG_REG_S2,
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@@ -94,14 +94,14 @@ static const int tcg_target_reg_alloc_order[] = {
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     TCG_REG_V1
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 };
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-static const int tcg_target_call_iarg_regs[4] = {
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+static const TCGReg tcg_target_call_iarg_regs[4] = {
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     TCG_REG_A0,
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     TCG_REG_A1,
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     TCG_REG_A2,
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     TCG_REG_A3
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 };
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-static const int tcg_target_call_oarg_regs[2] = {
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+static const TCGReg tcg_target_call_oarg_regs[2] = {
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     TCG_REG_V0,
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     TCG_REG_V1
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 };
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@@ -327,7 +327,8 @@ enum {
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 /*
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  * Type reg
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  */
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-static inline void tcg_out_opc_reg(TCGContext *s, int opc, int rd, int rs, int rt)
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+static inline void tcg_out_opc_reg(TCGContext *s, int opc,
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+                                   TCGReg rd, TCGReg rs, TCGReg rt)
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 {
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     int32_t inst;
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@@ -341,7 +342,8 @@ static inline void tcg_out_opc_reg(TCGContext *s, int opc, int rd, int rs, int r
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 /*
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  * Type immediate
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  */
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-static inline void tcg_out_opc_imm(TCGContext *s, int opc, int rt, int rs, int imm)
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+static inline void tcg_out_opc_imm(TCGContext *s, int opc,
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+                                   TCGReg rt, TCGReg rs, TCGArg imm)
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 {
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     int32_t inst;
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@@ -355,7 +357,8 @@ static inline void tcg_out_opc_imm(TCGContext *s, int opc, int rt, int rs, int i
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 /*
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  * Type branch
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  */
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-static inline void tcg_out_opc_br(TCGContext *s, int opc, int rt, int rs)
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+static inline void tcg_out_opc_br(TCGContext *s, int opc,
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+                                  TCGReg rt, TCGReg rs)
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 {
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     /* We pay attention here to not modify the branch target by reading
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        the existing value and using it again. This ensure that caches and
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@@ -368,7 +371,8 @@ static inline void tcg_out_opc_br(TCGContext *s, int opc, int rt, int rs)
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 /*
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  * Type sa
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  */
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-static inline void tcg_out_opc_sa(TCGContext *s, int opc, int rd, int rt, int sa)
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+static inline void tcg_out_opc_sa(TCGContext *s, int opc,
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+                                  TCGReg rd, TCGReg rt, TCGArg sa)
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 {
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     int32_t inst;
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@@ -407,7 +411,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
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     }
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 }
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-static inline void tcg_out_bswap16(TCGContext *s, int ret, int arg)
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+static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg)
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 {
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     /* ret and arg can't be register at */
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     if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
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@@ -422,7 +426,7 @@ static inline void tcg_out_bswap16(TCGContext *s, int ret, int arg)
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     tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
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 }
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-static inline void tcg_out_bswap16s(TCGContext *s, int ret, int arg)
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+static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)
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 {
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     /* ret and arg can't be register at */
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     if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
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@@ -437,7 +441,7 @@ static inline void tcg_out_bswap16s(TCGContext *s, int ret, int arg)
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     tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
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 }
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-static inline void tcg_out_bswap32(TCGContext *s, int ret, int arg)
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+static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
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 {
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     /* ret and arg must be different and can't be register at */
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     if (ret == arg || ret == TCG_REG_AT || arg == TCG_REG_AT) {
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@@ -458,7 +462,7 @@ static inline void tcg_out_bswap32(TCGContext *s, int ret, int arg)
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     tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
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 }
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-static inline void tcg_out_ext8s(TCGContext *s, int ret, int arg)
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+static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg)
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 {
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 #ifdef _MIPS_ARCH_MIPS32R2
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     tcg_out_opc_reg(s, OPC_SEB, ret, 0, arg);
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@@ -468,7 +472,7 @@ static inline void tcg_out_ext8s(TCGContext *s, int ret, int arg)
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 #endif
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 }
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-static inline void tcg_out_ext16s(TCGContext *s, int ret, int arg)
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+static inline void tcg_out_ext16s(TCGContext *s, TCGReg ret, TCGReg arg)
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 {
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 #ifdef _MIPS_ARCH_MIPS32R2
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     tcg_out_opc_reg(s, OPC_SEH, ret, 0, arg);
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@@ -478,8 +482,8 @@ static inline void tcg_out_ext16s(TCGContext *s, int ret, int arg)
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 #endif
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 }
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-static inline void tcg_out_ldst(TCGContext *s, int opc, int arg,
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-                              int arg1, tcg_target_long arg2)
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+static inline void tcg_out_ldst(TCGContext *s, int opc, TCGArg arg,
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+                                TCGReg arg1, TCGArg arg2)
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 {
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     if (arg2 == (int16_t) arg2) {
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         tcg_out_opc_imm(s, opc, arg, arg1, arg2);
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@@ -502,7 +506,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
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     tcg_out_ldst(s, OPC_SW, arg, arg1, arg2);
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 }
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-static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
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+static inline void tcg_out_addi(TCGContext *s, TCGReg reg, TCGArg val)
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 {
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     if (val == (int16_t)val) {
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         tcg_out_opc_imm(s, OPC_ADDIU, reg, reg, val);
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@@ -543,7 +547,7 @@ DEFINE_TCG_OUT_CALL_IARG(tcg_out_call_iarg_reg16, TCGReg arg)
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 #undef DEFINE_TCG_OUT_CALL_IARG_GET_ARG
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 #define DEFINE_TCG_OUT_CALL_IARG_GET_ARG(A) \
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     tcg_out_movi(s, TCG_TYPE_I32, A, arg);
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-DEFINE_TCG_OUT_CALL_IARG(tcg_out_call_iarg_imm32, uint32_t arg)
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+DEFINE_TCG_OUT_CALL_IARG(tcg_out_call_iarg_imm32, TCGArg arg)
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 #undef DEFINE_TCG_OUT_CALL_IARG_GET_ARG
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 /* We don't use the macro for this one to avoid an unnecessary reg-reg
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@@ -573,8 +577,8 @@ static inline void tcg_out_call_iarg_reg64(TCGContext *s, int *arg_num,
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 #endif
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 }
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-static void tcg_out_brcond(TCGContext *s, TCGCond cond, int arg1,
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-                           int arg2, int label_index)
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+static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
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+                           TCGArg arg2, int label_index)
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 {
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     TCGLabel *l = &s->labels[label_index];
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@@ -631,8 +635,9 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, int arg1,
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 /* XXX: we implement it at the target level to avoid having to
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    handle cross basic blocks temporaries */
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-static void tcg_out_brcond2(TCGContext *s, TCGCond cond, int arg1,
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-                            int arg2, int arg3, int arg4, int label_index)
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+static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGArg arg1,
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+                            TCGArg arg2, TCGArg arg3, TCGArg arg4,
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+                            int label_index)
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 {
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     void *label_ptr;
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@@ -694,8 +699,8 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, int arg1,
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     reloc_pc16(label_ptr, (tcg_target_long) s->code_ptr);
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 }
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-static void tcg_out_setcond(TCGContext *s, TCGCond cond, int ret,
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-                            int arg1, int arg2)
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+static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
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+                            TCGArg arg1, TCGArg arg2)
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 {
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     switch (cond) {
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     case TCG_COND_EQ:
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@@ -754,8 +759,8 @@ static void tcg_out_setcond(TCGContext *s, TCGCond cond, int ret,
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 /* XXX: we implement it at the target level to avoid having to
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    handle cross basic blocks temporaries */
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-static void tcg_out_setcond2(TCGContext *s, TCGCond cond, int ret,
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-                             int arg1, int arg2, int arg3, int arg4)
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+static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
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+                             TCGArg arg1, TCGArg arg2, TCGArg arg3, TCGArg arg4)
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 {
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     switch (cond) {
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     case TCG_COND_EQ:
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@@ -842,7 +847,7 @@ static const void * const qemu_st_helpers[4] = {
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 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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                             int opc)
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 {
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-    int addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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+    TCGReg addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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 #if defined(CONFIG_SOFTMMU)
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     void *label1_ptr, *label2_ptr;
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     int arg_num;
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@@ -850,7 +855,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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     int addr_meml;
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 # if TARGET_LONG_BITS == 64
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     uint8_t *label3_ptr;
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-    int addr_regh, addr_memh;
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+    TCGReg addr_regh;
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+    int addr_memh;
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 # endif
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 #endif
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     data_regl = *args++;
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@@ -1026,7 +1032,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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                             int opc)
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 {
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-    int addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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+    TCGReg addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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 #if defined(CONFIG_SOFTMMU)
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     uint8_t *label1_ptr, *label2_ptr;
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     int arg_num;
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@@ -1036,7 +1042,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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 #if TARGET_LONG_BITS == 64
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 # if defined(CONFIG_SOFTMMU)
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     uint8_t *label3_ptr;
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-    int addr_regh, addr_memh;
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+    TCGReg addr_regh;
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+    int addr_memh;
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 # endif
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 #endif
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     data_regl = *args++;
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-- 
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1.7.12.1
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